Patents by Inventor Naoko Yamaguchi

Naoko Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050191511
    Abstract: Provided is metal-containing resin particle for forming a conductor pattern in which the metal particles are dispersed in a resin matrix, and the content of the metal particles is 70 wt % or less.
    Type: Application
    Filed: December 22, 2004
    Publication date: September 1, 2005
    Inventors: Hideo Aoki, Naoko Yamaguchi, Chiaki Takubo
  • Publication number: 20050158527
    Abstract: According to one mode of the present invention, metal-containing resin particles comprising a resin containing a thermosetting resin at 50 wt % or more and having a rate of moisture absorption from 500 to 14500 ppm, and fine metal particles contained in the resin, is provided.
    Type: Application
    Filed: December 22, 2004
    Publication date: July 21, 2005
    Inventors: Naoko Yamaguchi, Hideo Aoki, Chiaki Takubo
  • Publication number: 20050153249
    Abstract: There are provided a metal particulate spraying step to spray metal particulates over a substrate having an insulating pattern formed of thermosetting resin, a heating step to heat and dissolve the resin pattern and fix the metal particulates on the resin pattern, and a metal particulate eliminating step to eliminate metal particulates attached on the surface of the substrate excluding the resin pattern.
    Type: Application
    Filed: June 14, 2004
    Publication date: July 14, 2005
    Inventors: Naoko Yamaguchi, Hideo Aoki, Chiaki Takubo
  • Publication number: 20050153220
    Abstract: According to one mode of the present invention, a method of producing an electronic circuit, comprising forming an integrated resin layer having a prescribed thickness by repeating a resin layer forming process a number of times so that resin layers are layered to be integrated with all the resin layers on a substrate, wherein the resin forming process comprises charging the surface of a photoconductor; forming an electrostatic latent image having a prescribed pattern on the surface of the charged photoconductor; forming a visible image by electrostatically attaching charged particles composed of resin on the surface of the photoconductor on which the electrostatic latent image is formed; transferring the visible image formed on the surface of the photoconductor and composed of the charged particles onto the substrate; and fixing said visible image transferred onto said substrate on said substrate to form the resin layer on said substrate, is provided.
    Type: Application
    Filed: December 22, 2004
    Publication date: July 14, 2005
    Inventors: Naoko Yamaguchi, Hideo Aoki, Chiaki Takubo
  • Publication number: 20050053772
    Abstract: A wiring board formed by an electrophotographic system of transferring a visible image to a substrate, the wiring board including: a substrate to which a visible image is transferred; a nonconductive metal-containing resin layer selectively formed on the substrate and containing metal particulates dispersed therein; a conductive conductor metal layer formed on the metal-containing resin layer; and a resin layer formed contiguously to the metal-containing resin layer on the substrate.
    Type: Application
    Filed: July 22, 2004
    Publication date: March 10, 2005
    Inventors: Hideo Aoki, Naoko Yamaguchi, Chiaki Takubo
  • Publication number: 20050024067
    Abstract: According to one aspect of the invention, a contact sheet for testing electronic parts, comprising an insulating porous layer; and a connection electrode which is disposed on the insulating porous layer and electrically connect the electrode or terminal of the electronic parts and the terminal of a test apparatus; wherein the connection electrode is embedded below at least one main surface of the insulating porous layer.
    Type: Application
    Filed: July 8, 2004
    Publication date: February 3, 2005
    Inventors: Naoko Yamaguchi, Hideo Aoki, Chiaki Takubo, Toshiro Hiraoka, Yasuyuki Hotta, Shigeru Matake
  • Publication number: 20050016382
    Abstract: A percolation sheet 1 is constituted of a laminated sheet comprising a long-fiber nonwoven fabric 2 with a basis weight of 5 to 30 g/m2, at least a portion of which is formed from synthetic fibers of a high-melting-point resin, and a short-fiber nonwoven fabric 3 with a weight of 3 to 15 g/m2, at least a portion of which is formed from synthetic fibers of a low-melting-point resin. The short-fiber nonwoven fabric 3 is formed from a nonwoven fabric in which fibers with a fiber length of 3 to 15 mm are randomly dispersed and deposited using a dry process, and these fibers are thermally bonded to each other. In a diagram illustrating the relationship between the pore size of the voids in the percolation sheet and the distribution rate thereof, the distribution rate of the maximum peak is ten times or more of the distribution rate of the other peaks.
    Type: Application
    Filed: December 5, 2002
    Publication date: January 27, 2005
    Inventors: Fumio Miyahara, Naoko Yamaguchi, Yasuii Yasumitsu
  • Publication number: 20040205402
    Abstract: A semiconductor test unit comprises a test circuit for inputting/outputting a test signal to/from an examined electronic product, a test signal wiring electrically connected to the test circuit, a contact board electrically connected to an electrode of the examined electronic product and provided with an electrically conductive via to which the test signal is transmitted, a multilayer circuit board electrically connected to the conductive via and the test signal wiring, located under the bottom face of the contact board, and provided with at least one through-hole, and a vacuum attachment mechanism for attaching thereto and holding the examined electronic product, the contact board, and the multilayer circuit board by vacuum. The contact board is made of an insulative material, has top and bottom faces, and is provided with at least one through-hole.
    Type: Application
    Filed: March 31, 2003
    Publication date: October 14, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoko Yamaguchi, Yoshiaki Sugizaki, Hideo Aoki, Toshiro Hiraoka, Yasuyuki Hotta, Shigeru Matake, Misa Sawanobori
  • Publication number: 20040197487
    Abstract: A method of manufacturing an electronic circuit satisfying demands for cost reduction, diversified small-quantity production, and a shorter cycle of design, manufacture, evaluation, correction, and so on is provided. The method includes at least forming a first pattern or forming a second pattern. Forming the first pattern comprises: forming a visible image on an electrostatic latent image formed on a photosensitive base, by the adhesion of charged particles essentially made of a resin; transferring the visible image onto the intermediate transfer base by the contact and pressurization of the visible image; heating/softening on the intermediate transfer base; and transferring a heated/softened resin layer onto a base material by the contact and pressurization of the resin layer.
    Type: Application
    Filed: July 15, 2003
    Publication date: October 7, 2004
    Inventors: Hideo Aoki, Chiaki Takubo, Atsuko Iida, Yasuyuki Hotta, Naoko Yamaguchi
  • Publication number: 20040112633
    Abstract: An electronic device module comprises a wiring substrate having an insulating substrate with a porous structure including continuous pores and wiring conductors selectively formed in the porous structure; and an electronic device directly connected to said wiring conductors formed in the porous structure.
    Type: Application
    Filed: September 5, 2003
    Publication date: June 17, 2004
    Inventors: Mitsuyoshi Endo, Toshiro Hiraoka, Yasuyuki Hotta, Hideo Aoki, Hideko Mukaida, Naoko Yamaguchi
  • Publication number: 20040009683
    Abstract: An electronic device connecting method according to a first aspect of the present invention includes: mounting an electronic device having at least one electrode portion on a sheet-like porous member having a hole therein so that the electrode portion is close to the porous member; selectively irradiating a predetermined region of the porous member, on which the electronic device is mounted, with energy lines to form a latent image in an irradiated or non-irradiated portion of the porous member, the predetermined region including a portion close to the electrode portion; after irradiating with the energy lines, filling a conductive material in a hole of the latent image of the porous member to form a conductive portion; and bonding and integrating the porous member, in which the conductive portion is formed, to and with the electronic device.
    Type: Application
    Filed: July 3, 2003
    Publication date: January 15, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiro Hiraoka, Mitsuyoshi Endo, Naoko Yamaguchi, Yasuyuki Hotta, Shigeru Matake, Hideo Aoki, Misa Sawanobori
  • Patent number: 6486001
    Abstract: According to a fabricating method of the present invention, a cap shaped cover plate having a concaved portion on the inner surface is mounted on the rear surface of a semiconductor chip. After solder bumps are formed on a connecting pad of a wiring substrate, a fluid resin layer is formed on the bump formed surface. Thereafter, the semiconductor chip with the cover plate adhered is mounted with a face down on the resin layer formed surface of the wiring substrate. The solder bumps on the chip side and the solder bumps on the substrate side are contacted. At that time, the peripheral portion of the cover plate is contacted and adhered to the wiring substrate. Thereafter, while the bumps on the chip side and the bumps on the substrate side are being heated, melted, and connected, the fluid resin layer on the wiring substrate is hardened. Thus, the space between the semiconductor chip and the wiring substrate (namely, the height of the bumps) is controlled to a predetermined value.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: November 26, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yumiko Ohshima, Naoko Yamaguchi
  • Patent number: 4804673
    Abstract: Fungicidally active sulfonyl azoles of the formula ##STR1## in which X represents hydrogen, alkyl, halogen, alkoxy or aryl,Y represents hydrogen, alkyl, halogen, nitro or alkoxy,Z represents hydrogen, alkyl, halogen or alkoxy, orY and Z may together represent an optionally substituted cyclic ring which can contain hetero atoms andQ represents a radical of the formula ##STR2## in which A represents a -N.dbd. radical or a ##STR3## radical, R.sup.1 represents hydrogen, alkyl or aryl, andR.sup.2 and R.sup.3 each represent hydrogen, alkyl, halogen or nitro with the proviso that R.sup.1, R.sup.2 and R.sup.3 may all simultaneously be hydrogen only if Y and Z together represent an optionally substituted ring, orQ represents 1H-benzotriazol-1-yl radical or 1H-tetrazol-1-yl radical.
    Type: Grant
    Filed: March 12, 1987
    Date of Patent: February 14, 1989
    Assignee: Nihon Tokushu Noyaku Seizo K.K.
    Inventors: Junichi Saito, Tatsuo Tamura, Yoshio Kurahashi, Noboru Matsumoto, Naoko Yamaguchi
  • Patent number: 4804394
    Abstract: Novel benzoxazines of the formula (I) ##STR1## wherein X is hydrogen or halogen,R.sup.1 is hydrogen or C.sub.1 -C.sub.2 -alkyl,R.sup.2 is cyano, trimethylsilyl, trimethylsilylmethoxycarbonyl, C.sub.1 -C.sub.4 -alkylthio or cyclopropyl andQ is ##STR2## and the use of the novel compounds as herbicides, and intermediates for the preparation of the novel benzoxazines.
    Type: Grant
    Filed: August 24, 1987
    Date of Patent: February 14, 1989
    Assignee: Nihon Tokushu Noyaku Seizo K.K.
    Inventors: Toyohiko Kume, Toshio Goto, Atsumi Kamochi, Naoko Yamaguchi, Akihiko Yanagi, Hidenori Hayakawa, Shigeki Yagi, Hiroshi Miyauchi
  • Patent number: 4729784
    Abstract: Novel dialkylmaleimides of the formula (I) ##STR1## and the use of the novel compounds as herbicides.
    Type: Grant
    Filed: June 23, 1987
    Date of Patent: March 8, 1988
    Assignee: Nihon Tokushu Noyaku Seizo K.K.
    Inventors: Toyohiko Kume, Toshio Goto, Atsumi Kamochi, Naoko Yamaguchi, Akihiko Yanagi, Hidenori Hayakawa, Shigeki Yagi
  • Patent number: 4710509
    Abstract: Novel substituted phenylsulfonylazoles of the formula (I) ##STR1## wherein X represents N or a CH-group,R represents halogen, lower alkyl, lower alkoxy, trifluoromethyl, nitrol, optionally halogeno-substituted phenyl or cycloalkyl, andn represents 2 or 3, and furthermore, in case that R is not a methyl group, also represents 1,and the use of the new compounds as agricultural and horticultural fungicides.
    Type: Grant
    Filed: June 20, 1986
    Date of Patent: December 1, 1987
    Assignee: Nihon Tokushu Noyaku Seizo K. K.
    Inventors: Junichi Saito, Tatsuo Tamura, Yoshio Kurahashi, Shigeru Uzawa, Noboru Matsumoto, Naoko Yamaguchi
  • Patent number: 4622064
    Abstract: Plant growth-regulating and fungicidally active triazolo-(3,2-c)perhydroxazin-8-ones of the formula ##STR1## in which R.sup.1 represents a hydrogen atom,R.sup.2 represents a hydrogen atom a phenoxy group substituted by a halogen atom or a phenyl group, or a benyl group substituted by a halogen atom, or R.sup.1, together with R.sup.2, may form a halogen-substituted benzylidene group or a cyclohexyl-methylidene group, andR.sup.3 represents a tert-butyl group or a phenyl group substituted by a halogen atom.
    Type: Grant
    Filed: December 16, 1985
    Date of Patent: November 11, 1986
    Assignee: Nihon Tokushu Noyaku Seizo K. K.
    Inventors: Junichi Saito, Yoshio Kurahashi, Toshio Goto, Naoko Yamaguchi
  • Patent number: 4552586
    Abstract: 2-Pyridyloxyacetanilides of the formula ##STR1## in which X is hydrogen, C.sub.1 -C.sub.4 alkyl or C.sub.1 -C.sub.4 halogenoalkyl,Y each independently is halogen, C.sub.1 -C.sub.4 alkyl, C.sub.1 -C.sub.4 alkoxy or C.sub.1 -C.sub.4 halogenoalkyl, andn is 0, 1, 2 or 3which possess herbicidal and plant-growth regulating activity.
    Type: Grant
    Filed: November 17, 1983
    Date of Patent: November 12, 1985
    Assignee: Nihon Tokushu Noyaku Seizo K.K.
    Inventors: Masahiro Aya, Junichi Saito, Kazuomi Yasui, Shinzo Kagabu, Atsumi Kamochi, Naoko Yamaguchi
  • Patent number: 4391629
    Abstract: 2-Pyridyloxyacetanilides of the formula ##STR1## in which X is hydrogen, halogen, C.sub.1 -C.sub.4 alkyl or C.sub.1 -C.sub.4 halogenoalkyl,R is C.sub.1 -C.sub.4 alkyl,Y each independently is halogen, C.sub.1 -C.sub.4 alkyl, C.sub.1 -C.sub.4 alkoxy or C.sub.1 -C.sub.4 halogenoalkyl, andn is 0, 1, 2 or 3which possess herbicidal and plant-growth regulating activity.
    Type: Grant
    Filed: January 21, 1982
    Date of Patent: July 5, 1983
    Assignee: Nihon Tokushu Noyaku Seizo K.K.
    Inventors: Masahiro Aya, Junichi Saito, Kazuomi Yasui, Shinzo Kakabu, Atsumi Kamochi, Naoko Yamaguchi