Patents by Inventor Naoya Kanda

Naoya Kanda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141895
    Abstract: In a screw compressor, on a bearing side relative to a discharge port of a compression chamber in a casing, an intermediate-pressure chamber to which an intermediate-pressure coolant is supplied from outside of the casing is provided in a high-pressure space surrounded by an outer cylinder and an intermediate cylinder of the casing and communicating with the discharge port, and the intermediate-pressure coolant has a temperature and a pressure that are lower than those of a coolant in the high-pressure space and higher than a coolant in a low-pressure space on a motor side relative to the discharge port in the casing. The intermediate-pressure chamber and the low-pressure space communicate with each other.
    Type: Application
    Filed: May 25, 2022
    Publication date: May 2, 2024
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takao MITSUI, Masahiro KANDA, Naoya MITSUNARI
  • Publication number: 20120024959
    Abstract: An RFID inlet by including: a base film; an antenna pattern formed on the base film; an insulation film layer formed on the antenna pattern and having a hole; an IC chip coupled to the antenna pattern inside the hole of the insulation film layer; and an underfill filled between the IC chip, the antenna, and the base film. The height of the IC chip top surface is at a higher level than the top surface of the insulation film layer, the underfill is formed between the IC chip and a wall surface of the hole of the insulation film layer.
    Type: Application
    Filed: March 31, 2011
    Publication date: February 2, 2012
    Inventors: Madoka MINAGAWA, Naoya KANDA, Isao SAKAMA, Shigeru SAGAWA, Daisuke SHIBATA
  • Patent number: 8035522
    Abstract: A circuit chip having a loop-shaped antenna coil on a main surface and a tag sheet having an antenna pattern on a main surface are prepared, and the circuit chip is mounted on the main surface of the tag sheet so as not to place over the antenna pattern. The circuit chip is placed closely to the antenna pattern, and at least the half of the main surface is desirably faced against the antenna pattern. Thus, signals and/or power can be securely exchanged between the circuit chip (or antenna coil) and the antenna pattern. Therefore, a high-performance and rigid RFID tag can be obtained by roughly aligning the circuit chip and the tag sheet.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: October 11, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Noriyuki Oroku, Naoya Kanda, Hidehiko Kando, Kouichi Uesaka
  • Patent number: 8009047
    Abstract: For protecting information stored in an RFID chip and ensuring its authenticity, radio communication between the RFID chip and an external terminal is positively interrupted when a seal type RFID tag including the RFID chip is peeled from an adherend, while ensuring solidity integrity when the RFID tag is put on the adherend. In the seal type RFID tag which includes the RFID chip fixed on a mounting surface of a base member having an adhesive layer applied thereto and which is put on the adherend by using the adhesive layer, an antenna formed on a main surface of the RFID chip is embedded in adhesive layers together with the RFID chip and an adhesive bonding strength between the antenna and the adhesive layer is made greater than a joining strength between the antenna and the RFID chip.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: August 30, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Naoya Kanda, Noriyuki Oroku
  • Patent number: 7969067
    Abstract: There is provided an ultrasound probe including a first substrate having a silicon substrate and an ultrasound transmit-receive element, an acoustic lens disposed over an upper surface of the first substrate, and a damping layer disposed under the first substrate, in which a second substrate is disposed between a lower surface of the first substrate and an upper surface of the damping layer, and the second substrate is made of a material having approximately the same linear expansion coefficient and acoustic impedance as the silicon substrate of the first substrate. With this structure, it is possible to provide the ultrasound probe which can prevent damage to the silicon substrate due to temperature change and has excellent transmission/reception performance and structure reliability while reducing noise by reflected waves in transmission and reception.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: June 28, 2011
    Assignee: Hitachi Medical Corporation
    Inventors: Takanori Aono, Tatsuya Nagata, Katsunori Asafusa, Takashi Kobayashi, Naoya Kanda
  • Patent number: 7754581
    Abstract: A method for manufacturing a semiconductor device includes the steps of forming first and second semiconductor wafers each including an array of chips and elongate electrodes, forming a groove on scribe lines separating the chips from one another; coating a surface of one of the semiconductor wafers with adhesive; bonding together the semiconductor wafers while allowing the groove to receive therein excessive adhesive; and heating the wafers to connect the elongate electrodes of both the semiconductor wafers.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: July 13, 2010
    Assignee: Elpida Memory, Inc.
    Inventors: Hiroaki Ikeda, Masakazu Ishino, Hiroyuki Tenmei, Naoya Kanda, Yasuhiro Naka, Kunihiko Nishi
  • Patent number: 7615870
    Abstract: Cut pieces of a flexible tape respectively having positioning holes are superposed on a substrate having positioning holes, while positioning the substrate and the cut pieces by inserting a positioning pin into the positioning holes respectively, so that one side of the substrate faces one side of the cut pieces. Subsequently, internal terminals provided on the substrate are ultrasonically joined with internal terminals provided on the cut pieces by pressing an ultrasonic tool from the other side of the cut pieces. As a result, connection between these can be performed highly accurately. Further, since the internal terminals are ultrasonically joined with each other, operation time does not increase in proportion to the number of terminals, as in the connection using a bonding wire, and misregistration due to heat does not occur. Accordingly, connections between circuit boards are performed efficiently, highly accurately, and reliably.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: November 10, 2009
    Assignee: Elpida Memory, Inc.
    Inventors: Masanori Shibamoto, Masahiro Yamaguchi, Naoya Kanda
  • Publication number: 20090096583
    Abstract: For protecting information stored in an RFID chip and ensuring its genuineness, radio communication between the RFID chip and an external terminal is positively intercepted when a seal type RFID tag including the RFID chip is peeled from an adherend, while ensuring solidity when the RFID tag is put on the adherend. In the seal type RFID tag which includes the RFID chip fixed on a mounting surface of a base member having an adhesive layer applied thereto and which is put on the adherend by using the adhesive layer, an antenna formed on a main surface of the RFID chip is embedded in adhesive layers together with the RFID chip and an adhesive bonding strength between the antenna and the adhesive layer is made greater than a joining strength between the antenna and the RFID chip.
    Type: Application
    Filed: September 16, 2008
    Publication date: April 16, 2009
    Inventors: Naoya Kanda, Noriyuki Oroku
  • Publication number: 20090079574
    Abstract: A circuit chip having a loop-shaped antenna coil on a main surface and a tag sheet having an antenna pattern on a main surface are prepared, and the circuit chip is mounted on the main surface of the tag sheet so as not to place over the antenna pattern. The circuit chip is placed closely to the antenna pattern, and at least the half of the main surface is desirably faced against the antenna pattern. Thus, signals and/or power can be securely exchanged between the circuit chip (or antenna coil) and the antenna pattern. Therefore, a high-performance and rigid RFID tag can be obtained by roughly aligning the circuit chip and the tag sheet.
    Type: Application
    Filed: September 19, 2008
    Publication date: March 26, 2009
    Inventors: Noriyuki Oroku, Naoya Kanda, Hidehiko Kando, Kouichi Uesaka
  • Publication number: 20090069688
    Abstract: There is provided an ultrasound probe including a first substrate having a silicon substrate and an ultrasound transmit-receive element, an acoustic lens disposed over an upper surface of the first substrate, and a damping layer disposed under the first substrate, in which a second substrate is disposed between a lower surface of the first substrate and an upper surface of the damping layer, and the second substrate is made of a material having approximately the same linear expansion coefficient and acoustic impedance as the silicon substrate of the first substrate. With this structure, it is possible to provide the ultrasound probe which can prevent damage to the silicon substrate due to temperature change and has excellent transmission/reception performance and structure reliability while reducing noise by reflected waves in transmission and reception.
    Type: Application
    Filed: November 14, 2006
    Publication date: March 12, 2009
    Applicant: HITACHI MEDICAL CORPORATION
    Inventors: Takanori Aono, Tatsuya Nagata, Katsunori Asafusa, Takashi Kobayashi, Naoya Kanda
  • Patent number: 7413130
    Abstract: A RFID tag including: a paper-like structure inlaying a RFID thread between a first paper layer and a second paper layer, the RFID thread being connected to a RFID chip through bumps to an antenna arranged onto a base member and being formed with a protecting material provided with a window at a position in which the RFID chip corresponds; wherein a height of an upper surface of the protecting material is larger than a height of an upper surface of the RFID chip.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: August 19, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Kosuke Inoue, Naoya Kanda, Hiroshi Honma
  • Publication number: 20080185729
    Abstract: A semiconductor device is provided with a film substrate that has through-vias that are formed by filling a conductive material in through-holes that pass through the front and rear of a film-shaped substrate body and wiring or terminals that connect to the through-vias, with a semiconductor element being mounted on the film-shaped substrate body by terminal members thereof being electrically connected to the wiring or terminals of the film substrate.
    Type: Application
    Filed: January 30, 2008
    Publication date: August 7, 2008
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Masahiro Yamaguchi, Naoya Kanda, Yasuo Amano, Shigeharu Tsunoda
  • Publication number: 20080164575
    Abstract: A method for manufacturing a semiconductor device includes the steps of forming first and second semiconductor wafers each including an array of chips and elongate electrodes, forming a groove on scribe lines separating the chips from one another; coating a surface of one of the semiconductor wafers with adhesive; bonding together the semiconductor wafers while allowing the groove to receive therein excessive adhesive; and heating the wafers to connect the elongate electrodes of both the semiconductor wafers.
    Type: Application
    Filed: December 14, 2007
    Publication date: July 10, 2008
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Hiroaki Ikeda, Masakazu Ishino, Hiroyuki Tenmei, Naoya Kanda, Yasuhiro Naka, Kunihiko Nishi
  • Publication number: 20070194135
    Abstract: A RFID tag including: a paper-like structure inlaying a RFID thread between a first paper layer and a second paper layer, the RFID thread being connected to a RFID chip through bumps to an antenna arranged onto a base member and being formed with a protecting material provided with a window at a position in which the RFID chip corresponds; wherein a height of an upper surface of the protecting material is larger than a height of an upper surface of the RFID chip.
    Type: Application
    Filed: February 22, 2007
    Publication date: August 23, 2007
    Inventors: Kosuke Inoue, Naoya Kanda, Hiroshi Honma
  • Patent number: 7190072
    Abstract: When an RFID-tag is formed by joining a semiconductor chip (RFID chip) to an antenna consisting of a rolled metal foil or the like using ultrasonic waves, the pressure impressed to the semiconductor chip is suppressed to avoid the damage of the semiconductor chip. For this purpose, the present invention provides an RFID-tag 1 wherein gold bumps are joined to the metal foil by pressing the gold bumps formed on the semiconductor chip against an antenna member, and impressing ultrasonic waves; and the RFID-tag wherein a matte surface having a low glossiness is formed on the metal foil, or a surface having shallow rolling streaks is formed on the metal foil, and gold bumps are joined to the surface.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: March 13, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Naoya Kanda, Madoka Minagawa, Kosuke Inoue, Hiroshi Homma
  • Patent number: 7185823
    Abstract: A paper-like RFID tag is fabricated by bonding bumps of an RFID chip to an antenna to connect the chip to the antenna, the antenna being formed by a metal foil bonded onto a base film or a base tape, providing a protecting material around the RFID chip so that an upper surface becomes higher than that of the RFID chip, to constitute an RFID thread, and inlaying the RFID thread in between first and second paper layers to afford a paper-like structure. The thickness of the paper-like RFID tag fabricated as above is 0.1 mm or less. Further, the paper-like RFID tag is of high quality and has a surface smoothness almost equal to that of the ordinary type of paper, permitting a long-distance communication.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: March 6, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kosuke Inoue, Naoya Kanda, Hiroshi Honma
  • Publication number: 20070007344
    Abstract: In an RFID (radio frequency identification) tag comprising an antenna formed of a conductive paste containing conductive filler like silver flakes on a base member, and an RFID chip connected to the antenna, the present invention cures a pattern of the antenna formed of the conductive paste, and then connects the RFID chip to the antenna with thermoplastic resin contained in the conductive paste by heating bump electrodes of the RFID chip in contact with the antenna. According to the present invention, Since the bump electrodes of the RFID chip and the antenna are connected to each other and establish sufficient electrical conduction therebetween without providing an anisotropic conductive sheet or the like therebetween, a highly reliable RFID tag is supplied at a low cost.
    Type: Application
    Filed: July 3, 2006
    Publication date: January 11, 2007
    Inventors: Kosuke Inoue, Hiroshi Homma, Hitoshi Odashima, Naoya Kanda, Kie Ueda
  • Patent number: 7141451
    Abstract: A highly reliable inexpensive RFID medium (Radio-frequency Identification medium) and a method of manufacturing the same is provided, particularly for small, thin RFID mediums. A RFID medium includes a transmitting/receiving antenna 2 and an IC chip 3. A rectangular part of a base sheet 1, having a major surface on which transmitting/receiving antennas 2 are formed, is folded along one of the long sides thereof, and the other three sides are bonded to the base sheet 1 so as to cover the transmitting/receiving antenna 2 and the IC chip 3 connected to the transmitting/receiving antenna 2. The base sheet 1 has spacing parts of a predetermined shape for covering the transmitting/receiving antenna 2 and the IC chip 3 connected to the transmitting/receiving antenna 2. The transmitting/receiving antennas 2 and the spacing parts 22 are arranged alternately. The base sheet 1 is rolled in a roll.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: November 28, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Shigeharu Tsunoda, Naoya Kanda
  • Publication number: 20060249829
    Abstract: A stacked type semiconductor device comprising: a baseboard having a terminal row formed at an end in which connecting terminals is arranged linearly and having a wiring pattern connected to the connecting terminals and external terminals; semiconductor chips having a pad row in which pads is arranged linearly in parallel to the terminal row and being stacked on the baseboard; and interposer boards having a wiring layer including a plurality of wires arranged in parallel with the same length for connecting between pads of the pad row and connecting terminals of the terminal row.
    Type: Application
    Filed: April 7, 2006
    Publication date: November 9, 2006
    Inventors: Mitsuaki Katagiri, Masanori Shibamoto, Tsutomu Hara, Koichiro Aoki, Naoya Kanda, Shuji Kikuchi, Hisashi Tanie
  • Publication number: 20060244121
    Abstract: Cut pieces of a flexible tape respectively having positioning holes are superposed on a substrate having positioning holes, while positioning the substrate and the cut pieces by inserting a positioning pin into the positioning holes respectively, so that one side of the substrate faces one side of the cut pieces. Subsequently, internal terminals provided on the substrate are ultrasonically joined with internal terminals provided on the cut pieces by pressing an ultrasonic tool from the other side of the cut pieces. As a result, connection between these can be performed highly accurately. Further, since the internal terminals are ultrasonically joined with each other, operation time does not increase in proportion to the number of terminals, as in the connection using a bonding wire, and misregistration due to heat does not occur. Accordingly, connections between circuit boards are performed efficiently, highly accurately, and reliably.
    Type: Application
    Filed: April 28, 2006
    Publication date: November 2, 2006
    Inventors: Masanori Shibamoto, Masahiro Yamaguchi, Naoya Kanda