Abstract: An adaptive gate drive circuit that can generate a gate bias voltage with temperature compensation for a MOSFET is disclosed. The adaptive gate drive circuit may generate the gate bias voltage with variable drive capability to combat higher gate leakage current of the MOSFET at higher temperature. In one design, an apparatus includes a control circuit and a gate drive circuit. The control circuit generates at least one control signal having a variable frequency determined based on a sensed temperature of the MOSFET. For example, a clock divider ratio may be determined based on the sensed temperature of the MOSFET, an input clock signal may be divided based on the clock divider ratio to obtain a variable clock signal, and the control signal(s) may be generated based on the variable clock signal. The gate drive circuit generates a bias voltage for the MOSFET based on the control signal(s).

Abstract: We provide a process for treatment of produced water, including but not limited to water produced by a “steam flood” process for extraction of oil from oil sands, including the removal of color from the water. This removal may be accomplished through addition of color-removal polymers and flocculents. This process may also be useful for other water treatment processes including reverse osmosis and filtration.

Abstract: We provide a process for the neutralization and precipitation of high pH brines that eliminates the formation of “gelatinous silica” during neutralization. The high pH brine is neutralized in a two-step neutralization process. In the first step the salt concentration of a high pH brine is built up to a minimum level of 8-12%, and then its pH is reduced to 9-9.5. The partially neutralized brine is allowed a reaction period with mild agitation. Subsequently the pH is further reduced, typically to 8-9. A coagulant and/or a polymer can also be used to enhance the settling or filtration rate of the neutralized stream.

Abstract: A mobile node includes a processor, a network interface, and a storage device having computer program code for execution by the processor. The computer program code includes a network layer for transmitting and receiving packets and an intermediate driver that transmits packets to the network layer and receives packets from the network layer using a virtual interne protocol (IP) address to identify the mobile node. The intermediate driver transmits packets to the network interface and receives packets from the network interface using a routable actual IP address to identify the mobile node. The intermediate driver permits the actual IP address to change when the mobile node moves from a first subnet to a second subnet without a corresponding change in the virtual IP address. A corresponding NAT associates the virtual IP address with a second actual IP address when the NAT is notified that the mobile node is in the second subnet.

Abstract: A method and apparatus is provided that includes techniques for providing complete solutions for role-based, rules-driven access enforcement, the techniques including situational awareness and video surveillance. An embodiment addresses blended risk assessment and security across logical systems, IT applications, databases, and physical systems from a single analytic dashboard, with auto-remediation capabilities. Further, an embodiment provides capability and functionality for co-relating seemingly innocent events and activities to detect real threats and risks, while providing powerful alerting and automated remedial action strategies for decisive action.

Abstract: We report an electro-deionization (EDI) device having split flow arrangement for the purification of second pass RO permeate water with high flow rate in which the feed water is fed through the center port and is diverted into each section of dilute chamber with equal flow rate, producing two product streams. The EDI device has concentrate chambers adjacent to dilute chambers in two sections of the stack, allowing independent flow through the separate sections. The split flow design reduces resin bed depth requirement for processing of second pass RO permeate water. This results in higher flow rate through the stack, elimination of the pressure drop limitation, and reduction of power consumption per unit volume of water.

Abstract: Disclosed herein are recombinant tobacco osmotin polypeptides and methods for expressing tobacco osmotin polypeptides in microbial host cells. The recombinant tobacco osmotin polypeptides produced by the methods disclosed herein may be utilized as biocides or as therapeutic agents in medicaments.

Abstract: A method for manufacturing an isolation structure is disclosed that protects the isolation structure during etching of a dichlorosilane (DCS) nitride layer. The method involves the formation of a bis-(t-butylamino)silane-based nitride liner layer within the isolation trench, which exhibits a five-fold greater resistance to nitride etching solutions as compared with DCS nitride, thereby allowing protection against damage from unintended over-etching. The bis-(t-butylamino)silane-based nitride layer also exerts a greater tensile strain on moat regions that results in heightened carrier mobility of active regions, thereby increasing the performance of NMOS transistors embedded therein.

Abstract: The present invention provides a method for manufacturing a semiconductor device as well as a semiconductor device. The method, among other steps, may include forming a gate structure over a substrate, and forming a strain inducing sidewall spacer proximate a sidewall of the gate structure, the strain inducing sidewall configured to introduce strain in a channel region below the gate structure.

Abstract: A method for fabricating a transistor on a semiconductor wafer includes providing a partial transistor containing a gate stack, extension regions, and source/drain sidewalls. The method also includes performing a source/drain implant of the semiconductor wafer, forming a cap layer over the semiconductor wafer, and performing a source/drain anneal. In addition, the method includes performing a damage implant of the cap layer and removing the cap layer over the semiconductor wafer.

Abstract: A method for semiconductor processing is provided, wherein a removal of one or more layers is aided by structurally weakening the one or more layers via ion implantation. A semiconductor substrate is provided having one or more primary layers formed thereon, and a secondary layer is formed over the one or more primary layers. One or more ion species are implanted into the secondary layer, therein structurally weakening the secondary layer, and a patterned photoresist layer is formed over the secondary layer. Respective portions of the secondary layer and the one or more primary layers that are not covered by the patterned photoresist layer are removed, and the patterned photoresist layer is further removed. At least another portion of the secondary layer is removed, wherein the structural weakening of the secondary layer increases a removal rate of the at least another portion of the secondary layer.

Abstract: This invention presents an ion exchange media including a plurality of cation exchange zones and anion exchange zones in flow paths that are contained in a substantially nonporous resin transport framework. During electrodeionization and other potential applications the ion exchange media of the invention prevents unfavorable water splitting at resin-membrane interfaces and encourages water splitting at resin-resin interfaces where the water splitting may be constructively used to regenerate the resin.

Abstract: A method of manufacturing a semiconductor device including calibrating an ion implant process. The calibration includes forming a dielectric layer over a calibration substrate. A dopant is implanted into the dielectric layer. Charge is deposited on a surface of the dielectric layer, and voltage on the surface is measured. An electrical characteristic of the dielectric layer is determined, and a doping level of the dielectric layer is determined from the electrical characteristic. The electrical characteristic is associated with an operating set-point of the ion implant process. The calibrated ion implant process is used to implant the dopant into a semiconductor substrate.

Abstract: A mobile node includes a processor, a network interface, and a storage device having computer program code for execution by the processor. The computer program code includes a network layer for transmitting and receiving packets and an intermediate driver that transmits packets to the network layer and receives packets from the network layer using a virtual interne protocol (IP) address to identify the mobile node. The intermediate driver transmits packets to the network interface and receives packets from the network interface using a routable actual IP address to identify the mobile node. The intermediate driver permits the actual IP address to change when the mobile node moves from a first subnet to a second subnet without a corresponding change in the virtual IP address. A corresponding NAT associates the virtual IP address with a second actual IP address when the NAT is notified that the mobile node is in the second subnet.

Abstract: A mobile node includes a processor, a network interface, and a storage device having computer program code for execution by the processor. The computer program code includes a network layer for transmitting and receiving packets and an intermediate driver that transmits packets to the network layer and receives packets from the network layer using a virtual internet protocol (IP) address to identify the mobile node. The intermediate driver transmits packets to the network interface and receives packets from the network interface using a routable actual IP address to identify the mobile node. The intermediate driver permits the actual IP address to change when the mobile node moves from a first subnet to a second subnet without a corresponding change in the virtual IP address. A corresponding NAT associates the virtual IP address with a second actual IP address when the NAT is notified that the mobile node is in the second subnet.

Abstract: A method for semiconductor processing is provided, wherein a removal of one or more layers is aided by structurally weakening the one or more layers via ion implantation. A semiconductor substrate is provided having one or more primary layers formed thereon, and a secondary layer is formed over the one or more primary layers. One or more ion species are implanted into the secondary layer, therein structurally weakening the secondary layer, and a patterned photoresist layer is formed over the secondary layer. Respective portions of the secondary layer and the one or more primary layers that are not covered by the patterned photoresist layer are removed, and the patterned photoresist layer is further removed. At least another portion of the secondary layer is removed, wherein the structural weakening of the secondary layer increases a removal rate of the at least another portion of the secondary layer.

Abstract: An embodiment generally relates a method of processing semiconductor devices. The method includes forming a semiconductor device and exposing the semiconductor device to a temperature substantially between 1175 to 1375 degrees Celsius after the formation of a gate dielectric layer. The method also includes annealing the semiconductor device for a period of time.

Abstract: A semiconductor device includes source/drain regions formed in a substrate and having a concentration of nitrogen of at least about 5E18 cm?3. A gate dielectric is located over the substrate and between the source/drain regions. Gate sidewall spacers are located over said source/drain regions. A nitrogen-doped electrode including polysilicon is located over the gate dielectric. The electrode has a concentration of nitrogen therein greater than the concentration of nitrogen in the source/drain regions.

Abstract: A mobile node includes a processor, a network interface, and a storage device having computer program code for execution by the processor. The computer program code includes a network layer for transmitting and receiving packets and an intermediate driver that transmits packets to the network layer and receives packets from the network layer using a virtual internet protocol (IP) address to identify the mobile node. The intermediate driver transmits packets to the network interface and receives packets from the network interface using a routable actual IP address to identify the mobile node. The intermediate driver permits the actual IP address to change when the mobile node moves from a first subnet to a second subnet without a corresponding change in the virtual IP address. A corresponding NAT associates the virtual IP address with a second actual IP address when the NAT is notified that the mobile node is in the second subnet.

Abstract: A method for fabricating a transistor on a semiconductor wafer includes providing a partial transistor containing a gate stack, extension regions, and source/drain sidewalls. The method also includes performing a source/drain implant of the semiconductor wafer, forming a cap layer over the semiconductor wafer, and performing a source/drain anneal. In addition, the method includes performing a damage implant of the cap layer and removing the cap layer over the semiconductor wafer.