Patents by Inventor Naveen Muralimanohar

Naveen Muralimanohar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8108718
    Abstract: One embodiment is a method that performs a local checkpoint at a processing node in a massively parallel processing (MPP) system that executes a workload with a plurality of processing nodes. The local checkpoint is stored in local memory of the processing node. While the workload continues to execute, a global checkpoint is performed from the local checkpoint stored in the local memory.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: January 31, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Naveen Muralimanohar, Norman Paul Jouppi
  • Publication number: 20120017065
    Abstract: A system and method that includes a memory die, residing on a stacked memory, which is organized into a plurality of mats that include data. The system and method also includes an additional memory die, residing on the stacked memory, that is organized into an additional plurality of mats and connected to the memory die by a Through Silicon Vias (TSVs), the data to be transmitted along the TSVs.
    Type: Application
    Filed: November 13, 2009
    Publication date: January 19, 2012
    Inventor: Naveen Muralimanohar
  • Publication number: 20110246828
    Abstract: A system and method is shown that includes a processor operatively connected to a memory, the processor to include a memory controller to control access to the memory. The system and method also includes a service processor, co-located on a common board and operatively connected to the processor and the memory, the service processor to include an additional memory controller to control access to the memory as part of a checkpoint regime.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Inventors: Matteo Monchiero, Naveen Muralimanohar, Partha Ranganathan
  • Publication number: 20110119525
    Abstract: One embodiment is a method that performs a local checkpoint at a processing node in a massively parallel processing (MPP) system that executes a workload with a plurality of processing nodes. The local checkpoint is stored in local memory of the processing node. While the workload continues to execute, a global checkpoint is performed from the local checkpoint stored in the local memory.
    Type: Application
    Filed: November 13, 2009
    Publication date: May 19, 2011
    Inventors: Naveen Muralimanohar, Norman Paul Jouppi
  • Patent number: 7478190
    Abstract: A method for utilizing heterogeneous interconnects comprising wires of varying latency, bandwidth and energy characteristics to improve performance and reduce energy consumption by dynamically routing traffic in a processor environment.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: January 13, 2009
    Assignee: University of Utah Technology Commercialization Office
    Inventors: Rajeev Balasubramonian, Liqun Cheng, John Carter, Naveen Muralimanohar, Karthik Ramani
  • Publication number: 20070192541
    Abstract: A method for utilizing heterogeneous interconnects comprising wires of varying latency, bandwidth and energy characteristics to improve performance and reduce energy consumption by dynamically routing traffic in a processor environment.
    Type: Application
    Filed: February 10, 2006
    Publication date: August 16, 2007
    Inventors: Rajeev Balasubramonian, Liqun Cheng, John Carter, Naveen Muralimanohar, Karthik Ramani