Patents by Inventor Neal R. Rueger
Neal R. Rueger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7718080Abstract: Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a plasma source to provide an increased reactive species density. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation. In one example an electron beam array such as a carbon nanotube array is used to selectively expose a surface during a processing operation.Type: GrantFiled: August 14, 2006Date of Patent: May 18, 2010Assignee: Micron Technology, Inc.Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu
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Publication number: 20100051577Abstract: The present disclosure includes devices, methods, and systems for processing copper and, in particular, copper layer processing using sulfur plasma, One or more embodiments can include a method of forming a copper sulfur compound by reacting copper with a plasma gas including sulfur and removing at least a portion of the copper sulfur compound with water.Type: ApplicationFiled: September 3, 2008Publication date: March 4, 2010Applicant: Micron Technology, Inc.Inventor: Neal R. Rueger
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Patent number: 7662648Abstract: Methods and systems that include a nanotube used as an emitter in the testing and fabrication of integrated circuits. The nanotube emits a signal to a substrate. Based on the signal or the electrical properties, e.g., current induced in the substrate by the signal, the region of the substrate is characterized. The characterization includes topology of the region of the substrate such as determining whether a recess in the substrate has a proper depth or other dimensions or characteristics of the substrate.Type: GrantFiled: August 31, 2005Date of Patent: February 16, 2010Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, Neal R. Rueger
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Patent number: 7632737Abstract: A method including, prior to a plasma heat-up operation, forming a liner on structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.Type: GrantFiled: July 17, 2006Date of Patent: December 15, 2009Assignee: Micron Technology, Inc.Inventors: Neal R. Rueger, William Budge, Weimin Li
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Patent number: 7628855Abstract: Formation of a layer of material on a surface by atomic layer deposition methods and systems includes using electron bombardment of the chemisorbed precursor.Type: GrantFiled: February 9, 2007Date of Patent: December 8, 2009Assignee: Micron Technology, Inc.Inventor: Neal R. Rueger
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Publication number: 20090288603Abstract: Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a plasma source to provide an increased reactive species density. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation.Type: ApplicationFiled: August 3, 2009Publication date: November 26, 2009Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu
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Publication number: 20090258492Abstract: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.Type: ApplicationFiled: June 22, 2009Publication date: October 15, 2009Applicant: MICRON TECHNOLOGY, INC.Inventors: Sanket Sant, Gurtej Sandhu, Neal R. Rueger
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Publication number: 20090215253Abstract: The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer.Type: ApplicationFiled: August 22, 2008Publication date: August 27, 2009Inventors: Gurtej S. Sandhu, John T. Moore, Neal R. Rueger
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Patent number: 7569484Abstract: Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a plasma source to provide an increased reactive species density. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation.Type: GrantFiled: August 14, 2006Date of Patent: August 4, 2009Assignee: Micron Technology, Inc.Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu
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Patent number: 7560390Abstract: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.Type: GrantFiled: June 2, 2005Date of Patent: July 14, 2009Assignee: Micron Technology, Inc.Inventors: Sanket Sant, Gurtej Sandhu, Neal R. Rueger
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Patent number: 7494894Abstract: A method including, prior to a plasma heat-up operation, forming a liner on a structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.Type: GrantFiled: August 29, 2002Date of Patent: February 24, 2009Assignee: Micron Technology, Inc.Inventors: Neal R. Rueger, William Budge, Weimin Li
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Publication number: 20080314149Abstract: Devices usable as sensors, as transducers, or as both sensors and transducers include one or more nanotubes or nanowires. In some embodiments, the devices may each include a plurality of sensor/transducer devices carried by a common substrate. The sensor/transducer devices may be individually operable, and may exhibit a plurality of resonant frequencies to enhance the operable frequency bandwidth of the devices. Sensor/transducer devices include one or more elements configured to alter a resonant frequency of a nanotube. Such elements may be selectively and individually actuable. Methods for sensing mechanical displacements and vibrations include monitoring an electrical characteristic of a nanotube. Methods for generating mechanical displacements and vibrations include using an electrical signal to induce mechanical displacements or vibrations in one or more nanotubes.Type: ApplicationFiled: June 25, 2007Publication date: December 25, 2008Applicant: MICRON TECHNOLOGY, INC.Inventor: Neal R. Rueger
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Patent number: 7459757Abstract: The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer.Type: GrantFiled: January 15, 2002Date of Patent: December 2, 2008Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, John T. Moore, Neal R. Rueger
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Publication number: 20080274622Abstract: A plasma processing method includes providing a substrate in a processing chamber, the substrate having a surface, and generating a plasma in the processing chamber. The plasma provides at least two regions that exhibit different plasma densities. The method includes exposing at least some of the surface to both of the at least two regions. Exposing the surface to both of the at least two regions may include rotating the plasma and may cyclically expose the surface to the plasma density differences. Exposing to both of the at least two regions may modify a composition and/or structure of the surface. The plasma may include a plasmoid characterized by a steady state plasma wave providing multiple plasma density lobes uniformly distributed about an axis of symmetry and providing plasma between the lobes exhibiting lower plasma densities. Depositing the layer can include ALD and exposure may remove an ALD precursor ligand.Type: ApplicationFiled: June 6, 2008Publication date: November 6, 2008Inventor: Neal R. Rueger
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Patent number: 7432166Abstract: The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer.Type: GrantFiled: January 15, 2002Date of Patent: October 7, 2008Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, John T. Moore, Neal R. Rueger
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Patent number: 7402526Abstract: A plasma processing method includes providing a substrate in a processing chamber, the substrate having a surface, and generating a plasma in the processing chamber. The plasma provides at least two regions that exhibit different plasma densities. The method includes exposing at least some of the surface to both of the at least two regions. Exposing the surface to both of the at least two regions may include rotating the plasma and may cyclically expose the surface to the plasma density differences. Exposing to both of the at least two regions may modify a composition and/or structure of the surface. The plasma may include a plasmoid characterized by a steady state plasma wave providing multiple plasma density lobes uniformly distributed about an axis of symmetry and providing plasma between the lobes exhibiting lower plasma densities. Depositing the layer can include ALD and exposure may remove an ALD precursor ligand.Type: GrantFiled: July 24, 2006Date of Patent: July 22, 2008Assignee: Micron Technology, Inc.Inventor: Neal R. Rueger
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Publication number: 20080143230Abstract: The present disclosure includes field emission device embodiments. The present disclosure also includes method embodiments for forming field emitting devices. One device embodiment includes a housing defining an interior space including a lower portion and an upper portion, a cathode positioned in the lower portion of the housing, a elongate nanostructure coupled to the cathode, an anode positioned in the upper portion of the housing, and a control grid positioned between the elongate nanostructure and the anode to control electron flow between the anode and the elongate nanostructure.Type: ApplicationFiled: December 18, 2006Publication date: June 19, 2008Inventor: Neal R. Rueger
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Patent number: 7344948Abstract: The invention encompasses a method of incorporating nitrogen into a silicon-oxide-containing layer. The silicon-oxide-containing layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer. The nitrogen is subsequently thermally annealed within the layer to bond at least some of the nitrogen to silicon within the layer. The invention also encompasses a method of forming a transistor. A gate oxide layer is formed over a semiconductive substrate. The gate oxide layer comprises silicon dioxide. The gate oxide layer is exposed to a nitrogen-containing plasma to introduce nitrogen into the layer, and the layer is maintained at less than or equal to 400° C. during the exposing. Subsequently, the nitrogen within the layer is thermally annealed to bond at least a majority of the nitrogen to silicon. At least one conductive layer is formed over the gate oxide layer.Type: GrantFiled: January 15, 2002Date of Patent: March 18, 2008Assignee: Micron Technology, Inc.Inventors: Gurtej S. Sandhu, John T. Moore, Neal R. Rueger
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Publication number: 20080038863Abstract: Methods and apparatus may operate to position a sample, including an imager lens surface, within a processing chamber. Further activities may include creating a layer of reactive material in proximity with the imager lens surface, and exciting a portion of the layer of reactive material in proximity with the imager lens surface to form chemical radicals. Additional activities may include removing a portion of the material in proximity to the excited portion of the imager lens surface to a predetermined level, and continuing the creating, exciting and removing actions until at least one of a plurality of stop criteria occurs.Type: ApplicationFiled: August 14, 2006Publication date: February 14, 2008Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu, Justin R. Arrington
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Publication number: 20080038894Abstract: Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a plasma source to provide an increased reactive species density. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation. In one example an electron beam array such as a carbon nanotube array is used to selectively expose a surface during a processing operation.Type: ApplicationFiled: August 14, 2006Publication date: February 14, 2008Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu