Patents by Inventor Nicholas Rizzo

Nicholas Rizzo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060087880
    Abstract: A magnetic random access memory (“MRAM”) device can be selectively written using spin-transfer reflection mode techniques. Selectivity of a designated MRAM cell within an MRAM array is achieved by the dependence of the spin-transfer switching current on the relative angle between the magnetizations of the polarizer element and the free magnetic element in the MRAM cell. The polarizer element has a variable magnetization that can be altered in response to the application of a current, e.g., a digit line current. When the magnetization of the polarizer element is in the natural default orientation, the data in the MRAM cell is preserved. When the magnetization of the polarizer element is switched, the data in the MRAM cell can be written in response to the application of a relatively low write current.
    Type: Application
    Filed: October 22, 2004
    Publication date: April 27, 2006
    Inventors: Frederick Mancoff, Bradley Engel, Nicholas Rizzo
  • Publication number: 20050263400
    Abstract: A method of fabricating a cladding region for use in MRAM devices includes the formation of a conductive bit line proximate to a magnetoresistive memory device. The conductive bit line is immersed in a first bath containing dissolved ions of a first conductive material for a time sufficient to displacement plate a first barrier layer on the conductive line. The first barrier layer is then immersed in an electroless plating bath to form a flux concentrating layer on the first barrier layer. The flux concentrating layer is immersed in a second bath containing dissolved ions of a second conductive material for a time sufficient to displacement plate a second barrier layer on the flux concentrating layer.
    Type: Application
    Filed: May 26, 2005
    Publication date: December 1, 2005
    Inventors: Jaynal Molla, John D'Urso, Kelly Kyler, Bradley Engel, Gregory Grynkewich, Nicholas Rizzo
  • Publication number: 20050158992
    Abstract: A method for fabricating a cladded conductor (42) for use in a magnetoelectronics device is provided. The method includes providing a substrate (10) and forming a conductive barrier layer (12) overlying the substrate (10). A dielectric layer (16) is formed overlying the conductive barrier layer (12) and a conducting line (20) is formed within a portion of the dielectric layer (16). The dielectric layer (16) is removed and a flux concentrator (30) is formed overlying the conducting line (20).
    Type: Application
    Filed: March 16, 2005
    Publication date: July 21, 2005
    Inventors: Mark Durlam, Jeffrey Baker, Brian Butcher, Mark Deherrera, John D'Urso, Earl Fuchs, Gregory Grynkewich, Kelly Kyler, Jaynal Molla, J. Ren, Nicholas Rizzo
  • Publication number: 20050153063
    Abstract: A nearly balanced synthetic antiferromagnetic (SAF) structure that can be advantageously used in magnetoelectronic devices such as a magnetoresistive memory cell includes two ferromagnetic layers and an antiferromagnetic coupling layer separating the two ferromagnetic layers. The SAF free layer has weakly coupled regions formed in the antiferromagnetic coupling layer by a treatment such as annealing, layering of the antiferromagnetic coupling layer, or forming the antiferromagnetic coupling layer over a roughened surface of a ferromagnetic layer. The weakly coupled regions lower the flop field of the SAF free layer in comparison to untreated SAF free layers. The SAF flop is used during the write operation of such a structure and its reduction results in lower power consumption during write operations and correspondingly increased device performance.
    Type: Application
    Filed: March 9, 2005
    Publication date: July 14, 2005
    Inventors: Jason Janesky, Bradley Engel, Nicholas Rizzo, Jon Slaughter
  • Publication number: 20050133822
    Abstract: Methods and apparatus are provided for testing a magnetoresistive random access memory (MRAM). A magnetoresistive tunnel junction (MTJ) has a first terminal, a second terminal, and a third terminal. A source measuring unit is coupled to a first terminal of a MTJ to provide DC biasing. A current preamp has an input coupled to a third terminal of the MTJ for receiving current corresponding to a resistance of the MTJ. A pulse generator is AC coupled to the MTJ for programming the MTJ. A method of insitu testing a MTJ in a manufacturing environment uses a probe station coupled to the MTJ. A probe station couples to the MTJ. The MTJ is DC biased for generating a current corresponding to the logic level stored in the MTJ. A pulse for programming the MTJ is AC coupled to the MTJ.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Inventors: Mark DeHerrera, Nicholas Rizzo