Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract: A contactor device comprising a plurality of probes disposed to contact ones of the electronic devices can be electrically connected to a source of test signals. A switch can be activated electrically connecting a connection to the source of test signals to a selected one of a first group of electrically connected ones of the probes disposed to contact a first set of a plurality of the electronic devices or a second group of electrically connected ones of the probes disposed to contact a second set of a plurality of the electronic devices.

Abstract: A probe for contacting and testing ICs on a semiconductor device includes a dielectric insulating material tip. The dielectric tip does not contaminate the surface being probed unlike metal probe tips. A contact scrub is further not required with signals being capacitively or inductively coupled from the probe tip to the IC. Testing can be performed during early fabrication steps of the wafer without the need for applying a metalization layer to the wafer to form bond pads. Testing can be performed by inductively coupling an AC signal to the probe tip, with coupling enhanced by including a magnetic material in the dielectric probe tip. Using an AC test signal enables testing of ICs without requiring separate power and ground connections.

Abstract: A probe card assembly can include a probe head assembly having probes for contacting an electronic device to be tested. The probe head assembly can be electrically connected to a wiring substrate and mechanically attached to a stiffener plate. The wiring substrate can provide electrical connections to a testing apparatus, and the stiffener plate can provide structure for attaching the probe card assembly to the testing apparatus. The stiffener plate can have a greater mechanical strength than the wiring substrate and can be less susceptible to thermally induced movement than the wiring substrate. The wiring substrate may be attached to the stiffener plate at a central location of the wiring substrate. Space may be provided at other locations where the wiring substrate is attached to the stiffener plate so that the wiring substrate can expand and contract with respect to the stiffener plate.

Abstract: A wafer test assembly includes multiple probe head substrates arranged like tiles with connectors attached to one side and probes supported on the opposing side. In one embodiment, flexible cable connectors directly connect the connectors on the probe head tile to a test head, while in another embodiment the flexible cables connect the probe head tile to a PCB providing horizontal routing to test head connectors. In one embodiment, leveling pins provide a simplified support structure connecting to a retaining element attached to the tiles to provide for applying a push-pull leveling force. A test head connector interface frame enables rearrangement of connectors between the test head and the probe card to provide for both full wafer contact or partial wafer contact. The test head connectors are rearranged by being slidable on rails, and unpluggable using pins, enabling movement over a range of positions.

Abstract: One or more testers wirelessly communicate with one or more test stations. The wireless communication may include transmission of test commands and/or test vectors to a test station, resulting in testing of one or more electronic devices at the test station. The wireless communication may also include transmission of test results to a tester. Messages may also be wirelessly exchanged.

Abstract: A base controller disposed in a test cassette receives test data for testing a plurality of electronic devices. The base controller wirelessly transmits the test data to a plurality of wireless test control chips, which write the test data to each of the electronic devices. The wireless test control chips then read response data generated by the electronic devices, and the wireless test control chips wirelessly transmit the response data to the base controller.

Abstract: A probe card assembly includes a printed circuit board with tester contacts for making electrical connections to a semiconductor tester. The probe card assembly also includes a probe head assembly with probes for contacting a semiconductor device under test. One or more daughter cards is mounted to the printed circuit board such that they are substantially coplanar with the printed circuit board. The daughter cards may contain a circuit for processing test data, including test signals to be input into the semiconductor and/or response signals generated by the semiconductor device in response to the test signals.

Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract: A probe card assembly includes a printed circuit board with tester contacts for making electrical connections to a semiconductor tester. The probe card assembly also includes a probe head assembly with probes for contacting a semiconductor device under test. One or more daughter cards is mounted to the printed circuit board such that they are substantially coplanar with the printed circuit board. The daughter cards may contain a circuit for processing test data, including test signals to be input into the semiconductor and/or response signals generated by the semiconductor device in response to the test signals.

Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract: In an integrated circuit assembly, know good die (KGD) are assembled on a substrate. Interconnect elements electrically connect pads on a die attached to the substrate to traces or other electrical conductors on the substrate or to pads on another die attached to the substrate. The substrate may have one or more openings, exposing pads of the die. The assembly may comprise one or more dice.

Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract: A probe card assembly includes a printed circuit board with tester contacts for making electrical connections to a semiconductor tester. The probe card assembly also includes a probe head assembly with probes for contacting a semiconductor device under test. One or more daughter cards is mounted to the printed circuit board such that they are substantially coplanar with the printed circuit board. The daughter cards may contain a circuit for processing test data, including test signals to be input into the semiconductor and/or response signals generated by the semiconductor device in response to the test signals.

Abstract: In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Abstract: A circuit for testing a semiconductor device, which has an oscillator for producing pulses when energized. A control circuit receives a test signal, a clock signal having pulses, and a reset signal, and energizes the oscillator for a predetermined length of time in response to the test signal. A counter detects the pulses produced by the oscillator, and produces counter signals which indicate the number of pulses detected by the counter. An output detector receives the counter signals and produces an output signal when the counter signals indicate that the number of pulses detected is equal to a predetermined number. However, the number of pulses produced by the oscillator during the predetermined length of time is preferably less than the predetermined number. The control circuit provides the clock signal to the counter after the predetermined length of time, until the output of the output detector indicates that the predetermined number of pulses has been detected.

Abstract: A semiconductor device is provided having a circuit for measuring a propagation delay related to metal layers formed on the device. In one embodiment, the circuit includes a first bond pad connected to an input of a first signal path, the first signal path including a first plurality of serially connected logic gates wherein the connection between each logic gate of the first plurality is formed on a first metal layer and a second bond pad connected to an output of a second signal path, the second signal path including a second plurality of serially connected logic gates wherein the connection between each logic gate of the second plurality is formed on a second metal layer, the second signal path being in electrical communication with the first signal path.

Abstract: A process is provided for use with a semiconductor testing apparatus having a vector generator which provides a sequence of vectors to a semiconductor device at a rate responsive to a timeset, a power supply which provides current to the semiconductor device and a current monitor which measures the current provided to the device. In one specific embodiment, the process includes setting the timeset to a first rate, conditioning the device by executing a plurality of vectors at the first rate, setting the timeset to a second rate, the second rate being slower than the first rate, and measuring the quiescent current while the timeset is set to the second rate.

Abstract: An apparatus for collecting photons emitted by hot spots in an integrated circuit. Means are provided for intermittently energizing the circuit. A photon receptor detects the photons emitted by the circuit, and produces a photon signal. A shutter, disposed between the circuit and the photon receptor, is opened by a controller when the circuit is not energized, and closed by the controller when the circuit is energized. By thus closing the shutter when the circuit is energized, the photon receptor is shielded from receiving the photons generated during the refresh cycle of the energized device, and is able to detect photons from a defect in the circuit over a period of time that is longer than the refresh rate of the circuit.