Abstract: A method for producing patterns in a layer to be etched, from a stack including at least the layer to be etched and a masking layer overlying the layer to be etched, with the masking layer having at least one pattern. The method includes modifying a first area of the layer to be etched by ion implantation through the masking layer; depositing a buffer layer to cover the pattern of the masking layer; modifying another area of the layer to be etched, different from the first area, by ion implantation through the buffer layer, to a depth of the layer to be etched greater than the implantation depth of the preceding step of modifying; removing the buffer layer; removing the masking layer; removing the modified areas by etching them selectively to the non-modified areas of the layer to be etched.

Abstract: A method is provided for producing at least one first transistor and at least one second transistor on the same substrate, including producing at least one first gate pattern and at least one second gate pattern on the substrate; depositing at least one first protective layer on the first and the second gate patterns; depositing, on the first and the second gate patterns, at least a first protective layer and a second protective layer overlying, the first protective layer, the second protective layer being made from a different material than that of the first protective layer; masking the second gate pattern by a masking layer; isotropic etching of the second protective layer; removing the masking layer; and anisotropic etching of the second protective layer selectively relative to the first protective layer.

Abstract: The method includes the steps of: a) providing a silicon substrate including a first portion covered by the mask made from a carbonaceous material and a second doped portion, the mask including, at the surface, a surface layer including implanted ionic species and an underlying layer free of implanted ionic species, b) exposing the surface layer and the second portion to a SiCl4 and Cl2 plasma so as to deposit a silicon chloride SiClx layer on the second portion and etch the surface layer, c) etching the underlying layer so as to expose the first portion, and d) etching the silicon chloride SiClx layer so as to expose the second portion.

Abstract: A method for producing a microelectronic device with one or more transistor(s) including forming a first gate on a region of a semiconductor layer, forming a first cavity in the semiconductor layer, the first cavity having a wall contiguous with the given region, filling the first cavity in such a way as to form a first semiconductor block wherein a source or drain region of the first transistor is capable of being produced, by epitaxial growth of a first semiconductor material in the first cavity, the growth being carried out such that a first zone of predetermined thickness of the layer of first semiconductor material lines the wall contiguous with the given region, epitaxial growth of a second zone made of a second semiconductor material on the first zone.

Abstract: A method for forming spacers of a gate of a field-effect transistor is provided, including at least one step of forming a protective layer covering the gate; depositing a layer comprising carbon, said layer being disposed distant from said transistor; modifying the protective layer to form a modified protective layer; forming a protective film on the layer comprising carbon; removing the protective film on surfaces of the protective film that are perpendicular to a main implantation direction; selectively removing the layer comprising carbon; and at least one step of selectively removing the modified protective layer.

Abstract: The invention describes a method for forming spacers (152a, 152b) of a field effect transistor gate, comprising a step of forming a protection layer (152) covering the gate of said transistor, at least a step of modifying the protection layer, executed after the step of forming the protection layer, by contacting the protection layer (152) with plasma comprising ions heavier than hydrogen and CxHy where x is the proportion of carbon and y is the proportion of hydrogen to form a modified protection layer (158) and a carbon film (271). The protection layer being nitride (N)-based and/or silicon (Si)-based and/or carbon (C)-based and shows a dielectric constant equal or less than 8.

Abstract: A method of etching a layer including at least one pattern that has flanks is provided, including at least one step of modifying the layer by putting the layer in presence with a plasma into which CxHy is introduced and which includes ions heavier than hydrogen; and wherein the plasma creates a bombardment of ions with a hydrogen base coming from the CxHy, the bombardment being anisotropic according to a main direction of implantation parallel to the flanks and so as to modify portions of the layer that are inclined with respect to the main direction and so as to retain unmodified portions on the flanks, wherein chemical species of the plasma form a carbon film on the flanks; and at least one step of removing the modified layer to be etched using a selective etching of modified portions of the layer with respect to the carbon film.

Abstract: A method is provided for forming a transistor from a stack including the following successive layers: an electrically insulating layer, an active zone including at least one semiconductor layer, and a gate, sides of which are configured to be covered by at least one spacer, the method including: a phase of forming lateral cavities; and forming a raised drain and a raised source that fill the lateral cavities by growing the semiconductor layer via epitaxy, the forming of the lateral cavities includes, after a step of partially removing the semiconductor layer: forming a sacrificial layer, partially removing the sacrificial layer; forming spacers against the sides of the gate resting on a residual sacrificial layer; and totally removing the residual sacrificial layer in order to form the lateral cavities.

Abstract: A method for manufacturing a transistor is provided, the transistor including a gate disposed above an underlying layer of a semiconductor material, the gate including at least one first flank and at least one second flank, and a gate foot disposed under the gate in the underlying layer and protruding relative to a peripheral portion of the underlying layer, the peripheral portion surrounding the gate foot; and the method including forming a selectivity layer obtained from an original layer and disposed only above the peripheral portion of the underlying layer, and selective etching, with respect to the selectivity layer, of the material of the original layer so as to etch the gate foot.

Abstract: There is provided a method for manufacturing a transistor including a gate above an underlying layer of a semiconductor material and including at least one first flank and one second flank, a gate foot formed in the underlying layer, a peripheral portion of the underlying layer surrounding the gate foot, and spacers covering at least partially the first and second flanks so as to not cover the gate foot; the method including forming the underlying layer by partially removing the semiconductor material around the gate to form the gate foot and the peripheral portion; then forming a dielectric layer for forming spacers by a deposition to cover both the first and second flanks, the gate foot, and an upper surface of the peripheral portion; and then partially removing the dielectric layer so as to expose the upper surface and so as to not expose the first and second flanks.

Abstract: A method for etching a dielectric layer located on the surface of a three-dimensional structure formed on a face of a substrate oriented along a plane of a substrate, which includes a step of implanting ions so as to directionally create a top layer in the dielectric layer. Such top layer is thus not formed everywhere. Then, the layer in question is removed, except on the predefined zones, such as flanks of a transistor gate. A selective etching of the dielectric layer is executed relative to the material of the residual part of the top layer and relative to the material of the face of the substrate.

Abstract: There is provided a method for manufacturing a transistor from a stack including at least one gate pattern comprising at least one flank, the method including forming at least one gate spacer over at least the flank of the gate pattern; and reducing, after a step of exposure of the stack to a temperature greater than or equal to 600° C., of a dielectric permittivity of the at least one gate spacer, the reducing including at least one ion implantation in a portion at least of a thickness of the at least one gate spacer.

Abstract: A method for producing interconnection lines including etching a layer of porous dielectric material forming a trench and filling the trench is provided. The etching is carried out in a plasma so as to grow, all along the etching, a protective layer on flanks of the layer of porous dielectric material. The plasma is formed from a gas formed from a first component and a second component, or a gas formed from a first component, a second component and a third component. The first component is a hydrocarbon of the CXHY type, where X is the proportion of carbon in the gas and Y the proportion of hydrogen in the gas; the second component is taken from nitrogen or dioxygen or a mixture of nitrogen and dioxygen; the third component is taken from argon or helium; and the protective layer is based on hydrocarbon.

Abstract: A method for forming spacers of a gate of a field-effect transistor is provided, including at least one step of forming a protective layer covering the gate; depositing a layer comprising carbon, said layer being disposed distant from said transistor; modifying the protective layer to form a modified protective layer; forming a protective film on the layer comprising carbon; removing the protective film on surfaces of the protective film that are perpendicular to a main implantation direction; selectively removing the layer comprising carbon; and at least one step of selectively removing the modified protective layer.

Abstract: Method of making a transistor with semiconducting nanowires, including: making a semiconducting nanowire on a support, one portion of the nanowire being covered by a dummy gate, in which the dummy gate and the nanowire are surrounded by a dielectric layer, removing the dummy gate, forming a first space surrounded by first parts of the dielectric layer, making an ion implantation in a second part of the dielectric layer under said first portion, said first parts protecting third parts of the dielectric layer, etching said second part, forming a second space, making a gate in the spaces, and a dielectric portion on the gate and said first parts, making an ion implantation in fourth parts of the dielectric layer surrounding second portions of the nanowire, the dielectric portion protecting said first and third parts, etch said fourth parts.

Abstract: A method for forming spacers of a gate of a transistor is provided, including forming a protective layer covering the gate; after the forming the protective layer, at least one step of forming a carbon film on the transistor; removing portions of the carbon film located on a top and on either side of the gate; modifying the protective layer on the top of the gate and on either side of the gate; and removing the modified protective layer.

Abstract: The method includes the steps of: a) providing a stack including, successively, a substrate, a silicide layer formed on the substrate, and a silicon nitride layer covering at least the silicide layer, b) etching predefined regions of the silicon nitride layer in such a way as to expose at least areas of the silicide layer intended to form the electrical contacts, and c) depositing a protective layer on at least the areas of the silicide layer exposed in step b), the method not including a step of exposing the stack to moisture between step b) and step c), in particular moisture from the ambient air.

Abstract: A method is provided for forming spacers of a gate of a field effect transistor, the gate including flanks and a top and being located above a layer of a semiconductor material, the method including a step of forming a dielectric layer covering the gate; after the step of forming, at least one step of modifying the dielectric layer by putting the dielectric layer into presence of a plasma creating a bombarding of light ions; and at least one step of removing the modified dielectric layer including a dry etching performed by putting the modified dielectric layer into presence of a gaseous mixture including at least one first component with a hydrofluoric acid base that transforms the modified dielectric layer into non-volatile residue, and removing the non-volatile residue via a wet clean performed after the dry etching or a thermal annealing of sublimation performed after or during the dry etching.

Abstract: A method is provided for forming spacers for a gate of a field effect transistor, the gate being situated above a layer of semiconductor material, including forming a layer of nitride covering the gate; modifying the layer by plasma implantation of light ions, having an atomic number equal or less than 10, in the layer in order to form a modified layer of nitride, the modifying being performed so as not to modify the layer of nitride over its entire thickness at flanks of the gate; and removing the modified layer of nitride by a selective wet or dry etching, of the modified layer relative to said layer of semiconductor material and relative to the non-modified layer at the flanks of the gate, without etching the layer of semiconductor material, wherein an entire length of the non-modified layer at the flanks remains after the selective wet or dry etching.

Abstract: A microelectronic method for etching a layer to be etched, including: modifying the layer to be etched from a surface of the layer to be etched and over a depth corresponding to at least a portion of thickness of the layer to be etched to form a film, with the modifying including implanting light ions into the layer to be etched; and removing the film includes a selective etching of the film relative to at least one layer underlying the film.