Abstract: A vehicular vision system includes a plurality of cameras disposed at a vehicle and capturing image data as the equipped vehicle is driven along a traffic lane of a road. Captured image data is processed to detect a rearward-approaching vehicle and determine a path of travel of the detected rearward-approaching vehicle. Responsive to determining that the path of travel of the detected rearward-approaching vehicle is along a side traffic lane adjacent to the traffic lane along which the equipped vehicle is driven, the vehicular vision system (i) displays at a video display screen video images derived at least from image data captured by the side camera that is at the side portion of the equipped vehicle that is adjacent to the side traffic lane and (ii) overlays a transparent graphic overlay overlaying the displayed video images that is based on the determined path of travel of the detected rearward-approaching vehicle.

Abstract: A trailer assist system for a vehicle includes a camera disposed at a rear portion of a vehicle and viewing a trailer hitch disposed at the vehicle. A control includes an image processor that processes image data captured by the camera that is representative of images of the trailer hitch viewed by the camera. The control, responsive to processing at the control of image data captured by the camera, detects a feature of the trailer hitch at determines Cartesian coordinates of the trailer hitch location and transforms the Cartesian coordinates of the detected feature to cylindrical coordinates. The control, responsive at least in part to determining the cylindrical coordinates of the detected feature, determines a three-dimensional location of the trailer hitch at the vehicle.

Abstract: A method for estimating distance to an object via a vehicular vision system includes disposing a camera at a vehicle so as to view at least exterior of the vehicle. An ECU is provided that includes an image processor. Multiple frames of image data are captured via the camera while the vehicle is moving, and are provided to the ECU. The provided captured frames of image data are processed to determine a three dimensional object present in a field of view of the camera, and a point of interest is determined on the determined object. An estimated location in three dimensional space of the determined point of interest relative to the vehicle is determined, and distance to the estimated location is estimated by comparing provided captured frames of image data where there is movement of the determined point of interest of the determined object relative to the camera.

Abstract: A bobbin and spool management system includes a bobbin topper having a central disc with upwardly and downwardly extending stanchions projecting therefrom, each being capped with a mushroom bolster and having a medially located chamfered collar. The upwardly projecting stanchion is adapted to mate with an axial bore in the barrel of a bobbin and retain the bobbin while the downwardly projecting stanchion is adapted to penetrate the axial bore in the barrel of a supply spool and be retained on the supply spool.

Abstract: A bobbin and spool management system includes a bobbin topper having a central disc with upwardly and downwardly extending stanchions projecting therefrom, each being capped with a mushroom bolster and having a medially located chamfered collar. The upwardly projecting stanchion is adapted to mate with an axial bore in the barrel of a bobbin and retain the bobbin while the downwardly projecting stanchion is adapted to penetrate the axial bore in the barrel of a supply spool and be retained on the supply spool.

Abstract: In an embodiment, a processor includes a buffer in an interface unit. The buffer may be used to accumulate coprocessor instructions to be transmitted to a coprocessor. In an embodiment, the processor issues the coprocessor instructions to the buffer when ready to be issued to the coprocessor. The interface unit may accumulate the coprocessor instructions in the buffer, generating a bundle of instructions. The bundle may be closed based on various predetermined conditions and then the bundle may be transmitted to the coprocessor. If a sequence of coprocessor instructions appears consecutively in a program, the rate at which the instructions are provided to the coprocessor (on average) at least matches the rate at which the coprocessor consumes the instructions, in an embodiment.

Abstract: Technology related to risk-informed autonomous adaptive cyber controllers is disclosed. In one example of the disclosed technology, a method includes generating probabilities of a cyber-attack occurring along an attack surface of a network. The probabilities can be generated using sensor and operational data of a network as inputs to an attack graph. The risk scores can be determined using a plurality of fault trees and the generated probabilities from the attack graph. The respective risk scores can correspond to respective nodes of an event tree. The event tree and the determined risk scores can be used to determine risk estimates for a plurality of configurations of the network. The risk estimates for the plurality of configurations of the network can be used to reconfigure the network to reduce a risk from the cyber-attack.

Abstract: Technology related to evaluating cyber-risk for synchrophasor systems is disclosed. In one example of the disclosed technology, a method includes generating an event tree model of a timing-attack on a synchrophasor system architecture. The event tree model can be based on locations and types of timing-attacks, an attack likelihood, vulnerabilities and detectability along a scenario path, and consequences of the timing-attack. A cyber-risk score of the synchrophasor system architecture can be determined using the event tree model. The synchrophasor system architecture can be adapted in response to the cyber-risk score.

Abstract: A technique for designing circuits including receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology to a stored topology, the stored topology associated with the first process technology; identifying a first set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning model of the first sub-circuit and the identified set of physical parameters; converting the identified first sub-circuit to a second sub-circuit for the second process technology based on the determined set of performance parameter values; and outputting the second sub-circuit.

Abstract: A technique for designing circuits including receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology to a stored topology, the stored topology associated with the first process technology; identifying a first set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning model of the first sub-circuit and the identified set of physical parameters; converting the identified first sub-circuit to a second sub-circuit for the second process technology based on the determined set of performance parameter values; and outputting the second sub-circuit.

Abstract: A technique for designing circuits including receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology to a stored topology, the stored topology associated with the first process technology; identifying a first set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning model of the first sub-circuit and the identified set of physical parameters; converting the identified first sub-circuit to a second sub-circuit for the second process technology based on the determined set of performance parameter values; and outputting the second sub-circuit.

Abstract: A technique for designing circuits including receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology to a stored topology, the stored topology associated with the first process technology; identifying a first set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning model of the first sub-circuit and the identified set of physical parameters; converting the identified first sub-circuit to a second sub-circuit for the second process technology based on the determined set of performance parameter values; and outputting the second sub-circuit.

Abstract: A technique for designing circuits including receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology to a stored topology, the stored topology associated with the first process technology; identifying a first set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning model of the first sub-circuit and the identified set of physical parameters; converting the identified first sub-circuit to a second sub-circuit for the second process technology based on the determined set of performance parameter values; and outputting the second sub-circuit.

Abstract: A technique for designing circuits including receiving a data object representing a circuit for a first process technology, the circuit including a first sub-circuit, the first sub-circuit including a first electrical component and a second electrical component arranged in a first topology; identifying the first sub-circuit in the data object by comparing the first topology to a stored topology, the stored topology associated with the first process technology; identifying a first set of physical parameter values associated with first electrical component and the second electrical component of the first sub-circuit; determining a set of performance parameter values for the first sub-circuit based on a first machine learning model of the first sub-circuit and the identified set of physical parameters; converting the identified first sub-circuit to a second sub-circuit for the second process technology based on the determined set of performance parameter values; and outputting the second sub-circuit.

Abstract: A method for stitching image data captured by multiple vehicular cameras includes equipping a vehicle with a vehicular vision system having a control and a plurality of cameras disposed at the vehicle so as to have respective fields of view exterior the vehicle. Image data captured by first and second cameras of the plurality of cameras is processed to detect and track an object present in and moving within an overlapping portion of the fields of view of the first and second cameras. Image data captured by the first and second cameras is stitched, via processing provided captured image data, to form stitched images. Stitching of captured image data is adjusted responsive to determination of a difference between a feature of a detected and tracked object as captured by the first camera and the feature of the detected and tracked object as captured by the second camera.

Abstract: Various embodiments comprise prioritizing frequency allocations in thermally- or power-constrained computing devices. Computer elements may be assigned ‘weights’ based on their priorities. The computer elements with higher weights may receive higher frequency allocations to assure they receive priority in processing more quickly. The computer elements with lower weights may receive lower frequency allocations and suffer a slowdown in their processing. Elements with the same weight may be grouped together for the purpose of frequency allocation.

Abstract: A vehicular vision system includes a camera disposed at a body portion of a vehicle and having a field of view exterior of the vehicle. The camera has an imager and a fisheye lens with more distortion at side regions of the field of view than at a center region of the field of view. An electronic control unit (ECU), via image processing of captured image data, determines gradient information and determines edges of intensity gradients present at a side region of the field of view of the camera. The system, based at least in part on determined edges of intensity gradients, determines a potential cross traffic object at the side region and determines movement of upper and lower portions of a determined edge of an intensity gradient of the cross traffic object to determine if the cross traffic object is moving into a path of the vehicle.

Abstract: In an embodiment, a processor includes a plurality of prefetch circuits configured to prefetch data into a data cache. A primary prefetch circuit may be configured to generate first prefetch requests in response to a demand access, and may be configured to invoke a second prefetch circuit in response to the demand access. The second prefetch circuit may implement a different prefetch mechanism than the first prefetch circuit. If the second prefetch circuit reaches a threshold confidence level in prefetching for the demand access, the second prefetch circuit may communicate an indication to the primary prefetch circuit. The primary prefetch circuit may reduce a number of prefetch requests generated for the demand access responsive to the communication from the second prefetch circuit.

Abstract: In an embodiment, a processor comprises a reservation station that issues a first load operation for execution, a store queue, and a replayed load buffer coupled in parallel with the reservation station. During execution of the first load operation, the store queue detects that the first load operation hits on a first store operation in the store queue that lacks store data and causes a replay of the first load operation. The replayed load buffer captures an identifier of the first load operation and the first store operation based on the replay of the first load operation, wherein the replayed load buffer monitors the reservation station for issuance of a first store data operation corresponding to the first store operation and issues the first load operation for reexecution based on the issuance of the first store data operation.

Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.