Patents by Inventor Ning Shi

Ning Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190304965
    Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.
    Type: Application
    Filed: June 20, 2019
    Publication date: October 3, 2019
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Publication number: 20190286633
    Abstract: A computer-implemented method includes receiving a data stream and dividing the data stream into one or more data artefacts for one or more time intervals. The computer-implemented method further includes generating one or more contexts. Each of the one or more contexts are for at least one of the one or more time intervals. The computer-implemented method further includes storing each of the one or more data artefacts in shared storage. The shared storage is accessible for each of the one or more contexts. The computer-implemented method further includes, for each context of the one or more contexts: determining a dependency for the context; monitoring the context for a completion of said dependency; and responsive to the completion, releasing the dependency. The computer-implemented further includes removing those of the one or more data artefacts that do not belong to the dependency for any of the one or more contexts.
    Type: Application
    Filed: June 6, 2019
    Publication date: September 19, 2019
    Inventors: Lei He, Yang Liu, Cheng Luo, Shaw-Ben Shi, Meng Hong Tsai, Xi Ning Wang, Shun Xiang Yang
  • Publication number: 20190259413
    Abstract: The present disclosure generally relates to data storage devices, and more specifically, to a magnetic media drive employing a magnetic recording head. The head includes a trailing shield, a main pole, a MAMR stack disposed between the trailing shield and the main pole, side shields surrounding at least a portion of the main pole, and a structure disposed between the side shields and the main pole at a media facing surface (WS). The structure is fabricated from a material that is thermally conductive and electrically insulating/dissipative. The material has a thermal conductivity of at least 50 W/(m*K) and an electrical resistivity of at least 105 ?*m. The structure helps dissipate joule heating generated from either the main pole or the MAMR stack into surrounding area without electrical shunting, leading to reduced heating or break-down induced failures.
    Type: Application
    Filed: February 14, 2019
    Publication date: August 22, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: Quang LE, Hongquan JIANG, Ning SHI, Alexander M. ZELTSER
  • Patent number: 10387424
    Abstract: A computer-implemented method includes receiving a data stream and dividing the data stream into one or more data artefacts for one or more time intervals. The computer-implemented method further includes generating one or more contexts. Each of the one or more contexts are for at least one of the one or more time intervals. The computer-implemented method further includes storing each of the one or more data artefacts in shared storage. The shared storage is accessible for each of the one or more contexts. The computer-implemented method further includes, for each context of the one or more contexts: determining a dependency for the context; monitoring the context for a completion of said dependency; and responsive to the completion, releasing the dependency. The computer-implemented further includes removing those of the one or more data artefacts that do not belong to the dependency for any of the one or more contexts.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: August 20, 2019
    Assignee: International Business Machines Corporation
    Inventors: Lei He, Yang Liu, Cheng Luo, Shaw-Ben Shi, Meng Hong Tsai, Xi Ning Wang, Shun Xiang Yang
  • Patent number: 10373947
    Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: August 6, 2019
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Publication number: 20190239131
    Abstract: Disclosed are a beamforming information interaction method and a network device. The method comprises: a first network device receiving first beamforming information sent by a second network device, wherein the first network device is a network device corresponding to a serving cell where a terminal is currently located, the second network device is a network device adjacent to the first network device, and the first beamforming information is information related to beam measurement of the second network device; and the first network device configuring the terminal according to the first beamforming information.
    Type: Application
    Filed: November 4, 2016
    Publication date: August 1, 2019
    Applicant: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Ning YANG, ZhiHua SHI
  • Publication number: 20190137648
    Abstract: The present application provides a method and a system for determining a saturation exponent of a heterogeneous carbonate reservoir. The method comprises: dividing a target reservoir into at least two reservoir types in accordance with a predetermined rule; obtaining a correspondence relationship between a saturation exponent and a bound water saturation in each of the reservoir types; determining the reservoir type to which a to-be-measured core belongs in accordance with the predetermined rule; obtaining a bound water saturation of the to-be-measured core; and calculating the saturation exponent of the to-be-measured core according to the bound water saturation of the to-be-measured core on the basis of the correspondence relationship of the reservoir type to which the to-be-measured core belongs.
    Type: Application
    Filed: May 15, 2017
    Publication date: May 9, 2019
    Applicant: PetroChina Company Limited
    Inventors: Ning LI, Kewen WANG, Yujiang SHI, Hongliang WU, Taiping ZHAO, Qingfu FENG, Zhou FENG, Haitao ZHANG, Baoding ZHU, Xiaoming YANG
  • Publication number: 20190141717
    Abstract: Aspects of the present disclosure provide techniques for interleaving in single user (SU) preamble puncturing in wireless local area networks (WLANs). In one implementation, a wireless device can identify an SU preamble puncture transmission, encode information for the SU preamble puncture transmission to produce encoded bits, parse the encoded bits into multiple segments, parse the encoded bits among multiple resource units (RUs) within each of the multiple segments, and perform a tone interleaving of the encoded bits within each of the multiple RUs. These techniques can be used in a 6 GHz band, as well as a 2.4 GHz band or a 5 GHz band.
    Type: Application
    Filed: October 11, 2018
    Publication date: May 9, 2019
    Inventors: Lin YANG, Bin TIAN, Jialing Li CHEN, Lochan VERMA, Sameer VERMANI, Ning ZHANG, Kai SHI, Youhan KIM, Vincent Knowles JONES, IV
  • Publication number: 20190074274
    Abstract: A transient voltage suppressor (TVS) is constructed as an NPN bipolar transistor including individually optimized collector-base and emitter-base junctions both with avalanche mode breakdown. The TVS device is constructed using a base that includes a lightly doped base region bordered by a pair of more heavily doped base regions. The two more heavily doped base regions are used to form the collector-base junction and the emitter-base junction both as avalanche breakdown junctions. The lightly doped base region between the collector-base and emitter-base doping regions ensures low leakage current in the TVS device. In this manner, the TVS bipolar transistor of the present invention provides high surge protection with robust clamping while ensuring low leakage current.
    Type: Application
    Filed: November 1, 2018
    Publication date: March 7, 2019
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Patent number: 10157904
    Abstract: A transient voltage suppressor (TVS) is constructed as an NPN bipolar transistor including individually optimized collector-base and emitter-base junctions both with avalanche mode breakdown. The TVS device is constructed using a base that includes a lightly doped base region bordered by a pair of more heavily doped base regions. The two more heavily doped base regions are used to form the collector-base junction and the emitter-base junction both as avalanche breakdown junctions. The lightly doped base region between the collector-base and emitter-base doping regions ensures low leakage current in the TVS device. In this manner, the TVS bipolar transistor of the present invention provides high surge protection with robust clamping while ensuring low leakage current.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: December 18, 2018
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Publication number: 20180342499
    Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.
    Type: Application
    Filed: July 25, 2018
    Publication date: November 29, 2018
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Publication number: 20180286852
    Abstract: A transient voltage suppressor (TVS) is constructed as an NPN bipolar transistor including individually optimized collector-base and emitter-base junctions both with avalanche mode breakdown. The TVS device is constructed using a base that includes a lightly doped base region bordered by a pair of more heavily doped base regions. The two more heavily doped base regions are used to form the collector-base junction and the emitter-base junction both as avalanche breakdown junctions. The lightly doped base region between the collector-base and emitter-base doping regions ensures low leakage current in the TVS device. In this manner, the TVS bipolar transistor of the present invention provides high surge protection with robust clamping while ensuring low leakage current.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 4, 2018
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Patent number: 10067999
    Abstract: Database replication is performed by tracking sequence numbers associated with binary change logs. At a producer cluster, a binary change log is generated based on a write transaction made to a database partition in the producer cluster. Included with the binary change log is a sequence number corresponding to the write transaction. The binary change log is transmitted from the producer cluster to a consumer cluster, where a determination is made whether to apply the binary change log based on the included sequence number. The binary change log is then applied to a database partition in the consumer cluster. The sequence number is stored at the consumer cluster by combining the sequence number with a numerical range having a first number and a second number, where the second number has a value corresponding to the most recent binary change log applied to the database partition in the consumer cluster.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: September 4, 2018
    Assignee: VoltDB, Inc.
    Inventors: Ning Shi, Walter Weiss, Yang Lu, Rui Shen, Manju James
  • Patent number: 10062682
    Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: August 28, 2018
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Patent number: 9947358
    Abstract: An apparatus comprises a slider having a trailing edge and a leading edge. A laser diode unit comprises a submount and a laser diode mounted to the submount. The submount includes a mounting surface affixed to a first surface of the slider at the trailing edge such that a first surface of the submount faces toward the leading edge of the slider. A thermally conductive material covers the first surface of the submount and at least a portion of the first surface of the slider. The thermally conductive material serves as a thermal conduction pathway between the submount and the slider.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: April 17, 2018
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Yuhang Cheng, Scott Franzen, Zoran Jandric, James Gary Wessel, Ning Shi
  • Publication number: 20180101589
    Abstract: Database replication is performed by tracking sequence numbers associated with binary change logs. At a producer cluster, a binary change log is generated based on a write transaction made to a database partition in the producer cluster. Included with the binary change log is a sequence number corresponding to the write transaction. The binary change log is transmitted from the producer cluster to a consumer cluster, where a determination is made whether to apply the binary change log based on the included sequence number. The binary change log is then applied to a database partition in the consumer cluster. The sequence number is stored at the consumer cluster by combining the sequence number with a numerical range having a first number and a second number, where the second number has a value corresponding to the most recent binary change log applied to the database partition in the consumer cluster.
    Type: Application
    Filed: September 14, 2017
    Publication date: April 12, 2018
    Inventors: Ning Shi, Walter Weiss, Yang Lu, Rui Shen, Manju James
  • Patent number: 9911728
    Abstract: A low capacitance transient voltage suppressor with snapback control and a reduced voltage punch-through breakdown mode includes an n+ type substrate, a first epitaxial layer on the substrate, a buried layer formed within the first epitaxial layer, a second epitaxial layer on the first epitaxial layer, and an implant layer formed within the first epitaxial layer below the buried layer. The implant layer extends beyond the buried layer. A set of source regions is formed within a top surface of the second epitaxial layer. Implant regions are formed in the second epitaxial layer, with a first implant region located below the first source region.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: March 6, 2018
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Ning Shi, Lingpeng Guan, Madhur Bobde
  • Patent number: 9805747
    Abstract: Ionized physical vapor deposition (IPVD) is used to form a magnetic recording disk drive write head main pole with thin side gap layers and a thicker leading gap layer. A metal or metal alloy is formed by IPVD in a trench with a bottom and outwardly sloping sidewalls. An optional Ru seed layer is deposited on the metal or metal alloy. This is followed by atomic layer deposition (ALD) of a Ru smoothing layer. If the IPVD results in metal or metal alloy side gap layers with a rough surface, the ALD process is modified, resulting in a smooth Ru smoothing layer that does not replicate the rough surface of the side gap layers.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: October 31, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: April D. Hixson-Goldsmith, Ning Shi, Kyusik Shin, Suping Song, Brian R. York
  • Patent number: 9754617
    Abstract: An apparatus comprises a slider having a trailing edge and a leading edge. A laser diode unit comprises a submount and a laser diode mounted to the submount. The submount includes a mounting surface affixed to a first surface of the slider at the trailing edge such that a first surface of the submount faces toward the leading edge of the slider. A thermally conductive material covers the first surface of the submount and at least a portion of the first surface of the slider. The thermally conductive material serves as a thermal conduction pathway between the submount and the slider.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: September 5, 2017
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Yuhang Cheng, Scott Franzen, Zoran Jandric, James Gary Wessel, Ning Shi
  • Publication number: 20170179107
    Abstract: A low capacitance transient voltage suppressor with snapback control and a reduced voltage punch-through breakdown mode includes an n+ type substrate, a first epitaxial layer on the substrate, a buried layer formed within the first epitaxial layer, a second epitaxial layer on the first epitaxial layer, and an implant layer formed within the first epitaxial layer below the buried layer. The implant layer extends beyond the buried layer. A set of source regions is formed within a top surface of the second epitaxial layer. Implant regions are formed in the second epitaxial layer, with a first implant region located below the first source region.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 22, 2017
    Applicant: Alpha and Omega Semiconductor Incorporated
    Inventors: Ning Shi, Lingpeng Guan, Madhur Bobde