Patents by Inventor Ning Shi

Ning Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250321776
    Abstract: A virtual machine startup acceleration method and a related device thereof, which significantly reduce a quantity of times that an image cache is accessed, preventing hot spot occurrence in the image cache, are described. The method in this disclosure includes receiving a first read request of a first virtual machine for a first system disk. Then, if it is determined that a linked clone volume for managing the first system disk does not retain first image data indicated by the first read request, notifying the linked clone volume to obtain the first image data from an image cache and store the first image data. The method further includes notifying the linked clone volume to send the first image data to the first system disk, and notifying the first system disk to send the first image data to the first virtual machine.
    Type: Application
    Filed: June 25, 2025
    Publication date: October 16, 2025
    Inventors: Ning SHI, Yongcong LIU, Kewei ZHAO, Chengyuan JI
  • Patent number: 12439510
    Abstract: A base plate assembly based on a manufacturing process of a composite circuit board according to the invention has a better load-bearing effect; conductive posts are riveted to the composite circuit board; connecting wires are fixed to upper ends of the conductive posts by means of conductive screws, so that components and the composite circuit board are electrically connected. The assembly process is simplified and the assembly efficiency is improved. Moreover, the test can be carried out as soon as the conductive posts are riveted. In this way, the problem that the defects of the base plate assembly can be discovered only after the components are assembled can be avoided effectively, thereby reducing the generation of defective products and the rework and maintenance rate and ensuring the pass rate of finished products.
    Type: Grant
    Filed: July 11, 2025
    Date of Patent: October 7, 2025
    Inventors: Yan Zhao, Yinghao Fu, Ning Shi
  • Patent number: 12417782
    Abstract: Aspects of the present disclosure generally relate to magnetic recording heads (such as write heads of data storage devices) that include multilayer structures to facilitate targeted switching and relatively low coercivity. In one or more embodiments, a magnetic recording head includes an iron-cobalt (FeCo) layer having a crystalline structure that is a cubic lattice structure, a first crystalline layer formed of a first material, and a second crystalline layer between the first crystalline layer and the FeCo layer. The second crystalline layer is formed of a second material different from the first material, and the second crystalline layer interfaces both the FeCo layer and the first crystalline layer. The crystalline structure of the FeCo layer has a texture of <100>.
    Type: Grant
    Filed: April 17, 2024
    Date of Patent: September 16, 2025
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ning Shi, Brian R. York, Susumu Okamura, Suping Song
  • Patent number: 12389691
    Abstract: A bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes with a clamp device merged with a steering diode in each set. In one embodiment, the protection circuit includes a first high-side diode integrated with a first silicon controlled rectifier (SCR), a first low-side diode, a second high-side diode integrated with a second SCR, and a second low-side diode. In another embodiment, the protection circuit includes a first high-side diode, a first low-side diode integrated with a first SCR, a second high-side diode, and a second low-side diode integrated with a second SCR. In some embodiments, the TVS protection circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range.
    Type: Grant
    Filed: May 4, 2024
    Date of Patent: August 12, 2025
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Patent number: 12253486
    Abstract: A gas-sensitive material, a preparation method therefore and an application thereof, and a gas sensor using the gas-sensitive material are provided. The gas-sensitive material is a carbon material-metal oxide composite nanomaterial formed by compounding a carbon material and metal oxides. The content of the carbon material is 0.5˜20 wt. % and the content of the metal oxides is 80˜99.5 wt. %; the metal oxides contain tungsten oxide and one or more selected from tin oxide, iron oxide, titanium oxide, copper oxide, molybdenum oxide, and zinc oxide; the metal oxides are formed on the carbon material in the form of nanowires, and the nanowires are tungsten oxide-doped nanowires. The gas-sensitive material has reduced resistance, is capable of responding to various gases at a reduced working temperature.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: March 18, 2025
    Assignees: CHINA PETROLEUM & CHEMICAL CORPORATION, SINOPEC RESEARCH INSTITUTE OF SAFETY ENGINEERING CO., LTD.
    Inventors: Fei An, Bing Sun, Na Li, Lin Wang, Ning Shi, Wei Xu, Shucai Zhang, Haozhi Wang, Shiqiang Wang, Junjie Feng, Chenyang Zhao
  • Publication number: 20250065313
    Abstract: A titanium silicalite molecular sieve has a micropore specific surface area of 320-500 m2/g, a micropore volume of 0.1-0.4 cm3/g, a mesopore specific surface area of 50-100 m2/g, a mesopore volume of 0.075-0.1 cm3/g, and a particle size of 100-250 nm. Its micropore specific surface area accounts for 50-90% of the total specific surface area. A catalyst contains the titanium silicalite molecular sieve carrier and is loaded with nano-gold particles. The catalyst has a micropore volume of 0.06-0.4 cm3/g and a particle size of 100-250 nm. The catalyst is prepared by subjecting the titanium silicalite molecular sieve to an alkaline treatment with an aqueous aliphatic amine solution and then loading same with nano-gold particles. The catalyst is used for an olefin epoxidation reaction, a cycloolefin epoxidation reaction, a phenol hydroxylation reaction, and a cyclohexanone ammoximation reaction.
    Type: Application
    Filed: November 22, 2022
    Publication date: February 27, 2025
    Inventors: Yujia LIU, Chenyang ZHAO, Hongwei ZHU, Bing SUN, Ning SHI, Wei XU
  • Publication number: 20240290777
    Abstract: A bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes with a clamp device merged with a steering diode in each set. In one embodiment, the protection circuit includes a first high-side diode integrated with a first silicon controlled rectifier (SCR), a first low-side diode, a second high-side diode integrated with a second SCR, and a second low-side diode. In another embodiment, the protection circuit includes a first high-side diode, a first low-side diode integrated with a first SCR, a second high-side diode, and a second low-side diode integrated with a second SCR. In some embodiments, the TVS protection circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range.
    Type: Application
    Filed: May 4, 2024
    Publication date: August 29, 2024
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Publication number: 20240282333
    Abstract: Aspects of the present disclosure generally relate to magnetic recording heads (such as write heads of data storage devices) that include multilayer structures to facilitate targeted switching and relatively low coercivity. In one or more embodiments, a magnetic recording head includes an iron-cobalt (FeCo) layer having a crystalline structure that is a cubic lattice structure, a first crystalline layer formed of a first material, and a second crystalline layer between the first crystalline layer and the FeCo layer. The second crystalline layer is formed of a second material different from the first material, and the second crystalline layer interfaces both the FeCo layer and the first crystalline layer. The crystalline structure of the FeCo layer has a texture of <100>.
    Type: Application
    Filed: April 17, 2024
    Publication date: August 22, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Ning SHI, Brian R. YORK, Susumu OKAMURA, Suping SONG
  • Patent number: 11990467
    Abstract: A bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes, a clamp circuit including an MOS transistor integrated with a silicon controlled rectifier (SCR) and a trigger circuit. In response to a voltage applied to one of the protected nodes exceeding a first voltage level, the trigger circuit drives the MOS transistor to cause a current flow at the SCR to trigger an SCR action and the SCR clamps the voltage at the respective protected node at a clamping voltage. In other embodiments, a bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes with a clamp device merged with a steering diode in each set. In some embodiments, the TVS protection circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: May 21, 2024
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Patent number: 11990163
    Abstract: Aspects of the present disclosure generally relate to magnetic recording heads (such as write heads of data storage devices) that include multilayer structures to facilitate targeted switching and relatively low coercivity. In one or more embodiments, a magnetic recording head includes an iron-cobalt (FeCo) layer having a crystalline structure that is a cubic lattice structure, a first crystalline layer formed of a first material, and a second crystalline layer between the first crystalline layer and the FeCo layer. The second crystalline layer is formed of a second material different from the first material, and the second crystalline layer interfaces both the FeCo layer and the first crystalline layer. The crystalline structure of the FeCo layer has a texture of <100>.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: May 21, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ning Shi, Brian R. York, Susumu Okamura, Suping Song
  • Publication number: 20240005951
    Abstract: Aspects of the present disclosure generally relate to magnetic recording heads (such as write heads of data storage devices) that include multilayer structures to facilitate targeted switching and relatively low coercivity. In one or more embodiments, a magnetic recording head includes an iron-cobalt (FeCo) layer having a crystalline structure that is a cubic lattice structure, a first crystalline layer formed of a first material, and a second crystalline layer between the first crystalline layer and the FeCo layer. The second crystalline layer is formed of a second material different from the first material, and the second crystalline layer interfaces both the FeCo layer and the first crystalline layer. The crystalline structure of the FeCo layer has a texture of <100>.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Ning SHI, Brian R. YORK, Susumu OKAMURA, Suping SONG
  • Publication number: 20230339833
    Abstract: A method and system for preparing epoxypropane by direct epoxidation of propylene includes the steps of subjecting a mixed gas of a first feed gas and a second feed gas to a contact reaction with a catalyst under reaction conditions of propylene epoxidation to prepare epoxypropane. The first feed gas contains oxygen gas and is free or substantially free of hydrogen gas. The second feed gas contains hydrogen gas and is free or substantially free of oxygen gas. The first feed gas and/or the second feed gas contain propylene, at least one of the first feed gas and the second feed gas further contains a diluent gas. The method can be used for reducing dosage of diluent gas, preferably recycling the tail gas, thereby significantly increasing the conversion rate of propylene without compromising the service life of catalyst.
    Type: Application
    Filed: January 26, 2021
    Publication date: October 26, 2023
    Inventors: Bing SUN, Chenyang ZHAO, Zhe YANG, Hongwei ZHU, Lin WANG, Jie JIANG, Ning SHI, Na LI, Shiqiang WANG, Haozhi WANG
  • Patent number: 11691119
    Abstract: Described are a low temperature plasma reaction device and a hydrogen sulfide decomposition method. The reaction device includes: a first cavity; a second cavity, the second cavity being embedded inside or outside the first cavity; an inner electrode, the inner electrode being arranged in the first cavity; an outer electrode; and a barrier dielectric arranged between the outer electrode and the inner electrode. The hydrogen sulfide decomposition method includes: implementing dielectric barrier discharge at the outer electrode and the inner electrode of the low temperature plasma reaction device, introducing a raw material gas containing hydrogen sulfide into the first cavity to implement a hydrogen sulfide decomposition method, and continuously introducing a thermally conductive medium into the second cavity in order to control the temperature of the first cavity of the low temperature plasma reaction device.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: July 4, 2023
    Assignees: CHINA PETROLEUM & CHEMICAL CORPORATION, CHINA PETROLEUM & CHEMICAL CORPORATION QINGDAO RESEARCH INSTITUTE OF SAFETY ENGINEERING
    Inventors: Jing Zhang, Shanjun Mu, Wei Xu, Ning Shi, Shucai Zhang, Guosheng Dong, Tie Zhang, Lin Wang, Junpeng Ren, Feng Sun
  • Publication number: 20230159365
    Abstract: The invention relates to a system for reducing the hardness of a water body. According to the system, the acidic water body near a filter element anode is continuously extracted in the electrolytic process, the effect of acid-alkali separation can be achieved without internally disposing an ion exchange membrane, acid-alkali mixing generated by electrodes slows down, the alkaline atmosphere of a cathode chamber is kept, and a good environment is provided for generation of calcium carbonate seed crystals; and meanwhile, the acidic water body extracted near the anode of an electrochemical electrolysis unit can be used for regenerating ion exchange resin in an ion exchange column, so that resources are fully utilized.
    Type: Application
    Filed: December 12, 2021
    Publication date: May 25, 2023
    Inventors: Bo JIANG, Xuchen BA, Xuesong WANG, Jinghua CHEN, Lihua QI, Xiaobin GUO, Ning SHI, Yijie LIU, Juan WANG
  • Publication number: 20230124633
    Abstract: A gas-sensitive material, a preparation method therefore and an application thereof, and a gas sensor using the gas-sensitive material are provided. The gas-sensitive material is a carbon material-metal oxide composite nanomaterial formed by compounding a carbon material and metal oxides. The content of the carbon material is 0.5˜20 wt. % and the content of the metal oxides is 80˜99.5 wt. %; the metal oxides contain tungsten oxide and one or more selected from tin oxide, iron oxide, titanium oxide, copper oxide, molybdenum oxide, and zinc oxide; the metal oxides are formed on the carbon material in the form of nanowires, and the nanowires are tungsten oxide-doped nanowires. The gas-sensitive material has reduced resistance, is capable of responding to various gases at a reduced working temperature.
    Type: Application
    Filed: January 26, 2021
    Publication date: April 20, 2023
    Inventors: Fei AN, Bing SUN, Na LI, Lin WANG, Ning SHI, Wei XU, Shucai ZHANG, Haozhi WANG, Shiqiang WANG, Junjie FENG, Chenyang ZHAO
  • Publication number: 20230050292
    Abstract: A bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes, a clamp circuit including an MOS transistor integrated with a silicon controlled rectifier (SCR) and a trigger circuit. In response to a voltage applied to one of the protected nodes exceeding a first voltage level, the trigger circuit drives the MOS transistor to cause a current flow at the SCR to trigger an SCR action and the SCR clamps the voltage at the respective protected node at a clamping voltage. In other embodiments, a bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes with a clamp device merged with a steering diode in each set. In some embodiments, the TVS protection circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range.
    Type: Application
    Filed: September 14, 2022
    Publication date: February 16, 2023
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Patent number: 11462532
    Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: October 4, 2022
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Publication number: 20210159223
    Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.
    Type: Application
    Filed: January 13, 2021
    Publication date: May 27, 2021
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Patent number: 10937780
    Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: March 2, 2021
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Shekar Mallikarjunaswamy, Ning Shi
  • Publication number: 20200398245
    Abstract: Described are a low temperature plasma reaction device and a hydrogen sulfide decomposition method. The reaction device includes: a first cavity; a second cavity, the second cavity being embedded inside or outside the first cavity; an inner electrode, the inner electrode being arranged in the first cavity; an outer electrode; and a barrier dielectric arranged between the outer electrode and the inner electrode. The hydrogen sulfide decomposition method includes: implementing dielectric barrier discharge at the outer electrode and the inner electrode of the low temperature plasma reaction device, introducing a raw material gas containing hydrogen sulfide into the first cavity to implement a hydrogen sulfide decomposition method, and continuously introducing a thermally conductive medium into the second cavity in order to control the temperature of the first cavity of the low temperature plasma reaction device.
    Type: Application
    Filed: January 31, 2019
    Publication date: December 24, 2020
    Applicants: CHINA PETROLEUM & CHEMICAL CORPORATION, CHINA PETROLEUM & CHEMICAL CORPORATION QINGDAO RESEARCH INSTITUTE OF SAFEY ENGENEERING
    Inventors: Jing ZHANG, Shanjun MU, Wei XU, Ning SHI, Shucai ZHANG, Guosheng DONG, Tie ZHANG, Lin WANG, Junpeng REN, Feng SUN