Abstract: The invention includes methods of forming capacitor structures and removing organic material. An organic material, such as a photoresist, is disposed on a substrate. The organic material is contacted with a chemical mechanical polishing pad and a polishing fluid to remove the organic material from the substrate. The polishing fluid can be essentially free of particles, and can be water.

Abstract: The invention includes a method of forming spaced conductive regions. A construction is formed which includes a first electrically conductive material over a semiconductor substrate. The construction also includes openings extending through the first electrically conductive material and into the semiconductor substrate. A second electrically conductive material is formed within the openings and over the first electrically conductive material and is in electrical contact with the first electrically conductive material. The second electrically conductive material is subjected to anodic dissolution while the first electrically conductive material is electrically connected to a power source.

Abstract: Microelectronic devices with improved heat dissipation, methods of making microelectronic devices, and methods of cooling microelectronic devices are disclosed herein. In one embodiment, the microelectronic device includes a microelectronic substrate having a first surface, a second surface facing opposite from the first surface, and a plurality of active devices at least proximate to the first surface. The second surface has a plurality of heat transfer surface features that increase the surface area of the second surface. In another embodiment, an enclosure having a heat sink and a single or multi-phase thermal conductor can be positioned adjacent to the second surface to transfer heat from the active devices.

Abstract: The invention includes methods of forming capacitor structures and removing organic material. An organic material, such as a photoresist, is disposed on a substrate. The organic material is contacted with a chemical mechanical polishing pad and a polishing fluid to remove the organic material from the substrate. The polishing fluid can be essentially free of particles, and can be water.

Abstract: A method for fabricating a semiconductor component includes the steps of providing a semiconductor die, forming a plurality of redistribution contacts on the die, forming a plurality of interconnect contacts on the redistribution contacts, and forming an insulating layer on the interconnect contacts while leaving the tip portions exposed. The method also includes the step of forming terminal contacts on the interconnect contacts, or alternately forming conductors in electrical communication with the interconnect contacts and then forming terminal contacts in electrical communication with the conductors.

Abstract: Microelectronic devices with improved heat dissipation, methods of making microelectronic devices, and methods of cooling microelectronic devices are disclosed herein. In one embodiment, the microelectronic device includes a microelectronic substrate having a first surface, a second surface facing opposite from the first surface, and a plurality of active devices at least proximate to the first surface. The second surface has a plurality of heat transfer surface features that increase the surface area of the second surface. In another embodiment, an enclosure having a heat sink and a single or multi-phase thermal conductor can be positioned adjacent to the second surface to transfer heat from the active devices.

Abstract: Selective deposition of metal over dielectric layers in a manner that minimizes or eliminates keyhole formation is provided. According to one embodiment, a dielectric target layer is formed over a substrate layer, wherein the target layer may be configured to allow conformal metal deposition, and a dielectric second layer is formed over the target layer, wherein the second layer may be configured to allow bottom-up metal deposition. An opening may then be formed in the second layer and metal may be selectively deposited over the substrate layer.

Abstract: The invention includes methods of forming capacitor structures and removing organic material. An organic material, such as a photoresist, is disposed on a substrate. The organic material is contacted with a chemical mechanical polishing pad and a polishing fluid to remove the organic material from the substrate. The polishing fluid can be essentially free of particles, and can be water.

Abstract: A planarization method includes providing a second and/or third row Group VIII metal-containing surface (preferably, a platinum-containing surface) and positioning it for contact with a polishing surface in the presence of a planarization composition that includes an oxidizing agent.

Abstract: Substrate precursor structures include a substrate blank having at least one aperture extending substantially through the substrate blank. At least a portion of at least one conductive layer covers a surface of the at least one aperture of the substrate blank. A mask pattern covers a portion of the at least one conductive layer and exposes another portion of the at least one conductive layer to define at least one conductive element, at least a portion of which extends over the surface of the at least one aperture.

Abstract: A method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer. The method includes use of a polishing pad with a slurry solution in which copper and a material, such as tungsten, of the barrier layer are removed at substantially the same rate. The slurry is formulated so as to oxidize copper and a material of the barrier layer at substantially the same rates. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry. Systems for substantially polishing copper conductive structures and adjacent barrier structures on semiconductor device structures are also disclosed.

Abstract: A method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer. The method includes use of a polishing pad with a slurry solution in which copper and a material, such as tungsten, of the barrier layer are removed at substantially the same rate. The slurry is formulated so as to oxidize copper and a material of the barrier layer at substantially the same rates. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry. Systems for substantially polishing copper conductive structures and adjacent barrier structures on semiconductor device structures are also disclosed.

Abstract: The invention includes a method of forming spaced conductive regions. A construction is formed which includes a first electrically conductive material over a semiconductor substrate. The construction also includes openings extending through the first electrically conductive material and into the semiconductor substrate. A second electrically conductive material is formed within the openings and over the first electrically conductive material and is in electrical contact with the first electrically conductive material. The second electrically conductive material is subjected to anodic dissolution while the first electrically conductive material is electrically connected to a power source.

Abstract: A semiconductor component includes a die having a pattern of die contacts, and interconnect contacts bonded to the die contacts and encapsulated in an insulating layer. The component also includes terminal contacts formed on tip portions of the interconnect contacts. Alternately the component can include conductors and bonding pads in electrical communication with the interconnect contacts configured to redistribute the pattern of the die contacts. A method for fabricating the component includes the steps of forming the interconnect contacts on the die contacts, and forming the insulating layer on the interconnect contacts while leaving the tip portions exposed. The method also includes the step of forming the terminal contacts on the interconnect contacts, or alternately forming the conductors and bonding pads in electrical communication with the interconnect contacts and then forming the terminal contacts on the bonding pads.

Abstract: The invention includes a method of forming spaced conductive regions. A construction is formed which includes a first electrically conductive material over a semiconductor substrate. The construction also includes openings extending through the first electrically conductive material and into the semiconductor substrate. A second electrically conductive material is formed within the openings and over the first electrically conductive material and is in electrical contact with the first electrically conductive material. The second electrically conductive material is subjected to anodic dissolution while the first electrically conductive material is electrically connected to a power source.

Abstract: A method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer. The method includes use of a polishing pad with a slurry solution in which copper and a material, such as tungsten, of the barrier layer are removed at substantially the same rate. The slurry is formulated so as to oxidize copper and a material of the barrier layer at substantially the same rates. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry. Systems for substantially polishing copper conductive structures and adjacent barrier structures on semiconductor device structures are also disclosed.

Abstract: The invention includes methods of forming capacitor structures and removing organic material. An organic material, such as a photoresist, is disposed on a substrate. The organic material is contacted with a chemical mechanical polishing pad and a polishing fluid to remove the organic material from the substrate. The polishing fluid can be essentially free of particles, and can be water.

Abstract: An intermediate semiconductor device that includes a semiconductor substrate and an oxide-based layer over the substrate. The oxide-based layer has an activated catalytic surface on at least one selected area thereof which is adapted for electroless plating. The intermediate may also include high aspect ratio capacitor containers, trenches, vias, and other openings whose surfaces can be made conductive by selectively electrolessly plating a metal or metal alloy thereon.

Abstract: Electroless plating can be utilized to form electrical interconnects associated with semiconductor substrates. For instance, a semiconductor substrate can be formed to have a dummy structure thereover with a surface suitable for electroless plating, and to also have a digit line thereover having about the same height as the dummy structure. A layer can be formed over the dummy structure and digit line, and openings can be formed through the layer to the upper surfaces of the dummy structure and digit line. Subsequently, a conductive material can be electroless plated within the openings to form electrical contacts within the openings. The opening extending to the dummy structure can pass through a capacitor electrode, and accordingly the conductive material formed within such opening can be utilized to form electrical contact to the capacitor electrode.

Abstract: Electroless plating can be utilized to form electrical interconnects associated with semiconductor substrates. For instance, a semiconductor substrate can be formed to have a dummy structure thereover with a surface suitable for electroless plating, and to also have a digit line thereover having about the same height as the dummy structure. A layer can be formed over the dummy structure and digit line, and openings can be formed through the layer to, the upper surfaces of the dummy structure and digit line. Subsequently, a conductive material can be electroless plated within the openings to form electrical contacts within the openings. The opening extending to the dummy structure can pass through a capacitor electrode, and accordingly the conductive material formed within such opening can be utilized to form electrical contact to the capacitor electrode.