Patents by Inventor Noboru Morita

Noboru Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7180191
    Abstract: A semiconductor device 200 comprises a SiCN film 202 formed on a semiconductor substrate (not shown), a first SiOC film 204 formed thereon, a SiCN film 208 formed thereon, a second SiOC film 210 formed thereon, a SiO2 film 212 and a SiCN film 214 formed thereon. The first SiOC film 204 has a barrier metal layer 216 and via 218 formed therein, and the second SiOC film 210 has a barrier metal layer 220 and wiring metal layer 222 formed therein. Carbon content of the second SiOC film 210 is adjusted larger than that of the first SiOC film 204. This makes it possible to improve adhesiveness of the insulating interlayer with other insulating layers, while keeping a low dielectric constant of the insulating interlayer.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: February 20, 2007
    Assignee: NEC Electronics Corporation
    Inventors: Yoichi Sasaki, Koichi Ohto, Noboru Morita, Tatsuya Usami, Hidenobu Miyamoto
  • Publication number: 20070032070
    Abstract: A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device includes a semiconductor substrate (not shown), an interlayer insulating film 102 formed on the semiconductor substrate and a multiple-layered insulating film 140 provided on the interlayer insulating film 102. The semiconductor device also includes an electric conductor that extends through the multiple-layered insulating film 140 and includes a Cu film 120 and a barrier metal film 118. The barrier metal film 118 is covers side surfaces and a bottom surface of the Cu film 120. An insulating film 116 is disposed between the multiple-layered insulating film 140 and the electric conductor (i.e., Cu film 120 and barrier metal film 118).
    Type: Application
    Filed: October 4, 2006
    Publication date: February 8, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Tatsuya Usami, Noboru Morita, Koichi Ohto
  • Publication number: 20060255466
    Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.
    Type: Application
    Filed: June 28, 2006
    Publication date: November 16, 2006
    Inventors: Sadayuki Ohnishi, Kouichi Ohto, Tatsuya Usami, Noboru Morita, Kouji Arita, Ryouhei Kitao, Youichi Sasaki
  • Patent number: 7135776
    Abstract: A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device includes a semiconductor substrate (not shown), an interlayer insulating film 102 formed on the semiconductor substrate and a multiple-layered insulating film 140 provided on the interlayer insulating film 102. The semiconductor device also includes an electric conductor that extends through the multiplelayered insulating film 140 and includes a Cu film 120 and a barrier metal film 118. The barrier metal film 118 is covers side surfaces and a bottom surface of the Cu film 120. An insulating film 116 is disposed between the multiple-layered insulating film 140 and the electric conductor (i.e., Cu film 120 and barrier metal film 118).
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: November 14, 2006
    Assignee: NEC Electronics Corporation
    Inventors: Tatsuya Usami, Noboru Morita, Koichi Ohto
  • Patent number: 7132732
    Abstract: A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO2) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: November 7, 2006
    Assignee: NEC Electronics Corporation
    Inventors: Koichi Ohto, Tatsuya Usami, Noboru Morita, Sadayuki Ohnishi, Koji Arita, Ryohei Kitao, Yoichi Sasaki
  • Patent number: 7102236
    Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: September 5, 2006
    Assignee: NEC Electronics Corporation
    Inventors: Sadayuki Ohnishi, Kouichi Ohto, Tatsuya Usami, Noboru Morita, Kouji Arita, Ryouhei Kitao, Youichi Sasaki
  • Publication number: 20060190515
    Abstract: Input data is divided into a plurality of blocks, and the blocks are corresponded to each address of the lookup table, and a block is divided into a plurality of sections according to the change of the output data, and at this time position information to indicates the boundary of the section, and output data in each section are stored in an address corresponding to each block, so that the memory capacity required for the lookup table can be decreased.
    Type: Application
    Filed: February 3, 2006
    Publication date: August 24, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Shigeaki Okutani, Toshiro Nakazuru, Noboru Morita
  • Publication number: 20060166488
    Abstract: An object of the present invention is to improve the inter-layer adhesiveness of the diffusion barrier film while maintaining the lower dielectric constant of the diffusion barrier film. A diffusion barrier film for a copper interconnect comprises an insulating material containing silicon, carbon, hydrogen and nitrogen as constituent elements, and also containing Si—H bond, Si—C bond and methylene bond (—CH2—). The insulating material involves I2/I1 of not lower than 0.067 and I3/I1 of not higher than 0.0067 appeared in an infrared absorption spectrum; where I1 is defined as an absorption area of the infrared absorption band having a peak near 810 cm?1, I2 is defined as an absorption area of the infrared absorption band having a peak near 2,120 cm?1 and I3 is defined as an absorption area of the infrared absorption band having a peak near 1,250 cm?1.
    Type: Application
    Filed: March 22, 2006
    Publication date: July 27, 2006
    Inventors: Tatsuya Usami, Noboru Morita
  • Patent number: 7074698
    Abstract: A method of fabricating a semiconductor device using a PECVD method is provided, which improves the adhesion strength of a deposited dielectric layer to an underlying layer and the reliability of the deposited dielectric layer. After placing a substrate in a chamber, a gas having a thermal conductivity of 0.1 W/mK or greater (e.g., H2 or He) is introduced into the chamber, thereby contacting the gas with the substrate for stabilization of a temperature of the substrate. A desired dielectric layer is deposited on or over the substrate in the chamber using a PECVD method after the step of introducing the gas. As the desired dielectric layer, a dielectric layer having a low dielectric constant, such as a SiCH, SiCHN, or SiOCH layer, is preferably used.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: July 11, 2006
    Assignee: NEC Electronics Corporation
    Inventors: Noboru Morita, Tatsuya Usami, Koichi Ohto, Sadayuki Ohnishi, Koji Arita, Ryohei Kitao, Yoichi Sasaki
  • Publication number: 20060141778
    Abstract: A manufacturing method of a semiconductor device including a step of forming a via hole in an insulation layer including an organic low dielectric film, such as MSQ, SiC, and SiCN, and then embedding a wiring material in the via hole through a barrier metal. According to this method, a plasma treatment is performed after the via hole is formed and before the barrier metal is deposited, using a He/H2 gas capable of replacing groups (methyl groups) made of organic constituents and covering the surface of the exposed organic low dielectric film (MSQ) with hydrogen, or a He gas capable decomposing the groups (methyl groups) without removing organic low dielectric molecules. As a result, the surface of the low dielectric film (MSQ) is reformed to be hydrophilic and adhesion to the barrier metal is hence improved, thereby making it possible to prevent the occurrence of separation of the barrier metal and scratches.
    Type: Application
    Filed: February 23, 2006
    Publication date: June 29, 2006
    Inventors: Takashi Tonegawa, Koji Arita, Tatsuya Usami, Noboru Morita, Koichi Ohto, Yoichi Sasaki, Sadayuki Ohnishi, Ryohei Kitao
  • Patent number: 7045895
    Abstract: An object of the present invention is to improve the inter-layer adhesiveness of the diffusion barrier film while maintaining the lower dielectric constant of the diffusion barrier film. A diffusion barrier film for a copper interconnect comprises an insulating material containing silicon, carbon, hydrogen and nitrogen as constituent elements, and also containing Si—H bond, Si—C bond and methylene bond (—CH2—). The insulating material involves I2/I1 of not lower than 0.067 and I3/I1 of not higher than 0.0067 appeared in an infrared absorption spectrum; where I1 is defined as an absorption area of the infrared absorption band having a peak near 810 cm?1, I2 is defined as an absorption area of the infrared absorption band having a peak near 2,120 cm?1 and I3 is defined as an absorption area of the infrared absorption band having a peak near 1,250 cm?1.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: May 16, 2006
    Assignee: NEC Electronics Corporation
    Inventors: Tatsuya Usami, Noboru Morita
  • Publication number: 20060060975
    Abstract: A technology for inhibiting the dielectric breakdown occurred in a semiconductor device is provided. A semiconductor device comprises a semiconductor substrate (not shown), an interlayer insulating film 102 formed on the semiconductor substrate and a multiple-layered insulating film 140 provided on the interlayer insulating film 102. The semiconductor device comprises an electric conductor, which is provided to extend through the multiple-layered insulating film 140 and includes a Cu film 120 and a barrier metal film 118. The barrier metal film 118 is provided so as to cover side surfaces and a bottom surface of the Cu film 120. This semiconductor device comprises an insulating film 116, which is disposed between the multiple-layered insulating film 140 and the electric conductor (i.e., Cu film 120 and barrier metal film 118).
    Type: Application
    Filed: September 7, 2005
    Publication date: March 23, 2006
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Tatsuya Usami, Noboru Morita, Koichi Ohto
  • Patent number: 6938191
    Abstract: The present invention provides an access control device and a testing method that can simplify the software operations in an access control operation such as a JTAG control operation, and enable the hardware to perform a high-speed control operation. The access control device conducts a test or diagnosis on an object by accessing a serial interface based on a command and data that specify a testing or diagnosing route. Under the control of a processor, a control circuit in the access control device executes an access sequence in accordance with a command string and an input data string stored in a memory, and stores the data outputted from the object to be tested or diagnosed in the memory as an output data string. The control circuit sets a state transition route for each objective state in advance, so that a transition route can be readily determined for an objective state specified by the command string.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: August 30, 2005
    Assignee: Fujitsu Limited
    Inventors: Keiji Sato, Toshiro Nakazuru, Shigeaki Okutani, Noboru Morita
  • Publication number: 20050170633
    Abstract: A semiconductor device 200 comprises a SiCN film 202 formed on a semiconductor substrate (not shown), a first SiOC film 204 formed thereon, a SiCN film 208 formed thereon, a second SiOC film 210 formed thereon, a SiO2 film 212 and a SiCN film 214 formed thereon. The first SiOC film 204 has a barrier metal layer 216 and via 218 formed therein, and the second SiOC film 210 has a barrier metal layer 220 and wiring metal layer 222 formed therein. Carbon content of the second SiOC film 210 is adjusted larger than that of the first SiOC film 204. This makes it possible to improve adhesiveness of the insulating interlayer with other insulating layers, while keeping a low dielectric constant of the insulating interlayer.
    Type: Application
    Filed: February 3, 2005
    Publication date: August 4, 2005
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Yoichi Sasaki, Koichi Ohto, Noboru Morita, Tatsuya Usami, Hidenobu Miyamoto
  • Publication number: 20050131975
    Abstract: A cyclic equation setting unit transforms and sets a Taylor series equation for calculating a sine function into a single cyclic equation common to terms of the Taylor series equation, the single cyclic equation having a new known number Q that is defined by multiplying a known number Q and the square of a variable X, shifting the result by a shift number Sand then adding a constant K thereto. An adjustment unit adjusts and prepares the shift number S such that within a variation range of the variable X the variable X has a maximum value 1 with the constant K being not greater than 1. A cyclic equation executing unit inputs and converts angle information i to the variable X, and executing the cyclic equation in sequence from higher order term to lower order term for the number of terms of the Taylor series equation to derive a sine function of the angle information i.
    Type: Application
    Filed: April 14, 2004
    Publication date: June 16, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Shigeaki Okutani, Toshiro Nakazuru, Noboru Morita
  • Publication number: 20050006665
    Abstract: An insulating film used for an interlayer insulating film of a semiconductor device and having a low dielectric constant. The insulating film comprises a carbon containing silicon oxide (SiOCH) film which has Si—CH2 bond therein. The proportion of Si—CH2 bond (1360 cm?1) to Si—CH3 bond (1270 cm?1) in the insulating film is preferably in a range from 0.03 to 0.05 measured as a peak height ratio of FTIR spectrum. The insulating film according to the present invention has higher ashing tolerance and improved adhesion to SiO2 film, when compared with the conventional SiOCH film which only has CH3 group.
    Type: Application
    Filed: January 29, 2004
    Publication date: January 13, 2005
    Inventors: Sadayuki Ohnishi, Kouichi Ohto, Tatsuya Usami, Noboru Morita, Kouji Arita, Ryouhei Kitao, Youichi Sasaki
  • Publication number: 20040185668
    Abstract: A method of fabricating a semiconductor device using a PECVD method is provided, which improves the adhesion strength of a deposited dielectric layer to an underlying layer and the reliability of the deposited dielectric layer. After placing a substrate in a chamber, a gas having a thermal conductivity of 0.1 W/mK or greater (e.g.. H2 or He) is introduced into the chamber, thereby contacting the gas with the substrate for stabilization of a temperature of the substrate. A desired dielectric layer is deposited on or over the substrate in the chamber using a PECVD method after the step of introducing the gas. As the desired dielectric layer, a dielectric layer having a low dielectric constant, such as a SiCH, SiCHN, or SiOCH layer, is preferably used.
    Type: Application
    Filed: January 30, 2004
    Publication date: September 23, 2004
    Applicant: NEC Electronics Corporation
    Inventors: Noboru Morita, Tatsuya Usami, Koichi Ohto, Sadayuki Ohnishi, Koji Arita, Ryohei Kitao, Yoichi Sasaki
  • Publication number: 20040183162
    Abstract: A semiconductor device has a semiconductor substrate, and a multi-layered wiring arrangement provided thereon. The multi-layered wring arrangement includes at least one insulating layer structure having a metal wiring pattern formed therein. The insulating layer structure includes a first SiOCH layer, a second SiOCH layer formed on the first SiOCH layer, and a silicon dioxide (SiO2) layer formed on the second SiOCH layer. The second SiOCH layer features a carbon (C) density lower than that of the first SiOCH layer, a hydrogen (H) density lower than that of the first SiOCH layer, and an oxygen (O) density higher than that of the first SiOCH layer.
    Type: Application
    Filed: January 29, 2004
    Publication date: September 23, 2004
    Applicant: NEC Electronics Corporation
    Inventors: Koichi Ohto, Tatsuya Usami, Noboru Morita, Sadayuki Ohnishi, Koji Arita, Ryohei Kitao, Yoichi Sasaki
  • Publication number: 20040155342
    Abstract: An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.
    Type: Application
    Filed: February 2, 2004
    Publication date: August 12, 2004
    Applicants: NEC ELECTRONICS CORPORATION, NEC CORPORATION
    Inventors: Tatsuya Usami, Noboru Morita, Koichi Ohto, Kazuhiko Endo
  • Publication number: 20040150110
    Abstract: An object of the present invention is to improve the inter-layer adhesiveness of the diffusion barrier film while maintaining the lower dielectric constant of the diffusion barrier film. A diffusion barrier film for a copper interconnect comprises an insulating material containing silicon, carbon, hydrogen and nitrogen as constituent elements, and also containing Si—H bond, Si—C bond and methylene bond (—CH2—). The insulating material involves I2/I1 of not lower than 0.067 and I3/I1 of not higher than 0.0067 appeared in an infrared absorption spectrum; where I1 is defined as an absorption area of the infrared absorption band having a peak near 810 cm−1, I2 is defined as an absorption area of the infrared absorption band having a peak near 2,120 cm−1 and I3 is defined as an absorption area of the infrared absorption band having a peak near 1,250 cm−1.
    Type: Application
    Filed: January 23, 2004
    Publication date: August 5, 2004
    Applicant: NEC Electronics Corporation
    Inventors: Tatsuya Usami, Noboru Morita