Patents by Inventor Nobuhide Yamada

Nobuhide Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11933609
    Abstract: The interferometer 10 according to this disclosure includes: a first optical component 12 that splits each of the P polarization component and the S polarization component of the light to be measured into the first optical path R1 and the second optical path R2 and combines the light to be measured; a second optical component 13 placed in the first optical path; a third optical component 14 that splits the light to be measured into the P polarization component and the S polarization component; and a P polarization detector 11a and an S polarization detector 11b that respectively detect the P polarization component and the S polarization component split by the third optical component, wherein the second optical component has an optical surface that changes the propagation direction of the light to be measured and gives a phase difference between the P polarization component and the S polarization component.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: March 19, 2024
    Assignees: Yokogawa Electric Corporation, Yokogawa Test & Measurement Corporation
    Inventor: Nobuhide Yamada
  • Patent number: 11736134
    Abstract: A digital isolator according to an embodiment includes a first electrode, a first insulating part, a second electrode, a second insulating part, and a first dielectric part. The first insulating part is located under the first electrode. The second electrode is located under the first insulating part. The second insulating part is located around the first electrode along a first plane perpendicular to a first direction. The first direction is from the second electrode toward the first electrode. The first dielectric part is located between the first electrode and the second insulating part in a second direction along the first plane. The first dielectric part contacts the first electrode. A relative dielectric constant of the first dielectric part is greater than a relative dielectric constant of the first insulating part.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: August 22, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Nobuhide Yamada
  • Publication number: 20230097546
    Abstract: According to one embodiment, a stereoscopic image display device includes a three-dimensional pixel unit, a backlight, and an arithmetic/control circuit. The three-dimensional pixel unit includes a plurality of pixel cells that are formed of an optical material having electrically changeable optical characteristics, are arranged in a mutually separated manner and in a three-dimensional manner, and are electrically connected with transparent wiring patterns. The backlight is configured to emit illumination light to the three-dimensional pixel unit. The arithmetic/control circuit is configured to control the plurality of pixel cells individually via the wiring patterns on the basis of input three-dimensional image data to cause the three-dimensional pixel unit to function as a transmissive hologram.
    Type: Application
    Filed: March 14, 2022
    Publication date: March 30, 2023
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Nobuhide YAMADA
  • Publication number: 20230091870
    Abstract: A semiconductor device includes a first electrode, a second electrode, a semiconductor part located between the first electrode and the second electrode, a third electrode located in the semiconductor part, an insulating film located between the third electrode and the semiconductor part, an insulating member located in the semiconductor part at a position separated from the insulating film, a fourth electrode located in the insulating member, and a compressive stress member located in the fourth electrode. The compressive stress member has compressive stress along a first direction. The first direction is from the first electrode toward the second electrode.
    Type: Application
    Filed: June 7, 2022
    Publication date: March 23, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Satoshi AKUTSU, Takuo KIKUCHI, Kazuyuki ITO, Nobuhide YAMADA
  • Publication number: 20220285490
    Abstract: A digital isolator according to an embodiment includes a first electrode, a first insulating part, a second electrode, a second insulating part, and a first dielectric part. The first insulating part is located under the first electrode. The second electrode is located under the first insulating part. The second insulating part is located around the first electrode along a first plane perpendicular to a first direction. The first direction is from the second electrode toward the first electrode. The first dielectric part is located between the first electrode and the second insulating part in a second direction along the first plane. The first dielectric part contacts the first electrode. A relative dielectric constant of the first dielectric part is greater than a relative dielectric constant of the first insulating part.
    Type: Application
    Filed: November 12, 2021
    Publication date: September 8, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Nobuhide YAMADA
  • Publication number: 20220196381
    Abstract: The interferometer 10 according to this disclosure includes: a first optical component 12 that splits each of the P polarization component and the S polarization component of the light to be measured into the first optical path R1 and the second optical path R2 and combines the light to be measured; a second optical component 13 placed in the first optical path; a third optical component 14 that splits the light to be measured into the P polarization component and the S polarization component; and a P polarization detector 11a and an S polarization detector 11b that respectively detect the P polarization component and the S polarization component split by the third optical component, wherein the second optical component has an optical surface that changes the propagation direction of the light to be measured and gives a phase difference between the P polarization component and the S polarization component.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 23, 2022
    Inventor: Nobuhide Yamada
  • Patent number: 11098405
    Abstract: A shower head includes a face plate having an outer peripheral portion and a plurality of gas injection holes disposed inside the outer peripheral portion, a movable portion facing the face plate and having a gas introduction passage, and a seal interposed between the outer peripheral portion of the face plate and the movable portion. The movable portion is arranged to move, in the first direction, between a first position in which the movable portion is coupled to the face plate by interposing the seal between the movable portion and the face plate, and the gas introduction passage communicates with the inside of the chamber via the gas injection holes, and a second position in which the movable portion is separated from the face plate, and the gas introduction passage communicates with the inside of the chamber via a gap between the movable portion and the face plate.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: August 24, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hideaki Masuda, Nobuhide Yamada, Rikyu Ikariyama
  • Publication number: 20190085453
    Abstract: A shower head includes a face plate having an outer peripheral portion and a plurality of gas injection holes disposed inside the outer peripheral portion, a movable portion facing the face plate and having a gas introduction passage, and a seal interposed between the outer peripheral portion of the face plate and the movable portion. The movable portion is arranged to move, in the first direction, between a first position in which the movable portion is coupled to the face plate by interposing the seal between the movable portion and the face plate, and the gas introduction passage communicates with the inside of the chamber via the gas injection holes, and a second position in which the movable portion is separated from the face plate, and the gas introduction passage communicates with the inside of the chamber via a gap between the movable portion and the face plate.
    Type: Application
    Filed: February 22, 2018
    Publication date: March 21, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Hideaki MASUDA, Nobuhide YAMADA, Rikyu IKARIYAMA
  • Patent number: 9953829
    Abstract: A semiconductor manufacturing method includes setting a relative position between first through holes of a first plate-shaped part and second through holes of a second plate-shaped part to a first relative position. The method includes supplying a first gas containing a component of the first film onto the semiconductor substrate in a reactor through the first through holes not closed with the second plate-shaped part, to form the first film on the semiconductor substrate. The method includes relatively moving the first plate-shaped part and the second plate-shaped part to change the relative position to a second relative position. The method includes supplying a second gas containing a component of the second film onto the semiconductor substrate through the first through holes not closed with the second plate-shaped part, to laminate the second film on the first film.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: April 24, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hideaki Masuda, Nobuhide Yamada
  • Patent number: 9780116
    Abstract: According to one embodiment, a semiconductor device includes a stacked body and a pillar. The stacked body includes insulating films, electrode films, and silicon containing films. Each of the insulating films and each of the electrode films are stacked alternately. One of the silicon containing films is provided between one of the insulating films and one of the electrode films. The pillar extends in the stacked body in a stacking direction of the insulating films and the electrode films. The pillar includes a silicon pillar and a memory film. The silicon pillar extends in the stacking direction. The memory film is provided between the silicon pillar and one of the electrode films.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: October 3, 2017
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hideaki Masuda, Katsuyasu Shiba, Nobuhide Yamada
  • Publication number: 20170104003
    Abstract: According to one embodiment, a semiconductor device includes a stacked body and a pillar. The stacked body includes insulating films, electrode films, and silicon containing films. Each of the insulating films and each of the electrode films are stacked alternately. One of the silicon containing films is provided between one of the insulating films and one of the electrode films. The pillar extends in the stacked body in a stacking direction of the insulating films and the electrode films. The pillar includes a silicon pillar and a memory film. The silicon pillar extends in the stacking direction. The memory film is provided between the silicon pillar and one of the electrode films.
    Type: Application
    Filed: December 8, 2016
    Publication date: April 13, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideaki MASUDA, Katsuyasu SHIBA, Nobuhide YAMADA
  • Publication number: 20170062202
    Abstract: A semiconductor manufacturing method includes setting a relative position between first through holes of a first plate-shaped part and second through holes of a second plate-shaped part to a first relative position. The method includes supplying a first gas containing a component of the first film onto the semiconductor substrate in a reactor through the first through holes not closed with the second plate-shaped part, to form the first film on the semiconductor substrate. The method includes relatively moving the first plate-shaped part and the second plate-shaped part to change the relative position to a second relative position. The method includes supplying a second gas containing a component of the second film onto the semiconductor substrate through the first through holes not closed with the second plate-shaped part, to laminate the second film on the first film.
    Type: Application
    Filed: January 21, 2016
    Publication date: March 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideaki MASUDA, Nobuhide YAMADA
  • Publication number: 20160268299
    Abstract: According to one embodiment, a semiconductor device includes a stacked body and a pillar. The stacked body includes insulating films, electrode films, and silicon containing films. Each of the insulating films and each of the electrode films are stacked alternately. One of the silicon containing films is provided between one of the insulating films and one of the electrode films. The pillar extends in the stacked body in a stacking direction of the insulating films and the electrode films. The pillar includes a silicon pillar and a memory film. The silicon pillar extends in the stacking direction. The memory film is provided between the silicon pillar and one of the electrode films.
    Type: Application
    Filed: September 10, 2015
    Publication date: September 15, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideaki MASUDA, Katsuyasu SHIBA, Nobuhide YAMADA
  • Publication number: 20160042985
    Abstract: A substrate processing apparatus includes a mounting unit on which a substrate is mounted, a light generation and detection unit that forms an optical path parallel to a surface of the substrate at a location separated from the surface of the substrate by a predetermined distance and is capable of detecting shielding of the optical path, and a control unit that controls movement of at least one of the mounting unit and the optical path to control relative movement between the optical path and the substrate in a state where parallelism between the optical path and the surface of the substrate is maintained.
    Type: Application
    Filed: February 24, 2015
    Publication date: February 11, 2016
    Inventor: NOBUHIDE YAMADA
  • Patent number: 9190262
    Abstract: A method of manufacturing a semiconductor device in which an insulating film is filled between patterns etched into a workpiece structure is disclosed. The method includes cleaning etch residues residing between the etched patterns by a first chemical liquid; rinsing the workpiece structure cleaned by the first chemical liquid by a rinse liquid; and coating the workpiece structure rinsed by the rinse liquid with a coating liquid for formation of the insulating film. The cleaning to the coating are carried out within the same processing chamber such that a liquid constantly exists between the patterns of the workpiece structure.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: November 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Hizawa, Nobuhide Yamada, Yoshihiro Ogawa, Masahiro Kiyotoshi
  • Publication number: 20140202946
    Abstract: The piping joint according to the present embodiment includes a joint part that joins a plurality of pipes for transporting a medium to one another. At least one conductive line is provided between the pipes so as to extend over cross-sections of the pipes. A ground part grounds the conductive line. The conductive line removes electric charges from the medium via the ground part.
    Type: Application
    Filed: May 21, 2013
    Publication date: July 24, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Noriyuki ASAMI, Koudai KITAMURA, Katsuhiko TACHIBANA, Kenzo KUGIMIYA, Nobuhide YAMADA
  • Publication number: 20140014142
    Abstract: A method of manufacturing a semiconductor device in which an insulating film is filled between patterns etched into a workpiece structure is disclosed. The method includes cleaning etch residues residing between the etched patterns by a first chemical liquid; rinsing the workpiece structure cleaned by the first chemical liquid by a rinse liquid; and coating the workpiece structure rinsed by the rinse liquid with a coating liquid for formation of the insulating film. The cleaning to the coating are carried out within the same processing chamber such that a liquid constantly exists between the patterns of the workpiece structure.
    Type: Application
    Filed: September 12, 2013
    Publication date: January 16, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Hizawa, Nobuhide Yamada, Yoshihiro Ogawa, Masahiro Kiyotoshi
  • Patent number: 8557705
    Abstract: A method of manufacturing a semiconductor device in which an insulating film is filled between patterns etched into a workpiece structure is disclosed. The method includes cleaning etch residues residing between the etched patterns by a first chemical liquid; rinsing the workpiece structure cleaned by the first chemical liquid by a rinse liquid; and coating the workpiece structure rinsed by the rinse liquid with a coating liquid for formation of the insulating film. The cleaning to the coating are carried out within the same processing chamber such that a liquid constantly exists between the patterns of the workpiece structure.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: October 15, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Hizawa, Nobuhide Yamada, Yoshihiro Ogawa, Masahiro Kiyotoshi
  • Publication number: 20120094493
    Abstract: A method of manufacturing a semiconductor device in which an insulating film is filled between patterns etched into a workpiece structure is disclosed. The method includes cleaning etch residues residing between the etched patterns by a first chemical liquid; rinsing the workpiece structure cleaned by the first chemical liquid by a rinse liquid; and coating the workpiece structure rinsed by the rinse liquid with a coating liquid for formation of the insulating film. The cleaning to the coating are carried out within the same processing chamber such that a liquid constantly exists between the patterns of the workpiece structure.
    Type: Application
    Filed: September 19, 2011
    Publication date: April 19, 2012
    Inventors: Takeshi Hizawa, Nobuhide Yamada, Yoshihiro Ogawa, Masahiro Kiyotoshi
  • Patent number: 8071157
    Abstract: There is disclosed a film forming method comprising continuously discharging a solution adjusted so as to spread over a substrate by a given amount to the substrate through a discharge port disposed in a nozzle, moving the nozzle and substrate with respect to each other, and holding the supplied solution onto the substrate to form a liquid film, wherein a distance h between the discharge port of the nozzle and the substrate is set to be not less than 2 mm and to be in a range less than 5×10?5 q? (mm) given with respect to a surface tension ? (N/m) of the solution, discharge speed q (m/sec) of the solution continuously discharged through the discharge port, and a constant of 5×10?5 (m·sec/N).
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: December 6, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Ito, Tatsuhiko Ema, Kei Hayasaki, Rempei Nakata, Nobuhide Yamada, Katsuya Okumura