Patents by Inventor Nobuhiko Noto

Nobuhiko Noto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8053334
    Abstract: The invention is a method for forming a silicon oxide film of an SOI wafer, the method by which at least thermal oxidation treatment is performed (a process (A)) on an SOI wafer having an oxide film on the back surface and, after the thermal oxidation treatment, heat treatment is additionally performed (a process (B)) in a non-oxidizing atmosphere at a temperature higher than the temperature at which the thermal oxidation treatment was performed, whereby a silicon oxide film is formed on the front surface of an SOI layer. This provides a method for forming a silicon oxide film of an SOI wafer, the method that can prevent an SOI wafer from being warped after thermal oxidation treatment even when an SOI wafer having a thick oxide film on the back surface is used and a silicon oxide film for forming a device is formed by thermal oxidation on the front surface on the SOI layer side, and can reduce exposure failure and adsorption failure caused by warpage of the SOI wafer and enhance yields of device fabrication.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: November 8, 2011
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Isao Yokokawa, Nobuhiko Noto, Shin-ichi Yamaguchi
  • Publication number: 20110237049
    Abstract: A method for manufacturing a bonded wafer including the steps of: implanting at least one gas ion of a hydrogen ion and a rare gas ion into a bond wafer from a surface thereof to form an ion-implanted layer; bonding the ion-implanted surface of the bond wafer to a surface of a base wafer directly or through an oxide film; thereafter delaminating the bond wafer at the ion-implanted layer to prepare the bonded wafer having a silicon thin film formed on the base wafer; and performing a flattening heat treatment on the bonded wafer under an atmosphere containing hydrogen or hydrogen chloride, wherein a dopant gas is added into the atmosphere of the flattening heat treatment to perform the heat treatment, the dopant gas having the same conductivity type as a dopant contained in the silicon thin film.
    Type: Application
    Filed: October 15, 2009
    Publication date: September 29, 2011
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Satoshi Oka, Nobuhiko Noto
  • Publication number: 20110223740
    Abstract: A method for manufacturing an SOI wafer having a buried oxide film with a predetermined thickness including performing a heat treatment for reducing a thickness of the buried oxide film on an SOI wafer material having an SOI layer formed on the buried oxide film, wherein a thickness of the SOI layer of the SOI wafer material to be subjected to the heat treatment for reducing the thickness of the buried oxide film is calculated on the basis of a ratio of the thickness of the buried oxide film to be reduced by the heat treatment with respect to a permissible value of an amount of change in an in-plane range of the buried oxide film, the change being caused by the heat treatment, and the SOI wafer material obtained by thinning the thickness of the bond wafer so as to have the calculated thickness of the SOI layer is subjected to the heat treatment for reducing the thickness of the buried oxide film.
    Type: Application
    Filed: November 11, 2009
    Publication date: September 15, 2011
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Tohru Ishizuka, Norihiro Kobayashi, Hiroji Aga, Nobuhiko Noto
  • Publication number: 20110212598
    Abstract: The present invention is a method for manufacturing a bonded wafer including at least the steps of: forming an ion-implanted layer inside a bond wafer; bringing the ion-implanted surface of the bond wafer into close contact with a surface of a base wafer directly or through a silicon oxide film; and performing heat treatment for delaminating the bond wafer at the ion-implanted layer, wherein the heat treatment step for delaminating includes performing a pre-annealing at a temperature of less than 500° C. and thereafter performing a delamination heat treatment at a temperature of 500° C. or more, and the pre-annealing is performed at least by a heat treatment at a first temperature and a subsequent heat treatment at a second temperature higher than the first temperature.
    Type: Application
    Filed: October 14, 2009
    Publication date: September 1, 2011
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Tohru Ishizuka, Norihiro Kobayashi, Nobuhiko Noto
  • Patent number: 7985660
    Abstract: The present invention provides a method for manufacturing an SOI wafer, including: a step of preparing a base wafer consisting of a p+ silicon single crystal wafer and a bond wafer consisting of a silicon single crystal wafer containing a dopant at a lower concentration than that in the base wafer; a step of forming a silicon oxide film on an entire surface of the base wafer based on thermal oxidation; a step of bonding the bond wafer to the base wafer through the silicon oxide film; and a step of reducing a thickness of the bond wafer to form an SOI layer, wherein a step of forming a CVD insulator film on a surface on an opposite side of a bonding surface of the base wafer is provided before the thermal oxidation step for the base wafer.
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: July 26, 2011
    Assignee: Shin Etsu Handotai Co., Ltd.
    Inventors: Isao Yokokawa, Hiroshi Takeno, Nobuhiko Noto
  • Publication number: 20110104870
    Abstract: A method for manufacturing a bonded wafer, including at least implanting at least one type of gas ion selected from a hydrogen ion and a rare gas ion from a surface of a bond wafer to form an ion-implanted layer in the wafer, bonding an ion-implanted surface of the bond wafer to a surface of a base wafer directly or through an insulator film, and then delaminating the bond wafer at the ion-implanted layer to fabricate a bonded wafer. A plasma treatment is applied to a bonding surface of one of the bond wafer and the base wafer to grow an oxide film, etching the grown oxide film is carried out, and bonding to the other wafer is performed. The method enables preventing defects by reducing particles on the bonding surface and performing strong bonding when effecting bonding directly or through the insulator film.
    Type: Application
    Filed: February 17, 2009
    Publication date: May 5, 2011
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro Kobayashi, Tohru Ishizuka, Hiroji Aga, Nobuhiko Noto
  • Patent number: 7861421
    Abstract: The present invention provides a method for measuring a rotation angle of a bonded wafer, wherein a base wafer and a bond wafer each having a notch indicative of a crystal orientation formed at an outer edge thereof are bonded to each other at a desired rotation angle by utilizing the notches, a profile of the bond wafer having a reduced film thickness is observed with respect to a bonded wafer manufactured by reducing a film thickness of the bond wafer, a positional direction of the notch of the bond wafer seen from a center of the bonded wafer is calculated by utilizing the profile, an angle formed between the calculated positional direction of the notch of the bond wafer and a positional direction of the notch of the base wafer is calculated, and a rotation angle of the base wafer and the bond wafer is measured.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: January 4, 2011
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Norihiro Kobayashi, Tohru Ishizuka, Nobuhiko Noto
  • Publication number: 20100323502
    Abstract: The present invention provides a method for manufacturing an SOI substrate including at least: an oxygen ion implantation step of ion-implanting oxygen ions from one main surface of a single-crystal silicon substrate to form an oxygen ion implanted layer; and a heat treatment step of performing a heat treatment with respect to the single-crystal silicon substrate having the oxygen ion implanted layer formed therein to change the oxygen ion implanted layer into a buried oxide film layer, wherein acceleration energy for the oxygen ion implantation is previously determined from a thickness of the buried oxide film layer to be obtained, and the oxygen ion implantation step is carried out with the determined acceleration energy to manufacture the SOI substrate. Thereby, it is possible to provide an SOI substrate manufacturing method that enables efficiently manufacturing an SOI substrate having a continuous and uniform thin buried oxide film layer.
    Type: Application
    Filed: February 19, 2008
    Publication date: December 23, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Hiroshi Takeno, Tohru Ishizuka, Nobuhiko Noto
  • Publication number: 20100314722
    Abstract: The present invention is an SOI wafer comprising at least: an SOI layer; a silicon oxide film; and a base wafer, wherein the SOI layer has a plane orientation of (100), and the base wafer has a resistivity of 100 ?·cm or more and a plane orientation different from (100). As a result, there is provided the SOI wafer and the manufacturing method thereof that have no complicated manufacturing step, defects on a bonding interface which are not practically a problem in number and a high interface state density (Dit) for trapping carriers on an interface of a BOX layer and the base wafer.
    Type: Application
    Filed: February 19, 2009
    Publication date: December 16, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Tohru Ishizuka, Nobuhiko Noto, Norihiro Kobayashi, Masatake Nakano
  • Patent number: 7838388
    Abstract: Provided is a method for producing an SOI substrate having a thick-film SOI layer, in which an ion-implanted layer is formed by implanting at least one kind of ion of hydrogen ion and a rare gas ion into a surface of a bond wafer, an SOI substrate having an SOI layer is produced by, after the ion-implanted surface of the bond wafer and a surface of a base wafer are bonded together via an oxide film, delaminating the bond wafer along the ion-implanted layer, heat treatment is performed on the SOI substrate having the SOI layer in a reducing atmosphere containing hydrogen or an atmosphere containing hydrogen chloride gas, and, after the surface of the SOI layer is polished by CMP, a silicon epitaxial layer is grown on the SOI layer of the SOI substrate.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: November 23, 2010
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Satoshi Oka, Nobuhiko Noto
  • Publication number: 20100264510
    Abstract: In a SOI structure semiconductor device using a SOI substrate, a lattice distortion layer is formed by implanting Ar ions into a silicon substrate as an active layer. The lattice distortion layer is capable of serving as a gettering site. The dose amount of Ar ions is adjusted in such a manner that tensile stress in the lattice distortion layer is equal to or greater than 11 MPa and equal to or less than 27 MPa. Thus, the lattice distortion layer can prevent occurrence of a leakage current while serving as the gettering site.
    Type: Application
    Filed: October 20, 2008
    Publication date: October 21, 2010
    Applicants: DENSO CORPORATION, Shin-Etsu Handotai Co., Ltd.
    Inventors: Hiroshi Ohtsuki, Mitsutaka Katada, Nobuhiko Noto, Hiroshi Takeno, Kazuhiko Yoshida
  • Patent number: 7799660
    Abstract: The present invention provides a method for manufacturing an SOI substrate by which an oxygen ion is implanted from at least one of main surfaces of a single-crystal silicon substrate to form an oxygen-ion-implanted layer and then an oxide film-forming heat treatment that changes the formed oxygen-ion-implanted layer into a buried oxide film layer is performed with respect to the single-crystal silicon substrate to manufacture the SOI substrate, the method comprising: implanting a neutral element ion having a dose amount of 1×1012 atoms/cm2 or above and less than 1×1015 atoms/cm2 into a back surface to form an ion-implanted damage layer after performing the oxide film-forming heat treatment; and gettering a metal impurity in the ion-implanted damage layer by a subsequent heat treatment to enable reducing a metal impurity concentration on a front surface side.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: September 21, 2010
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Tohru Ishizuka, Hiroshi Takeno, Nobuhiko Noto
  • Patent number: 7776719
    Abstract: A method is provided for manufacturing a bonded wafer by an ion implantation delamination method, including bonding a base wafer with a bond wafer having a microbubble layer formed by ion implantation, delaminating the wafers along the micro bubble layer as a boundary, and removing a periphery of a thin film formed on the base wafer by the delamination. The removal step is performed by dry etching that supplies an etching gas from a nozzle, and the dry etching is performed by adjusting an inner diameter of the gas-jetting port of the nozzle, and a distance between the gas-jetting port of the nozzle and a surface of the thin film.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: August 17, 2010
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Yasutsugu Soeta, Nobuhiko Noto
  • Patent number: 7749861
    Abstract: According to the present invention, there is provided a method for manufacturing an SOI substrate based on a bonding method, comprising at least: forming a silicon oxide film on a surface of at least one of a single-crystal silicon substrate that becomes an SOI layer and a single-crystal silicon substrate that becomes a support substrate; bonding the single-crystal silicon substrate that becomes the SOI layer to the single-crystal silicon substrate that becomes the support substrate through the silicon oxide film; and performing a heat treatment for holding at a temperature falling within the range of at least 950° C. to 1100° C. and then carrying out a heat treatment at a temperature higher than 1100° C. when effecting a bonding heat treatment for increasing bonding strength.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: July 6, 2010
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Hiroshi Takeno, Nobuhiko Noto
  • Publication number: 20100132205
    Abstract: The present invention provides a method for measuring a rotation angle of a bonded wafer, wherein a base wafer and a bond wafer each having a notch indicative of a crystal orientation formed at an outer edge thereof are bonded to each other at a desired rotation angle by utilizing the notches, a profile of the bond wafer having a reduced film thickness is observed with respect to a bonded wafer manufactured by reducing a film thickness of the bond wafer, a positional direction of the notch of the bond wafer seen from a center of the bonded wafer is calculated by utilizing the profile, an angle formed between the calculated positional direction of the notch of the bond wafer and a positional direction of the notch of the base wafer is calculated, and a rotation angle of the base wafer and the bond wafer is measured.
    Type: Application
    Filed: July 3, 2008
    Publication date: June 3, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Norihiro Kobayashi, Tohru Ishizuka, Nobuhiko Noto
  • Publication number: 20100129993
    Abstract: The present invention provides a method for manufacturing an SOI wafer wherein an HCl gas is mixed in a reactive gas at a step of forming a silicon epitaxial layer on an entire surface of an SOI layer of the SOI wafer having an oxide film on a terrace portion. As a result, it is possible to provide the method for manufacturing an SOI wafer that can easily grow the silicon epitaxial layer on the SOI layer of the SOI wafer having the oxide film on the terrace portion, suppress warpage of the SOI wafer to be manufactured, reduce generation of particles even at subsequent steps, e.g., device manufacture, and decrease a cost for manufacturing such an SOI wafer.
    Type: Application
    Filed: May 27, 2008
    Publication date: May 27, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Isao Yokokawa, Nobuhiko Noto
  • Publication number: 20100120223
    Abstract: The present invention is a method for manufacturing a bonded wafer by an ion implantation delamination method including at least the steps of, bonding a bond wafer having a micro bubble layer formed by gas ion implantation with a base wafer to be a supporting substrate, delaminating the bond wafer along the micro bubble layer as a boundary to form a thin film on the base wafer, the method comprising, cleaning the bonded wafer after delaminating the bond wafer using ozone water; performing rapid thermal anneal process under a hydrogen containing atmosphere; forming a thermal oxide film on a surface layer of the bonded wafer by subjecting to heat treatment under an oxidizing gas atmosphere and removing the thermal oxide film; subjecting to heat treatment under a non-oxidizing gas atmosphere.
    Type: Application
    Filed: July 3, 2008
    Publication date: May 13, 2010
    Applicant: Shin-Etsu Handotai Co., Ltd.
    Inventors: Norihiro Kobayashi, Hiroji Aga, Yasuo Nagaoka, Nobuhiko Noto
  • Publication number: 20100112781
    Abstract: The present invention provides a method for manufacturing an SOI wafer, including: a step of preparing a base wafer consisting of a p+ silicon single crystal wafer and a bond wafer consisting of a silicon single crystal wafer containing a dopant at a lower concentration than that in the base wafer; a step of forming a silicon oxide film on an entire surface of the base wafer based on thermal oxidation; a step of bonding the bond wafer to the base wafer through the silicon oxide film; and a step of reducing a thickness of the bond wafer to form an SOI layer, wherein a step of forming a CVD insulator film on a surface on an opposite side of a bonding surface of the base wafer is provided before the thermal oxidation step for the base wafer.
    Type: Application
    Filed: April 16, 2008
    Publication date: May 6, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Isao Yokokawa, Hiroshi Takeno, Nobuhiko Noto
  • Publication number: 20100112824
    Abstract: The invention is a method for forming a silicon oxide film of an SOI wafer, the method by which at least thermal oxidation treatment is performed (a process (A)) on an SOI wafer having an oxide film on the back surface and, after the thermal oxidation treatment, heat treatment is additionally performed (a process (B)) in a non-oxidizing atmosphere at a temperature higher than the temperature at which the thermal oxidation treatment was performed, whereby a silicon oxide film is formed on the front surface of an SOI layer. This provides a method for forming a silicon oxide film of an SOI wafer, the method that can prevent an SOI wafer from being warped after thermal oxidation treatment even when an SOI wafer having a thick oxide film on the back surface is used and a silicon oxide film for forming a device is formed by thermal oxidation on the front surface on the SOI layer side, and can reduce exposure failure and adsorption failure caused by warpage of the SOI wafer and enhance yields of device fabrication.
    Type: Application
    Filed: April 25, 2008
    Publication date: May 6, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Isao Yokokawa, Nobuhiko Noto, Shin-ichi Yamaguchi
  • Publication number: 20100003803
    Abstract: According to the present invention, there is provided a manufacturing method of a strained Si substrate including at least steps of: forming a lattice-relaxed SiGe layer on a silicon single crystal substrate; flattening a surface of the SiGe layer by CMP; and forming a strained Si layer on the surface of the flattened SiGe layer, wherein the method comprises steps of: subjecting the surface of the SiGe layer to SC1 cleaning, before forming the strained Si layer on the lattice-relaxed SiGe layer surface that is flattened; heat-treating the substrate having the SiGe layer after being subjected to SC1 cleaning in a hydrogen-containing atmosphere at 800° C. or higher; immediately forming a protective Si layer on the SiGe layer surface on the heat-treated substrate, without lowering the temperature below 800° C. after the heat treatment; and forming the strained Si layer on the surface of the protective Si layer at a temperature lower than the temperature of forming the protective Si layer.
    Type: Application
    Filed: November 29, 2007
    Publication date: January 7, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Satoshi Oka, Nobuhiko Noto