Abstract: A first semiconductor device includes: a first wiring layer including a first interlayer insulating film, a first electrode pad, and a first dummy electrode, the first electrode pad being embedded in the first interlayer insulating film and having one surface located on same plane as one surface of the first interlayer insulating film, and the first dummy electrode being embedded in the first interlayer insulating film, having one surface located on same plane as the one surface of the first interlayer insulating film, and being disposed around the first electrode pad; and a second wiring layer including a second interlayer insulating film, a second electrode pad, and a second dummy electrode, the second electrode pad being embedded in the second interlayer insulating film, having one surface located on same surface as one surface of the second interlayer insulating film, and being bonded to the first electrode pad, and the second dummy electrode having one surface located on same plane as the surface located

Abstract: Provided are a semiconductor device capable of lowering the temperature of the entire joining process to room temperature, a method for manufacturing a semiconductor device, and an electronic device. The semiconductor device includes: a first insulating film; a plurality of first joining electrodes formed on a surface of the first insulating film; a second insulating film; a plurality of second joining electrodes formed on a surface of the second insulating film; and a metal film covering an entire surface of a joining surface including the first insulating film and the plurality of first joining electrodes and an entire surface of a joining surface including the second insulating film and the plurality of second joining electrodes. The first insulating film includes a first dug portion that is formed between at least some joining electrodes of the plurality of first joining electrodes and separating the metal film between the joining electrodes.

Abstract: While improving the bonding strength between a plurality of semiconductor substrates, the passage of noise from one of the plurality of semiconductor substrates to another is suppressed.

Abstract: Provided is an imaging device including: a first semiconductor substrate provided with a photoelectric conversion element, a second semiconductor substrate stacked on the first semiconductor substrate with an interlayer insulating film interposed therebetween and provided with a pixel circuit that reads out charges generated in the photoelectric conversion element as a pixel signal, and a via that penetrates the interlayer insulating film and electrically connects a first surface of the first semiconductor substrate facing the second semiconductor substrate and at least a part of a second surface of the second semiconductor substrate facing the first surface.

Abstract: Provided is an imaging device (1) including: an imaging element (10); and a semiconductor element (20, 30) provided to be opposed to the imaging element and electrically coupled to the imaging element. The semiconductor element includes: a wiring region (20A, 30A) provided in a middle portion and a peripheral region (20B, 30B) outside the wiring region; a wiring layer (22, 32) having a wiring line in the wiring region; a semiconductor substrate (21, 31) opposed to the imaging element with the wiring layer interposed therebetween and having a first surface (Sa, Sc) and a second surface (Sb, Sd) in order from a side of the wiring layer; and a polishing adjustment section (23, 33) including a material that is lower in polishing rate than a constituent material of the semiconductor substrate, the polishing adjustment section being disposed in at least a portion of the peripheral region and provided in a thickness direction of the semiconductor substrate from the second surface.

Abstract: To provide a semiconductor device having a structure suitable for higher integration. This semiconductor device includes: a first semiconductor substrate; and a second semiconductor substrate. The first semiconductor substrate is provided with a first electrode including a first protruding portion and a first base portion. The first protruding portion includes a first abutting surface. The first base portion is linked to the first protruding portion and has volume greater than volume of the first protruding portion. The second semiconductor substrate is provided with a second electrode including a second protruding portion and a second base portion. The second protruding portion includes a second abutting surface that abuts the first abutting surface. The second base portion is linked to the second protruding portion and has volume greater than volume of the second protruding portion. The second semiconductor substrate is stacked on the first semiconductor substrate.

Abstract: The present technology relates to an imaging device, an electronic apparatus, and a method of manufacturing an imaging device capable of thinning a semiconductor on a terminal extraction surface while maintaining a strength of a semiconductor chip. There is provided an imaging device including: a first substrate having a pixel region in which pixels are two-dimensionally arranged, the pixels performing photoelectric conversion of light; and a second substrate in which a through silicon via is formed, in which a dug portion is formed in a back surface of the second substrate opposite to an incident side of light of the second substrate, and a redistribution layer (RDL) connected to a back surface of the first substrate is formed in the dug portion. The present technology can be applied to, for example, a semiconductor package including a semiconductor chip.

Abstract: A contact of a glass substrate with an on-chip lens is suppressed while suppressing occurrence of flare. A package includes a flattening film covering an on-chip lens formed on a light incidence side of a substrate having an element formed thereon, a transparent substrate formed on the light incidence side of the flattening film, a hollow portion formed in a region overlapping the on-chip lens when seen in a plan view with respect to at least one of between the flattening film and the transparent substrate and inside the transparent substrate, and a through-hole making the hollow portion communicate with the outside.

Abstract: To provide a semiconductor device having a structure suitable for higher integration. This semiconductor device includes: a first semiconductor substrate; and a second semiconductor substrate. The first semiconductor substrate is provided with a first electrode including a first protruding portion and a first base portion. The first protruding portion includes a first abutting surface. The first base portion is linked to the first protruding portion and has volume greater than volume of the first protruding portion. The second semiconductor substrate is provided with a second electrode including a second protruding portion and a second base portion. The second protruding portion includes a second abutting surface that abuts the first abutting surface. The second base portion is linked to the second protruding portion and has volume greater than volume of the second protruding portion. The second semiconductor substrate is stacked on the first semiconductor substrate.

Abstract: Provided is a semiconductor device with a wiring layer including a plurality of wiring lines extending in a first direction; a first insulating film stacked on the wiring layer that has a gap region between the plurality of wiring lines adjacent to each other in a second direction; and a second insulating film between the plurality of wiring lines and the first insulating film. Each wiring line includes a metal film and a barrier metal layer. The metal film includes an electrically conductive material including a first metal. The barrier metal layer partially covers surroundings of the metal film in a cross section orthogonal to the first direction and includes a material including a second metal. The second metal prevents diffusion of the first metal. The second insulating film includes an insulating material and covers a portion of the metal film. The insulating material prevents diffusion of the first metal.

Abstract: The present feature relates to a solid-state imaging device that allows generation of flare to be reduced and a manufacturing method therefor. A solid-state imaging device according to the present feature includes a semiconductor substrate having a pixel area having a plurality of pixels provided therein, and a transparent structure joined to a light incident surface side of the semiconductor substrate with resin and having a hollow structure. In the solid-state imaging device according to the present feature, the transparent structure includes a glass substrate and a transparent film, and the hollow structure is formed between the glass substrate and the transparent film. The present feature can be applied for example to imaging devices.

Abstract: A first semiconductor device includes a first substrate including a first electrode and a second electrode at a first surface side of the first substrate opposite to a light incident surface side of the first substrate; and a second substrate including a photodiode, a transfer transistor, and a third electrode and a fourth electrode at a first surface side of the second substrate facing the first surface of the first substrate, and a plurality of transistors.

Abstract: A first semiconductor device includes: a first wiring layer including a first interlayer insulating film, a first electrode pad, and a first dummy electrode, the first electrode pad being embedded in the first interlayer insulating film and having one surface located on same plane as one surface of the first interlayer insulating film, and the first dummy electrode being embedded in the first interlayer insulating film, having one surface located on same plane as the one surface of the first interlayer insulating film, and being disposed around the first electrode pad; and a second wiring layer including a second interlayer insulating film, a second electrode pad, and a second dummy electrode, the second electrode pad being embedded in the second interlayer insulating film, having one surface located on same surface as one surface of the second interlayer insulating film, and being bonded to the first electrode pad, and the second dummy electrode having one surface located on same plane as the surface located

Abstract: There are provided a light emitting device capable of forming a light emitting element on a suitable substrate and a method of manufacturing the same. A light emitting device according to the present disclosure includes: a first substrate; a plurality of light emitting elements that are provided on a first surface of the first substrate; and a second substrate that is provided on a second surface of the first substrate opposite to the first surface.

Abstract: The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.

Abstract: Provided is a solid-state imaging element, a manufacturing method, and an electronic apparatus which are capable of further improving a light-blocking effect. The solid-state imaging element has a laminated structure in which a memory substrate, a logic substrate, and a sensor substrate are laminated. The solid-state imaging element includes a through electrode that connects the memory substrate and the sensor substrate in a manner passing through a semiconductor layer of the logic substrate, and a light-blocking metal film arranged in a wiring layer included in the logic substrate and provided on the sensor substrate side, where the light-blocking metal film has an opening opened so as to allow the through electrode to pass through. The solid-state imaging element further includes a contact electrode formed on a bonded surface between the logic substrate and the sensor substrate and used to connect the through electrode to the sensor substrate side.

Abstract: A first semiconductor device includes: a first wiring layer including a first interlayer insulating film, a first electrode pad, and a first dummy electrode, the first electrode pad being embedded in the first interlayer insulating film and having one surface located on same plane as one surface of the first interlayer insulating film, and the first dummy electrode being embedded in the first interlayer insulating film, having one surface located on same plane as the one surface of the first interlayer insulating film, and being disposed around the first electrode pad; and a second wiring layer including a second interlayer insulating film, a second electrode pad, and a second dummy electrode, the second electrode pad being embedded in the second interlayer insulating film, having one surface located on same surface as one surface of the second interlayer insulating film, and being bonded to the first electrode pad, and the second dummy electrode having one surface located on same plane as the surface located

Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

Abstract: There is provided a camera module including a stacked lens structure including a plurality of lens substrates. The plurality of lens substrates includes a first lens substrate including a first lens that is disposed at an inner side of a through-hole formed in the first lens substrate, and a second lens substrate including a second lens that is disposed at an inner side of a through-hole formed in the second lens substrate, wherein the first lens substrate is directly bonded to the second lens substrate. The camera module further includes an electromagnetic drive unit configured to adjust a distance between the stacked lens structure and a light-receiving element.

Abstract: A solid-state imaging device according to an embodiment of the present disclosure includes: a plurality of photoelectric converters that is stacked on a semiconductor substrate, and has wavelength selectivities different from each other; and a wiring line that is formed on the semiconductor substrate, and is electrically coupled to the plurality of photoelectric converters. Each of the photoelectric converters includes a photoelectric conversion film, and a first electrode and a second electrode that are disposed with the photoelectric conversion film interposed therebetween. The wiring line extends in a direction normal to the semiconductor substrate, and includes a vertical wiring line formed in contact with the second electrode of each of the photoelectric converters.