Abstract: A method of computer simulation is for evaluating the immunity characteristics of a device-under-test by use of a transmission line model that models a transmission line connected to the device-under-test. The method includes a characteristic change node at which parameters representing the transmission characteristics of the transmission line change midway.

Abstract: An optical voltage prove includes: an optical modulator 1 having two modulation electrodes 11 and 12, the optical modulator 1 being configured to modulate an intensity of an incident light depending on a voltage between the two modulation electrodes and output the incident light which is modulated; an input/output optical fiber 2 connected with the optical modulator 1; two contact terminal attachment portions 5, 6 to which contact terminals 3, 4 can be detachably attached and contacted, the two contact terminals 3, 4 being configured to be in contact with the points to be measured, the two contact terminal attachment portions 5, 6 being respectively connected with the modulation electrodes 11, 12; and a package 8 that houses the optical modulator 1 and a part of the input/output optical fiber 2. A voltage signal induced via the contact terminals 3, 4 is converted into an optical intensity modulation signal.

Abstract: A method for generating a transmission line model includes classifying a transmission line which is a modeling target as one of at least two types comprising an end line and a middle line according to a laid state of the transmission line and modeling the end line and the middle line individually to generate an end-line model and a middle-line model. The end-line model and the middle-line model each include, as parameters representing their respective transmission characteristics, a characteristic impedance and a delay time. A method for computer simulation includes evaluating the immunity characteristics or emission characteristics of a tested device while sweeping a parameter which is a parameter, left variable, of a transmission line model that models the transmission line to which the tested device is connected.

Abstract: A method of evaluating a device includes a first electric circuit acting as a noise source and a second electric circuit which is likely to malfunction due to a noise signal. The method includes: obtaining malfunction frequency characteristics indicating magnitudes of a threshold noise signal causing malfunction of the second electric circuit; obtaining internal noise arrival frequency characteristics indicating magnitudes of an internal noise signal arriving at the second electric circuit from the first electric circuit; and comparing the malfunction frequency characteristics with the internal noise arrival frequency characteristics.

Abstract: A method for evaluating a device including a plurality of electric circuits has: a step of finding a first malfunction frequency property for individual electric circuits included in the device, the first malfunction frequency property representing the magnitude of a critical noise signal at which each electric circuit causes a malfunction; and a step of finding a second malfunction frequency property based on the first malfunction frequency property found for each of the electric circuits, an equivalent circuit of the entire device, and an equivalent circuit of each of the electric circuits, the second malfunction frequency property representing the magnitude of a critical noise signal at which the entire device causes a malfunction.

Abstract: A method for generating a transmission line model includes classifying a transmission line which is a modeling target as one of at least two types comprising an end line and a middle line according to a laid state of the transmission line and modeling the end line and the middle line individually to generate an end-line model and a middle-line model. The end-line model and the middle-line model each include, as parameters representing their respective transmission characteristics, a characteristic impedance and a delay time. A method for computer simulation includes evaluating the immunity characteristics or emission characteristics of a tested device while sweeping a parameter which is a parameter, left variable, of a transmission line model that models the transmission line to which the tested device is connected.

Abstract: A switching transistor is configured such that its on resistance RON is switchable between at least two values RON1 and RON2. When the switching transistor is switched from off to on, a control circuit sets the on resistance of the switching transistor to the first value RON1 for a first period immediately after the switching of the switching transistor. Subsequently, for a second period until the switching transistor is turned off, the control circuit sets the on resistance of the switching transistor to the second value RON2 that is smaller than the first value RON1.

Abstract: A noise signal for a malfunction test is inputted to a ground terminal, and a frequency property of the magnitude of the power at which a designated electric circuit causes a malfunction is found. A detection reference ground of a detection part for detecting malfunctions of the designated electric circuit is connected at high impedance to a ground of the targeted circuit. Differential input parts are provided to the detection part, a to-be-detected part of the designated electric circuit is connected to one differential input part, and the ground of the targeted circuit is connected to the other differential input part. A ground of a noise source is isolated from a ground of a power source circuit for supplying a power source to the designated electric circuit. The ground of the noise source is galvanically isolated from the ground of the designated electric circuit.

Abstract: The electric circuit evaluation method according to the present invention is characterized in that a designated electric circuit is placed inside a shield structure, a noise signal for a malfunction test is inputted to the designated electric circuit, a short-circuit is established between a ground of the shield structure and a ground of a noise source for inputting a noise signal for a malfunction test to the designated electric circuit, and the ground of the designated electric circuit and the ground of the shield structure are isolated.

Abstract: The electric circuit evaluation method according to the present invention comprises: a step for finding a malfunction power frequency property, in which the magnitude of a critical noise signal at which a designated electric circuit causes a malfunction is represented by the power injected into the designated electric circuit; and a step for finding a malfunction current frequency property, in which the magnitude of the critical noise signal at which the designated electric circuit causes a malfunction is represented by a current (I_LSI) flowing to a predetermined portion of the designated electric circuit, and a malfunction voltage frequency property, in which the magnitude of the critical noise signal at which the designated electric circuit causes a malfunction is represented by a voltage (V_LSI) occurring between predetermined points of the designated electric circuit, both of which properties found from the malfunction power frequency property.

Abstract: A switching transistor is configured such that its on resistance RON is switchable between at least two values RON1 and RON2. When the switching transistor is switched from off to on, a control circuit sets the on resistance of the switching transistor to the first value RON1 for a first period immediately after the switching of the switching transistor. Subsequently, for a second period until the switching transistor is turned off, the control circuit sets the on resistance of the switching transistor to the second value RON2 that is smaller than the first value RON1.

Abstract: A switching transistor is configured such that its on resistance RON is switchable between at least two values RON1 and RON2. When the switching transistor is switched from off to on, a control circuit sets the on resistance of the switching transistor to the first value RON1 for a first period immediately after the switching of the switching transistor. Subsequently, for a second period until the switching transistor is turned off, the control circuit sets the on resistance of the switching transistor to the second value RON2 that is smaller than the first value RON1.

Abstract: A method of evaluating a device includes a first electric circuit acting as a noise source and a second electric circuit which is likely to malfunction due to a noise signal. The method includes: obtaining malfunction frequency characteristics indicating magnitudes of a threshold noise signal causing malfunction of the second electric circuit; obtaining internal noise arrival frequency characteristics indicating magnitudes of an internal noise signal arriving at the second electric circuit from the first electric circuit; and comparing the malfunction frequency characteristics with the internal noise arrival frequency characteristics.

Abstract: A method for evaluating a device including a plurality of electric circuits has: a step of finding a first malfunction frequency property for individual electric circuits included in the device, the first malfunction frequency property representing the magnitude of a critical noise signal at which each electric circuit causes a malfunction; and a step of finding a second malfunction frequency property based on the first malfunction frequency property found for each of the electric circuits, an equivalent circuit of the entire device, and an equivalent circuit of each of the electric circuits, the second malfunction frequency property representing the magnitude of a critical noise signal at which the entire device causes a malfunction.

Abstract: The electric circuit evaluation method according to the present invention comprises: a step for finding a malfunction power frequency property, in which the magnitude of a critical noise signal at which a designated electric circuit causes a malfunction is represented by the power injected into the designated electric circuit; and a step for finding a malfunction current frequency property, in which the magnitude of the critical noise signal at which the designated electric circuit causes a malfunction is represented by a current (I_LSI) flowing to a predetermined portion of the designated electric circuit, and a malfunction voltage frequency property, in which the magnitude of the critical noise signal at which the designated electric circuit causes a malfunction is represented by a voltage (V_LSI) occurring between predetermined points of the designated electric circuit, both of which properties found from the malfunction power frequency property.

Abstract: A noise signal for a malfunction test is inputted to a ground terminal, and a frequency property of the magnitude of the power at which a designated electric circuit causes a malfunction is found. A detection reference ground of a detection part for detecting malfunctions of the designated electric circuit is connected at high impedance to a ground of the targeted circuit. Differential input parts are provided to the detection part, a to-be-detected part of the designated electric circuit is connected to one differential input part, and the ground of the targeted circuit is connected to the other differential input part. A ground of a noise source is isolated from a ground of a power source circuit for supplying a power source to the designated electric circuit. The ground of the noise source is galvanically isolated from the ground of the designated electric circuit.

Abstract: The electric circuit evaluation method according to the present invention is characterized in that a designated electric circuit is placed inside a shield structure, a noise signal for a malfunction test is inputted to the designated electric circuit, a short-circuit is established between a ground of the shield structure and a ground of a noise source for inputting a noise signal for a malfunction test to the designated electric circuit, and the ground of the designated electric circuit and the ground of the shield structure are isolated.

Abstract: A switching transistor is configured such that its on resistance RON is switchable between at least two values RON1 and RON2. When the switching transistor is switched from off to on, a control circuit sets the on resistance of the switching transistor to the first value RON1 for a first period immediately after the switching of the switching transistor. Subsequently, for a second period until the switching transistor is turned off, the control circuit sets the on resistance of the switching transistor to the second value RON2 that is smaller than the first value RON1.

Abstract: A semiconductor device has a package structure provided with leads that are external connection terminals. A base substance is an island, and at least the surface thereof is formed of a conductive material. A semiconductor substrate is mounted on the surface of the base substance, and a ground potential is supplied from the surface of the base substance. A shunt capacitor is provided with an electrode pair of a first electrode and a second electrode formed in parallel, and mounted with the first electrode being electrically connected to the surface of the base substance. An internal bonding wire connects a pad provided on the semiconductor substrate for external connection, to the second electrode of the shunt capacitor. The lead is the external connection terminal of the semiconductor device. An external bonding wire connects the lead to the second electrode of the shunt capacitor.

Abstract: A semiconductor device has a package structure provided with leads that are external connection terminals. A base substance is an island, and at least the surface thereof is formed of a conductive material. A semiconductor substrate is mounted on the surface of the base substance, and a ground potential is supplied from the surface of the base substance. A shunt capacitor is provided with an electrode pair of a first electrode and a second electrode formed in parallel, and mounted with the first electrode being electrically connected to the surface of the base substance. An internal bonding wire connects a pad provided on the semiconductor substrate for external connection, to the second electrode of the shunt capacitor. The lead is the external connection terminal of the semiconductor device. An external bonding wire connects the lead to the second electrode of the shunt capacitor.