Abstract: A semiconductor device has a package structure provided with leads that are external connection terminals. A base substance is an island, and at least the surface thereof is formed of a conductive material. A semiconductor substrate is mounted on the surface of the base substance, and a ground potential is supplied from the surface of the base substance. A shunt capacitor is provided with an electrode pair of a first electrode and a second electrode formed in parallel, and mounted with the first electrode being electrically connected to the surface of the base substance. An internal bonding wire connects a pad provided on the semiconductor substrate for external connection, to the second electrode of the shunt capacitor. The lead is the external connection terminal of the semiconductor device. An external bonding wire connects the lead to the second electrode of the shunt capacitor.

Abstract: A semiconductor device has a package structure provided with leads that are external connection terminals. A base substance is an island, and at least the surface thereof is formed of a conductive material. A semiconductor substrate is mounted on the surface of the base substance, and a ground potential is supplied from the surface of the base substance. A shunt capacitor is provided with an electrode pair of a first electrode and a second electrode formed in parallel, and mounted with the first electrode being electrically connected to the surface of the base substance. An internal bonding wire connects a pad provided on the semiconductor substrate for external connection, to the second electrode of the shunt capacitor. The lead is the external connection terminal of the semiconductor device. An external bonding wire connects the lead to the second electrode of the shunt capacitor.

Abstract: A semiconductor integrated circuit device having a plurality of internal circuits connected to different power lines, and an inter-circuit signal wire or a branched wire along these internal circuits, wherein near an active element in a first connection configuration connected to the inter-circuit signal wire or the like, a plurality of active elements in another connection configuration are arranged to sandwich or surround the active element in the first connection configuration. The active elements in the other connection configuration have the identical or similar structure to the active element in the first connection configuration, and are connected to power lines of an internal circuit associated therewith but not connected to signal wires and so on in the internal circuit.

Abstract: The present invention provides a steel wire rod excellent in scale peelability for mechanical descaling, and a manufacturing method thereof. The steel wire rod in accordance with the present invention has: a base metal portion formed of a steel containing C in an amount of not more than 1.1% and Si in an amount of 0.05 to 0.80% on a mass % basis as components; and a scale layer deposited on the surface of the base metal portion, wherein the Si average concentration in the interface portion of the scale with the base metal portion is not less than 2.0 times the Si content of the base metal portion.

Abstract: A semiconductor integrated circuit device having a plurality of internal circuits connected to different power lines, and an inter-circuit signal wire or a branched wire along these internal circuits, wherein near an active element in a first connection configuration connected to the inter-circuit signal wire or the like, a plurality of active elements in a second connection configuration are arranged to sandwich or surround the active element in the first connection configuration. The active elements in the second connection configuration have the identical or similar structure to the active element in the first connection configuration, and are connected to power lines of an internal circuit associated therewith but not connected to signal wires and so on in the internal circuit.

Abstract: A semiconductor integrated circuit device having a plurality of internal circuits connected to different power lines, and an inter-circuit signal wire or a branched wire along these internal circuits, wherein near an active element in a first connection configuration connected to the inter-circuit signal wire or the like, a plurality of active elements in a second connection configuration are arranged to sandwich or surround the active element in the first connection configuration. The active elements in the second connection configuration have the identical or similar structure to the active element in the first connection configuration, and are connected to power lines of an internal circuit associated therewith but not connected to signal wires and so on in the internal circuit.

Abstract: A semiconductor integrated circuit device having a plurality of internal circuits connected to different power lines, and an inter-circuit signal wire or a branched wire along these internal circuits, wherein near an active element in a first connection configuration connected to the inter-circuit signal wire or the like, a plurality of active elements in a second connection configuration are arranged to sandwich or surround the active element in the first connection configuration. The active elements in the second connection configuration have the identical or similar structure to the active element in the first connection configuration, and are connected to power lines of an internal circuit associated therewith but not connected to signal wires and so on in the internal circuit.

Abstract: Disclosed herein is a high-strength high-carbon steel wire which, owing to its high strength as well as good ductility, is excellent in resistance to strain aging embrittlement and longitudinal cracking. The steel wire is characterized by having a chemical composition (in mass %) including C: 0.75-1.20%, Si: 0.1-1.5%, Mn: 0.3-1.2%, P: no more than 0.02%, S: no more than 0.02%, Al: no more than 0.005%, and N: no more than 0.008%, with the remainder being Fe and inevitable impurities. The steel wire is further characterized by having worked pearlite structure containing lamellar cementite in amorphous form, a diameter (D) ranging from 0.15 to 0.4 mm, a metal lubricating film as the surface layer whose main phase is composed of at least one of Cu, Ni, and Zn or an alloy thereof, and tensile strength no lower than (3500×D−0.145) MPa and no higher than (3500×D−0.145+87×[C]−5) MPa, where [C] denotes C content in %.

Abstract: The present invention provides a steel wire rod excellent in scale peelability for mechanical descaling, and a manufacturing method thereof.

Abstract: A semiconductor integrated circuit device having a plurality of internal circuits connected to different power lines, and an inter-circuit signal wire or a branched wire along these internal circuits, wherein near an active element in a first connection configuration connected to the inter-circuit signal wire or the like, a plurality of active elements in another connection configuration are arranged to sandwich or surround the active element in the first connection configuration. The active elements in the other connection configuration have the identical or similar structure to the active element in the first connection configuration, and are connected to power lines of an internal circuit associated therewith but not connected to signal wires and so on in the internal circuit.

Abstract: There is provided a semiconductor device capable of properly processing RF signals even though the number of electrodes as well as terminals for external connection is large while pitches at which the electrodes are juxtaposed are narrower than those for the terminals for external connection. A reference electrode connected with a reference voltage line of integrated circuits is increased in number to plurality, and each of the reference electrodes is disposed on top of the semiconductor piece, and on opposite sides of the respective signal electrodes connected with the signal lines of the integral circuits while short circuited at a conductor layer. Further, a conductor layer is extended from the respective reference electrodes or the conductor layer towards both sides of the respective signal electrodes.

Abstract: There is provided a semiconductor device capable of properly processing RF signals even though the number of electrodes as well as terminals for external connection is large while pitches at which the electrodes are juxtaposed are narrower than those for the terminals for external connection. A reference electrode connected with a reference voltage line of integrated circuits is increased in number to plurality, and each of the reference electrodes is disposed on top of the semiconductor piece, and on opposite sides of the respective signal electrodes connected with the signal lines of the integral circuits while short circuited at a conductor layer. Further, a conductor layer is extended from the respective reference electrodes or the conductor layer towards both sides of the respective signal electrodes.

Abstract: Disclosed herein is a high-strength high-carbon steel wire which, owing to its high strength as well as good ductility, is excellent in resistance to strain aging embrittlement and longitudinal cracking.

Abstract: A semiconductor device according to the present invention includes a first guard ring having conductivity of one of N and P types and a second guard ring formed adjacent to the first guard ring and having conductivity of the other type. The first guard ring is formed by a plurality of land shaped well regions each correspondingly to one cell or a plurality of I/O cells and at least one of the well regions is connected to a first power source line and ay least one of the remaining well regions is connected to a second power source line.

Abstract: A semiconductor device is provided that is resistant to electrostatic breakdown by forming active elements for enhancing the protection capability by utilizing a guard ring. A circuit formation region is allocated on one surface of a one-chip substrate. Internal circuits, each surrounded by an associated guard ring are provided in the circuit formation region, and external connection terminals are provided outside the internal circuits. The internal circuits are connected to some of the external connection terminals and power lines. Each of the active elements, which become conductive when a voltage on one of the power lines exceeds a proper operating voltage of the internal circuit, is formed parasitic to the guard ring.

Abstract: A semiconductor device according to the present invention includes a first guard ring having conductivity of one of N and P types and a second guard ring formed adjacent to the first guard ring and having conductivity of the other type. The first guard ring is formed by a plurality of land shaped well regions each correspondingly to one cell or a plurality of I/O cells and at least one of the well regions is connected to a first power source line and ay least one of the remaining well regions is connected to a second power source line.

Abstract: A semiconductor integrated circuit device has a semiconductor chip, a plurality of input/output pads formed on the semiconductor chip, a frame on which the semiconductor chip is mounted, a plurality of inner leads arranged on the frame so as to extend radially with respect to each side of the semiconductor chip, and wires for connecting the input/output pads to the inner leads. The plurality of input/output pads are so arranged that, with respect to any two input/output pads that are connected to two adjacent inner leads, one input/output pad is placed on an imaginary line that is parallel to and a predetermined distance apart from the wire connecting the other input/output pad to the corresponding inner lead.

Abstract: A semiconductor integrated circuit device has an output circuit formed in a CMOS structure and composed of a P-channel MOS transistor that has its gate connected to an input terminal, has its source connected to a power source line, and has its drain connected to an output terminal and an N-channel MOS transistor that has its gate connected to the input terminal, has its source connected to ground, and has its drain connected to the output terminal. A first protection diode is formed in parallel with the source-drain channel of the P-channel MOS transistor. A first NPN-type transistor is so formed that its base is connected to ground and its collector-emitter path is connected in parallel with the source-drain channel of the P-channel MOS transistor. A second protection diode is formed in parallel with the source-drain channel of the N-channel MOS transistor. A thyristor circuit is provided in parallel with the source-drain channel of the N-channel MOS transistor.

Abstract: A semiconductor integrated circuit device has a semiconductor chip having a plurality of input/output circuits and input/output pads connected individually thereto by metal conductors, and also has a frame on which the semiconductor chip is mounted. The pads of the semiconductor chip and a plurality of inner leads arranged on the frame are connected by wires that are wire-bonded thereto. The pads are arranged in two rows along each edge of the semiconductor chip. In the outer row, the pads are grouped into groups each consisting of pads arranged as close as possible to one another; spaces are secured between those groups and wires are arranged through those spaces. In the inner row, the pads are arranged in such positions where they can be connected to the wires arranged through the spaces secured between the groups of pads.

Abstract: A static protection circuit has a first MOS transistor of a P-channel type whose source-drain channel is connected between a signal line leading to an external connection terminal and ground; it also has a second MOS transistor of a P-channel type. This second MOS transistor has its drain connected to the gate of the first MOS transistor, has its source connected through a first resistor to a power source line, and has its gate connected through a second resistor to ground.