Patents by Inventor Noriaki Kodama

Noriaki Kodama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5255237
    Abstract: There is provided a method of erasing a nonvolatile semiconductor storage having a floating gate electrode with a constant threshold voltage of a memory cell transistor after an erasing operation and further with high security of superior repeat characteristics of a writing and an erasing operation and voltages free of miss-writing. On the erasing operation, a p-type semiconductor substrate is made into an earth ground, a drain is made into a floating potential and continuous pulses of negative high voltage of which parameters of multiplying pulse intervals by applying pulse numbers is 0.1 seconds or more are applied to a control gate electrode to perform intermittently the Fowler-Nordheim tunnelling of electrons from a floating gate electrode to the p-type semiconductor substrate.
    Type: Grant
    Filed: April 10, 1992
    Date of Patent: October 19, 1993
    Assignee: NEC Corporation
    Inventor: Noriaki Kodama
  • Patent number: 5233210
    Abstract: A non-volatile memory includes a sheet-shaped source line consisting of a conductive layer. The source line includes an opening at an area including a bit contact area above a drain diffusion layer. The bit contact is formed through self-alignment to the opening of the source line and a control gate electrode. In such a structure, a pitch of the bit contact in the direction parallel to the control gate electrode can be set to be a value twice of the minimum size in design.
    Type: Grant
    Filed: August 14, 1991
    Date of Patent: August 3, 1993
    Assignee: NEC Corporation
    Inventor: Noriaki Kodama