Patents by Inventor Noriaki Sakamoto

Noriaki Sakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9176412
    Abstract: Two-component developer includes positively chargeable toner and a carrier. The carrier is formed of a carrier core and a coating layer that covers the carrier core. The coating layer includes one or more types of fluorine-containing resin selected from the group consisting of fluorine containing polyimide resin and fluorine containing polyamide-imide resin. The positively chargeable toner includes binder resin and a charge control agent. A content of the charge control agent is 1.0% by mass or higher and 5.0% by mass or lower relative to a mass of the toner.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: November 3, 2015
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Noriaki Sakamoto
  • Patent number: 9124351
    Abstract: A communication terminal according to one aspect of the present invention includes a baseband LSI that performs baseband processing for communication, an application LSI that includes a vocoder function and performs processing according to an application, an audio LSI that performs one of D/A conversion and A/D conversion on audio data, and a switch circuit that is installed in the application LSI and connects a data path between the audio processor LSI and the baseband LSI.
    Type: Grant
    Filed: August 19, 2012
    Date of Patent: September 1, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Yutaka Uchimura, Takahiro Irita, Noriaki Sakamoto
  • Publication number: 20150212438
    Abstract: A toner includes a plurality of toner particles each having a core and a shell layer residing on a surface of the core. Each of the toner particles has a distribution of surface potential, as measured by a scanning probe microscope with respect to a 1 ?m2 region of the toner particle in a state where no external additive adheres thereto, satisfying that the surface potential is at least Vmin+?V×0.4 in at least 70% and no greater than 95% of the 1 ?m2 region, where ?V denotes a potential difference calculated by subtracting a minimum surface potential Vmin of the 1 ?m2 region from a maximum surface potential Vmax of the 1 ?m2 region.
    Type: Application
    Filed: January 16, 2015
    Publication date: July 30, 2015
    Applicant: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventor: Noriaki SAKAMOTO
  • Publication number: 20150212440
    Abstract: A toner includes toner particles each including a core and a shell layer disposed over a surface thereof. The shell layers contain a unit derived from a thermoplastic resin and a unit derived from a monomer or prepolymer of a thermosetting resin. Young's moduli of the shell layers and the cores, as measured using an SPM while raising cantilever temperature thereof, satisfy conditions: X2/X1 is at least 2.0 and no greater than 5.0; and Y2/Y1 is at least 4.0 and no greater than 7.0. X1 denotes a proportion of change of the Young's modulus of the shell layers and X2 denotes a proportion of change of the Young's modulus of the cores from 30° C. to 50° C. Y1 denotes a proportion of change of the Young's modulus of the shell layers and Y2 denotes a proportion of change of the Young's modulus of the cores from 50° C. to 70° C.
    Type: Application
    Filed: January 20, 2015
    Publication date: July 30, 2015
    Applicant: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventors: Yoshio OZAWA, Noriaki SAKAMOTO, Kazuki TSUCHIHASHI
  • Publication number: 20150212439
    Abstract: A toner includes a plurality of toner particles each including a core and a shell layer residing on a surface of the core. The shell layer has a plurality of cavities each exposing the core. Each of the toner particles has a distribution of surface hardness, as measured by a scanning probe microscope in a state where no external additive adheres to the toner particle, satisfying that the surface hardness is at least 1.10 times a surface hardness Ss in at least 75% and no greater than 95% by area ratio of a surface of the toner particle, where Ss denotes the surface hardness at a location where the core is exposed through any of the cavities.
    Type: Application
    Filed: January 16, 2015
    Publication date: July 30, 2015
    Applicant: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventors: Noriaki SAKAMOTO, Takatoshi NOZAKI
  • Publication number: 20150212441
    Abstract: A toner contains a plurality of toner particles. Each of the toner particles includes a toner core containing a binder resin, a shell layer disposed over a surface of the toner core, internal particles located within the shell layer, and an external additive located on a surface of the shell layer. Each of the toner particles has 4 to 169 projections resulting from the internal particles and having a height of no less than 40 nm and no greater than 200 nm when a 1-?m2 region of the surface of the toner particle is observed, and the projections satisfy the following equation (1) {(1000/2Y)?0.5}2?X?{(1000/2Y)+0.5}2??(1) wherein X represents the number of the projections, and Y represents the height of the projections.
    Type: Application
    Filed: January 26, 2015
    Publication date: July 30, 2015
    Applicant: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventors: Takatoshi NOZAKI, Noriaki SAKAMOTO
  • Publication number: 20150205220
    Abstract: A toner includes a plurality of toner particles that each include a core and a shell layer disposed over a surface of the core. The shell layer contains a unit derived from a thermoplastic resin and a unit derived from a monomer or prepolymer of a thermosetting resin. A surface of each of the toner particles has a Young's modulus that changes by a proportion of no greater than 20% from 30° C. to 50° C., and changes by a proportion from 50° C. to 70° C. that when divided by the proportion of change from 30° C. to 50° C., yields a value of at least 3.0 and no greater than 10.0. The Young's modulus is measured in a state in which an external additive is not adhered to the toner particle using a scanning probe microscope while raising a cantilever temperature thereof.
    Type: Application
    Filed: January 15, 2015
    Publication date: July 23, 2015
    Applicant: KYOCERA Document Solutions Inc.
    Inventors: Yoshio OZAWA, Noriaki SAKAMOTO, Ken MAETANI
  • Publication number: 20150029408
    Abstract: According to one embodiment, a unit includes a casing and a connection terminal. The casing has a first surface, a second surface opposite to the first surface, and an attachment hole. The connection terminal has a connection portion which is inserted through the attachment hole from the side of the second surface and thus protrudes on the side of the first surface, a flange which is provided at the proximal end of the connection portion and which has a size that does not allow the passage of the flange through the attachment hole, and a holding portion which holds the casing between this holding portion and the flange located on the side of the second surface opposite to the first surface.
    Type: Application
    Filed: December 20, 2013
    Publication date: January 29, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hajime Suzuki, Koji Shingu, Yuuji Ono, Masahiro Kobayashi, Noriaki Sakamoto
  • Publication number: 20150017582
    Abstract: An electrostatic latent image developing toner includes toner particles each including a toner core and a shell layer. The shell layer contains a resin including a unit derived from a monomer of a thermosetting resin and a unit derived from a thermoplastic resin. The thermosetting resin is one or more resins selected from the group of amino resins consisting of a melamine resin, a urea resin, and a glyoxal resin. When heat and pressure are applied to a toner layer formed on a polyester film under conditions of a temperature of 140° C. and a pressure of 7 MPa so that the toner particles are not superimposed, the toner particles of the toner layer are broken in a manner that a melt of a component of the toner core flows out from a plurality of points in an outer surface of the shell layer.
    Type: Application
    Filed: July 7, 2014
    Publication date: January 15, 2015
    Applicant: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventors: Yoshio OZAWA, Noriaki SAKAMOTO, Hiroaki MORIYAMA, Tomoyuki OGAWA, Takatoshi NOZAKI
  • Publication number: 20140134530
    Abstract: Two-component developer includes positively chargeable toner and a carrier. The carrier is formed of a carrier core and a coating layer that covers the carrier core. The coating layer includes one or more types of fluorine-containing resin selected from the group consisting of fluorine containing polyimide resin and fluorine containing polyamide-imide resin. The positively chargeable toner includes binder resin and a charge control agent. A content of the charge control agent is 1.0% by mass or higher and 5.0% by mass or lower relative to a mass of the toner.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 15, 2014
    Applicant: KYOCERA DOCUMENT SOLUTIONS INC.
    Inventor: Noriaki SAKAMOTO
  • Patent number: 8711574
    Abstract: According to one embodiment, an electronic device includes a printed circuit board includes a plurality of circuit parts, a conductive shield case provided on the printed circuit board, a tuner provided on the printed circuit board and inside the shield case, a first ground portion provided on the printed circuit board and outside the shield case and a second ground portion provided on the printed circuit board and inside the shield case. The first ground portion is electrically connected to the second ground portion via the shield case.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: April 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Kobayashi, Noriaki Sakamoto
  • Publication number: 20130335638
    Abstract: According to one embodiment, an electronic apparatus includes a housing, a board in the housing, an electrically conductive shield unit, a connector, and an extending portion. The housing includes an opening. The electrically conductive shield unit includes a first section and a second section intersecting the first section at an end portion of the first section and configured to be secured to the board. The connector is on the board, configured to be secured to the first section of the shield unit, and exposed through the opening of the housing. The extending portion extends from the end portion of the first section of the shield unit and is configured to be secured to the board.
    Type: Application
    Filed: February 20, 2013
    Publication date: December 19, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Noriaki Sakamoto, Masahiro Kobayashi, Hajime Suzuki
  • Publication number: 20130053111
    Abstract: A communication terminal according to one aspect of the present invention includes a baseband LSI that performs baseband processing for communication, an application LSI that includes a vocoder function and performs processing according to an application, an audio LSI that performs one of D/A conversion and A/D conversion on audio data, and a switch circuit that is installed in the application LSI and connects a data path between the audio processor LSI and the baseband LSI.
    Type: Application
    Filed: August 19, 2012
    Publication date: February 28, 2013
    Inventors: Yutaka UCHIMURA, Takahiro IRITA, Noriaki SAKAMOTO
  • Publication number: 20130003326
    Abstract: According to one embodiment, an electronic device includes a printed circuit board includes a plurality of circuit parts, a conductive shield case provided on the printed circuit board, a tuner provided on the printed circuit board and inside the shield case, a first ground portion provided on the printed circuit board and outside the shield case and a second ground portion provided on the printed circuit board and inside the shield case. The first ground portion is electrically connected to the second ground portion via the shield case.
    Type: Application
    Filed: February 22, 2012
    Publication date: January 3, 2013
    Inventors: Masahiro Kobayashi, Noriaki Sakamoto
  • Patent number: 8283681
    Abstract: A lighting device including a metal substrate to prevent temperature rise of LED chip is offered. The lighting device includes the metal substrate, an anode or cathode electrode of the LED chip disposed on the metal substrate, brazing materials connecting the LED chip and the metal substrate, and a groove formed in the anode or cathode electrode. Forming the groove can prevent an occurrence of a crack in the brazing materials. Also, a lighting device includes the metal substrate, an anode and cathode electrode of the LED chip disposed on the metal substrate and brazing materials connecting the LED chip and the metal substrate. Further, a slit is formed in the metal substrate between the anode and cathode electrode. Forming the slit in the metal substrate can prevent an occurrence of a crack in the brazing materials.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: October 9, 2012
    Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd.
    Inventors: Noriaki Sakamoto, Naoki Tanahashi, Tsuyoshi Hasegawa, Takaya Kusabe, Masahiko Mizutani, Hideki Mizuhara, Yoshinari Sakuma
  • Patent number: 8203848
    Abstract: Provided is a simplified structure of a circuit device in which a power element generating a large amount of heat is incorporated. The circuit device according to the present invention includes: a circuit board whose surface is covered with an insulating layer; a conductive pattern formed on the surface of the insulating layer; a circuit element electrically connected to the conductive pattern; and a lead connected to a pad formed of the conductive pattern. Furthermore, a power element is fixed to the top surface of a land portion formed of a part of the lead. Accordingly, the land portion serves as a heat sink, thereby contributing to heat dissipation.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: June 19, 2012
    Assignee: SANYO Electric Co., Ltd.
    Inventors: Sadamichi Takakusaki, Noriaki Sakamoto
  • Publication number: 20110241025
    Abstract: A lighting device including a metal substrate to prevent temperature rise of LED chip is offered. The lighting device includes the metal substrate, an anode or cathode electrode of the LED chip disposed on the metal substrate, brazing materials connecting the LED chip and the metal substrate, and a groove formed in the anode or cathode electrode. Forming the groove can prevent an occurrence of a crack in the brazing materials. Also, a lighting device includes the metal substrate, an anode and cathode electrode of the LED chip disposed on the metal substrate and brazing materials connecting the LED chip and the metal substrate. Further, a slit is formed in the metal substrate between the anode and cathode electrode. Forming the slit in the metal substrate can prevent an occurrence of a crack in the brazing materials.
    Type: Application
    Filed: October 15, 2010
    Publication date: October 6, 2011
    Applicants: SANYO ELECTRIC CO., LTD., SANYO SEMICONDUCTOR CO., LTD.
    Inventors: Noriaki SAKAMOTO, Naoki Tanahashi, Tsuyoshi Hasegawa, Takaya Kusabe, Masahiko Mizutani, Hideki Mizuhara, Yoshinari Sakuma
  • Publication number: 20110241808
    Abstract: According to one embodiment, a tuner module, including: a substantially box-shaped casing; an input terminal attached to one side plate of the casing; a distributor disposed in the casing around the input terminal; a first tuner disposed adjoining the distributor so as to sandwich the distributor with the input terminal; a second tuner disposed adjoining the first tuner so as to sandwich the first tuner with the distributor; and a circuit board on which the distributor, the first tuner and the second tuner are mounted.
    Type: Application
    Filed: January 10, 2011
    Publication date: October 6, 2011
    Inventors: Haiyan Zhao, Masahiro Kobayashi, Noriaki Sakamoto
  • Patent number: 7998795
    Abstract: A method for manufacturing a semiconductor device includes mounting a first chip over a first area of a chip mounting section of a lead frame and mounting a second chip over a second area of the chip mounting section, wherein the second area is adjacent to the first area via the slit. The chip mounting section is disposed on a flat heating jig. First pads of the first chip are connected with second pads of the second chip via first wires, respectively, and the first pads are connected with leads of the lead frame via second wires, respectively. the first chip, the second chip, the first wires and the second wires are sealed with a resin such that a part of each of the leads is exposed from the resin, and each of the leads is then separated from the lead frame.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: August 16, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Fujio Ito, Hiromichi Suzuki, Akihiko Kameoka, Noriaki Sakamoto
  • Patent number: 7957158
    Abstract: A circuit device having improved packaging density is provided. A circuit device of the present invention includes: a circuit board having its surface covered with an insulating layer; conductive patterns formed on a surface of the insulating layer; circuit elements electrically connected to the conductive patterns; and leads connected to pads formed of the conductive patterns. Furthermore, a control element is fixed to an upper surface of a land part formed of a part of a lead, and a back surface of the land part is spaced apart from an upper surface of the circuit board.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: June 7, 2011
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventors: Sadamichi Takakusaki, Noriaki Sakamoto, Katsuyoshi Mino