Patents by Inventor Norikatsu Koide

Norikatsu Koide has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6821800
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1-Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1-Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: November 23, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6822270
    Abstract: The semiconductor light emitting device has a gallium nitride base compound semiconductor layer expressed by a general formula of InxGayAlzN (x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1). A second intermediate layer is provided between a GaN layer and a light emitting layer, and the second intermediate layer has a lattice constant closer to that of the light emitting layer than that of the GaN layer. As such, when a substrate such as Si substrate having a smaller coefficient of thermal expansion than the nitride semiconductor film is employed, occurrence of cracks is prevented and good crystallinity of the nitride semiconductor film is assured, and accordingly, a long-life and high-luminance nitride base semiconductor light emitting device is obtained.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: November 23, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Norikatsu Koide, Akio Aioi, Takeshi Nishino
  • Patent number: 6818926
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: November 16, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6806115
    Abstract: A method for producing a semiconductor light emitting device includes the steps of forming a mask layer having a plurality of openings on a surface of a silicon substrate; and forming a column-like multi-layer structure including a light emitting layer in each of the plurality of openings with nitride semiconductor materials. A width between two adjacent openings of the plurality of openings of the mask layer is 10 &mgr;m or less.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: October 19, 2004
    Assignees: Sharp Kabushiki Kaisha
    Inventors: Norikatsu Koide, Junji Yamamoto, Tsuyoshi Dohkita, Nobuhiko Sawaki, Yoshio Honda, Yousuke Kuroiwa, Masahito Yamaguchi
  • Patent number: 6765234
    Abstract: A semiconductor light emitting device includes: a silicon substrate; and a plurality of column-shaped multilayered structures formed on the silicon substrate in such a manner that the column-shaped multilayered structures are insulated from one another, the column-shaped multilayered structures being made of a nitride semiconductor material, and each column-shaped multilayered structure including a light emitting layer, wherein the column-shaped multilayered structures are connected to one another by an electrode.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: July 20, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Norikatsu Koide
  • Publication number: 20040079958
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Application
    Filed: October 15, 2003
    Publication date: April 29, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6703253
    Abstract: A method for producing a semiconductor light emitting device, including at least one first column-like multi-layer structure provided on a substrate and containing nitride-based semiconductor compound semiconductor layers represented by the general formula InxGay AlzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1), includes a first step of forming a plurality of grooves in the substrate; and a second step of forming a plurality of first column-like multi-layer structures on the substrate so as to be separated by the grooves.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: March 9, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Norikatsu Koide
  • Publication number: 20040026705
    Abstract: A barrier layer made of AlxGa1-xN (0<x≦0.18) is formed in a light-emitting semiconductor device using gallium nitride compound having a multi quantum-well (MQW) structure. By controlling a composition ratio x of aluminum (Al) or thickness of the barrier layer, luminous intensity of the device is improved.
    Type: Application
    Filed: August 6, 2003
    Publication date: February 12, 2004
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Hisaki Kato, Hiroshi Watanabe, Norikatsu Koide, Shinya Asami
  • Publication number: 20030218179
    Abstract: The nitride-based semiconductor light-emitting device and manufacturing method thereof are disclosed: the nitride-based semiconductor light-emitting device includes a reflective layer formed on a support substrate, a p-type nitride-based semiconductor layer, a light-emitting layer and an n-type nitride-based semiconductor layer successively formed on the reflective layer, wherein irregularities are formed on a light extracting surface located above the n-type nitride-based semiconductor layer.
    Type: Application
    Filed: April 23, 2003
    Publication date: November 27, 2003
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Norikatsu Koide, Toshio Hata, Mayuko Fudeta, Daigaku Kimura
  • Patent number: 6635901
    Abstract: A semiconductor device includes a silicon substrate and a compound semiconductor layer formed on a main plane of the silicon substrate. The compound semiconductor layer is represented by the general formula of InxGayAlzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1). The silicon substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the silicon substrate, or a plane inclined in a range within 3 degrees in an arbitrary direction from the inclined plane. The compound semiconductor layer is formed on the slope. The semiconductor device includes compound semiconductor layers represented by AlxGayInzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1) on a silicon substrate. The silicon substrate has a main plane constituted by a plane in a range of ±5 degrees in an arbitrary direction from a (112) plane. The compound semiconductor layers are formed on the main plane.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: October 21, 2003
    Assignees: Sharp Kabushiki Kaisha
    Inventors: Nobuhiko Sawaki, Yoshio Honda, Norikatsu Koide, Katsuki Furukawa
  • Publication number: 20030178702
    Abstract: A light emitting semiconductor device includes a silicon substrate and a compound semiconductor layer disposed on a main plane of the silicon substrate and represented by a general expression InxGayAlzN, wherein x+y+z=1, 0≦x≦1, 0≦y≦1, and 0≦z≦1. The silicon substrate has a groove having an oblique plane corresponding to a plane inclined relative to the substrate's main plane by 62 degrees or a plane inclined relative to the inclined plane in any direction within three degrees, and on the oblique plane a plurality or quantum well layers different in thickness are stacked.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 25, 2003
    Inventors: Nobuhiko Sawaki, Norikatsu Koide, Kensaku Yamamoto
  • Publication number: 20030178634
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Application
    Filed: March 20, 2003
    Publication date: September 25, 2003
    Applicant: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Publication number: 20030173574
    Abstract: The semiconductor light emitting device has a gallium nitride base compound semiconductor layer expressed by a general formula of InxGayAlzN (x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1). A second intermediate layer is provided between a GaN layer and a light emitting layer, and the second intermediate layer has a lattice constant closer to that of the light emitting layer than that of the GaN layer. As such, when a substrate such as Si substrate having a smaller coefficient of thermal expansion than the nitride semiconductor film is employed, occurrence of cracks is prevented and good crystallinity of the nitride semiconductor film is assured, and accordingly, a long-life and high-luminance nitride base semiconductor light emitting device is obtained.
    Type: Application
    Filed: February 7, 2003
    Publication date: September 18, 2003
    Inventors: Norikatsu Koide, Akio Aioi, Takeshi Nishino
  • Patent number: 6617668
    Abstract: A layer comprising silicon oxide (SiO2) is formed on (111) plane of a silicon (Si) substrate in a striped pattern which is longer in the [1-10] axis direction perpendicular to the [110] axis direction. Then a group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1) is laminated thereon. The group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1) grows epitaxially on the substrate-exposed regions B which are not covered by the SiO2 layer, and grows epitaxially on the SiO2 layer in lateral direction from the regions B. Consequently, a group III nitride compound semiconductor having no dislocations can be obtained.
    Type: Grant
    Filed: May 19, 2000
    Date of Patent: September 9, 2003
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Hisaki Kato
  • Publication number: 20030155586
    Abstract: A layer comprising silicon oxide (SiO2) is formed on (111) plane of a silicon (Si) substrate in a striped pattern which is longer in the [1-10] axis direction perpendicular to the [110] axis direction. Then a group III nitride compound semiconductor represented by a general formula AlxGayIn1−x−yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1) is laminated thereon. The group III nitride compound semiconductor represented by a general formula AlxGayIn1−x−yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1) grows epitaxially on the substrate-exposed regions B which are not covered by the SiO2 layer, and grows epitaxially on the SiO2 layer in lateral direction from the regions B. Consequently, a group III nitride compound semiconductor having no dislocations can be obtained.
    Type: Application
    Filed: March 7, 2003
    Publication date: August 21, 2003
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Hisaki Kato
  • Publication number: 20030157738
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Application
    Filed: March 20, 2003
    Publication date: August 21, 2003
    Applicant: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6607595
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlXGa1-xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1-XN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1-xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semiconductor (AlxGa1-x
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: August 19, 2003
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyu sho, Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hasimoto, Isamu Akasaki
  • Patent number: 6593599
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: July 15, 2003
    Assignees: Japan Science and Technology Corporation, Toyoda Gosei Co., Ltd., Nagoya University
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Publication number: 20030124789
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1−Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1−Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Application
    Filed: December 23, 2002
    Publication date: July 3, 2003
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Publication number: 20030116774
    Abstract: A nitride-based semiconductor light-emitting device includes: a conductive semiconductor substrate having first and second main surfaces; a high resistant or insulative intermediate layer formed on the first main surface of the substrate; a plurality of nitride semiconductor layers of AlxByInzGa1-x-y-zN (0<x≦1, 0≦y<1, 0≦z≦1, x+y+z=1) formed on the intermediate layer, the nitride semiconductor layers including at least one first conductivity type layer, a light-emitting layer and at least one second conductivity type layer sequentially stacked on the intermediate layer; a metal film penetrating through or detouring around the intermediate layer to connect the first conductivity type layer in contact with the intermediate layer to the conductive substrate; a first electrode formed on the second conductivity type layer; and a second electrode formed on the second main surface of the substrate.
    Type: Application
    Filed: December 4, 2002
    Publication date: June 26, 2003
    Inventors: Kensaku Yamamoto, Norikatsu Koide