Patents by Inventor Norikatsu Koide

Norikatsu Koide has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6188087
    Abstract: A novel light-emitting device includes a sapphire substrate with a light-emitting layer comprising InXGa1−XN, where the critical value of the indium mole fraction X is determined by a newly derived relationship between the indium mole fraction X and the wavelength &lgr; of emitted light.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: February 13, 2001
    Assignees: Toyoda Gosei Co., Ltd, Isamu Akasaki, Hiroshi Amano
    Inventors: Norikatsu Koide, Masayoshi Koike, Shiro Yamasaki, Isamu Akasaki, Hiroshi Amano
  • Patent number: 6121121
    Abstract: An Al.sub.0.15 Ga.sub.0.85 N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al.sub.0.15 Ga.sub.0.85 N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: September 19, 2000
    Assignee: Toyoda Gosei Co., Ltd
    Inventor: Norikatsu Koide
  • Patent number: 6040588
    Abstract: A semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of In.sub.Y1 Ga.sub.1-Y1 N (Y1.gtoreq.0) and a quantum well layer being made of In.sub.Y2 Ga.sub.1-Y1 N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: March 21, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 5862167
    Abstract: A light-emitting diode or laser diode is provided which uses a Group III nitride compound semiconductor satisfying the formula (Al.sub.x Ga.sub.1-x).sub.y In.sub.1-y N, inclusive of 0.ltoreq.x.ltoreq.1, and 0.ltoreq.y.ltoreq.1. A double hetero-junction structure is provided which sandwiches an active layer between layers having wider band gaps than the active layer. The diode has a multi-layer structure which has either a reflecting layer to reflect emission light or a reflection inhibiting layer. The emission light of the diode exits the diode in a direction perpendicular to the double hetero-junction structure. Light emitted in a direction opposite to the light outlet is reflected by the reflecting film toward the direction of the light outlet. Further, the reflection inhibiting film, disposed at or near the light outlet, helps the release of exiting light by minimizing or preventing reflection. As a result, light can be efficiently emitted by the light-generating diode.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: January 19, 1999
    Assignees: Toyoda Gosei Co., Ltd., Research Development Corporation of Japan, Isamu Akasaki, Hiroshi Amano
    Inventors: Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Junichi Umezaki, Naoki Shibata, Masayoshi Koike, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5733796
    Abstract: A light-emitting semiconductor device using a gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N) having an i.sub.L -layer of insulating gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) containing a low concentration of p-type impurities. An i.sub.H -layer of insulating gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) containing a high concentration of p-type impurities is adjacent to the i.sub.L -layer. An n-layer of n-type gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) of low carrier concentration is adjacent to the i.sub.L -layer. An n.sup.+ -layer of n-type gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N, inclusive of x=0) of high carrier concentration doped with n-type impurities is adjacent to the n-layer.
    Type: Grant
    Filed: November 9, 1995
    Date of Patent: March 31, 1998
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyusho, Nagoya University, Research Development Corporation of Japan
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 5650641
    Abstract: A light-emitting semiconductor device (100) suitable for use in multi-color flat panel displays includes a sapphire substrate (1), an AlN buffer layer (2), a silicon (Si) doped GaN n.sup.+ -layer (3) of high carrier (n-type) concentration, a Si-doped (Al.sub.x2 Ga.sub.1 -x.sub.2).sub.y2 In.sub.1-2 N n.sup.+ -layer (4) of high carrier (n-type) concentration, a zinc (Zn) and Si-doped p-type (Al.sub.x1 Ga.sub.1-x1).sub.y1 In.sub.1-y1 N emission layer (5), and a Mg-doped (Al.sub.x2 Ga.sub.1-x2).sub.y2 In.sub.1-y2 N p-layer (6). The AlN layer (2) has a 500 .ANG. thickness. The GaN n.sup.+ -layer (3) is about a 2.0 .mu.m thick and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The n.sup.+ -layer (4) is about a 2.0 .mu.m in thickness and has a 2.times.10.sup.18 /cm.sup.3 electron concentration. The emission layer (5) is about 0.5 .mu.m thick. The p-layer 6 is about 1.0 .mu.m thick and has a 2.times.10.sup.17 /cm.sup.3 hole concentration. Nickel electrodes (7, 8) are connected to the p-layer (6) and n.sup.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: July 22, 1997
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Michinari Sassa, Masayoshi Koike, Katsuhide Manabe, Norikatsu Koide, Hisaki Kato, Naoki Shibata, Makoto Asai, Shinya Asami
  • Patent number: 5627109
    Abstract: A sapphire wafer is sliced off parallel to a plane "a" {1120} so that patterns on its top surface are rectangular in shape as defined by an axis "c" (0001) and an axis "m" (1010). The sapphire wafer is fixed on a table. A scriber blade that is coated with synthetic diamond scribes the surface of the sapphire wafer so that scribe lines are formed in a checkered pattern. One of the scribe lines is inclined from axis "c" (001) by 20 to 70 degrees in a clockwise direction and the other scribe line is inclined from the axis "c" (001) by 20 to 70 degrees in a counterclockwise direction. After scribing, pressure is applied by a roller along the scribe lines so as to cause the sapphire wafer to break into a sapphire chip. The yield of sapphire chips is increased by the use of this method because chipping is less likely to occur.
    Type: Grant
    Filed: September 15, 1995
    Date of Patent: May 6, 1997
    Inventors: Michinari Sassa, Norikatsu Koide
  • Patent number: 5620557
    Abstract: A method of manufacturing two sapphireless layers (3a, 3b) at one time made of Group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0, and a LED (10) utilizing one of the semiconductor layers (3a, 3b) as a substrate (3) includes the steps of forming two zinc oxide (ZnO) intermediate layers (2a, 2b) on each side of a sapphire substrate (1), forming two Group III nitride compound semiconductor layers (3a, 3b) satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0, each laminated on each of the intermediate ZnO layers (2a, 2b), and separating the intermediate ZnO layers (2a, 2b) from the sapphire substrate (1) by etching with an etching liquid only for the ZnO layers (2a, 2b).
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: April 15, 1997
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Katsuhide Manabe, Masayoshi Koike, Hisaki Kato, Norikatsu Koide, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5604763
    Abstract: An improved laser diode is made of a gallium nitride compound semiconductor ((Al.sub.x Ga.sub.1-x).sub.y In.sub.1-y N; 0.ltoreq.x.ltoreq.1; 0.ltoreq.x.ltoreq.1) with a double heterojunction structure having the active layer held between layers having a greater band gap. The laser diode comprises mirror surfaces formed by cleaving the multi-layered coating and the sapphire substrate in directions parallel to <0001> (c axis) of the sapphire substrate. The intermediate zinc oxide (ZnO) layer is selectively removed by wet etching with a ZnO-selective liquid etchant so as to form gaps between the sapphire substrate and the bottom-most sub-layer of the semiconductor laser element layer. The semiconductor laser element layer is cleaved with the aid of the gaps, and the resulting planes of cleavage are used as the mirror surfaces of the laser cavity.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: February 18, 1997
    Assignees: Toyoda Gosei Co., Ltd., Research Development of Japan, Isamu Akasaki, Hiroshi Amano
    Inventors: Hisaki Kato, Norikatsu Koide, Masayoshi Koike, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5587593
    Abstract: A light-emitting semiconductor device includes a sapphire substrate whose main surface orientation is tilted by 1 to 4 degrees from its axis "a" <1120>, and layers epitaxially formed thereon. Tilting the surface orientation of the sapphire substrate enables uniform doping of a p-type impurity into the layers epitaxially grown thereon. As a result, the luminous intensity of the light-emitting semiconductor device is improved.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: December 24, 1996
    Assignees: Toyoda Gosei Co., Ltd., Research Development Corporation of Japan
    Inventors: Norikatsu Koide, Shiro Yamazaki, Junichi Umezaki, Shinya Asami
  • Patent number: 5583879
    Abstract: A gallium nitride group compound semiconductor laser diode (10) satisfying the formula (Al.sub.x Ga.sub.1-x).sub.y In.sub.1-y N, inclusive of 0.ltoreq.x.ltoreq.1 and 0.ltoreq.y.ltoreq.1 comprises by a double hetero-junction structure sandwiching an active layer (5) between layers (4, 6) having wider band gaps than the active layer (5). The active layer (5) may comprise magnesium (Mg) doped p-type conductive gallium nitride group compound semiconductor satisfying the formula (Al.sub.x Ga.sub.1-x).sub.y In.sub.1-y N, inclusive of 0.ltoreq.x.ltoreq.1 and 0.ltoreq.y.ltoreq.1 . In another embodiment, the active layer (5) is doped with silicon (Si).
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: December 10, 1996
    Assignees: Toyoda Gosei Co., Ltd., Research Development, Isamu Akasaki, Hiroshi Amano
    Inventors: Shiro Yamazaki, Norikatsu Koide, Katsuhide Manabe, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5278433
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N) in which the n-layer of n-type gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N) is of double-layer structure including an n-layer of low carrier concentration and an n.sup.+ -layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (Al.sub.x Ga.sub.1-x N); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an i.sub.L -layer of low impurity concentration containing p-type impurities in comparatively low concentration and an i.sub.
    Type: Grant
    Filed: August 7, 1992
    Date of Patent: January 11, 1994
    Assignees: Toyoda Gosei Co., Ltd., Kabushiki Kaisha Toyota Chuo Kenkyusho, Nagoya University, Research Development Corporation of Japan
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki