Patents by Inventor Norikazu Nakamura

Norikazu Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140091320
    Abstract: A semiconductor device includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a third semiconductor layer and a fourth semiconductor layer formed on the second semiconductor layer, a gate electrode formed on the third semiconductor layer, and a source electrode and a drain electrode contacting and formed on the fourth semiconductor layer, wherein the third semiconductor layer is formed of a semiconductor material for attaining p-type on an area just under the gate electrode, and a concentration of silicon in the fourth semiconductor layer is higher than that in the second semiconductor layer.
    Type: Application
    Filed: August 16, 2013
    Publication date: April 3, 2014
    Applicants: FUJITSU SEMICONDUCTOR LIMITED, FUJITSU LIMITED
    Inventors: NORIKAZU NAKAMURA, Atsushi Yamada, Tetsuro Ishiguro, JUNJI KOTANI, Kenji Imanishi
  • Publication number: 20140091318
    Abstract: A semiconductor apparatus includes: a substrate; a buffer layer formed on the substrate; a strained layer superlattice buffer layer formed on the buffer layer; an electron transit layer formed of a semiconductor material on the strained layer superlattice buffer layer; and an electron supply layer formed of a semiconductor material on the electron transit layer; the strained layer superlattice buffer layer being an alternate stack of first lattice layers including AlN and second lattice layers including GaN; the strained layer superlattice buffer layer being doped with one, or two or more impurities selected from Fe, Mg and C.
    Type: Application
    Filed: July 29, 2013
    Publication date: April 3, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuro Ishiguro, Atsushi Yamada, Norikazu Nakamura
  • Publication number: 20140091317
    Abstract: A method of manufacturing a semiconductor crystal substrate, includes forming a nitride layer by supplying a gas including a nitrogen component to a substrate formed of a material including silicon and nitriding a surface of the substrate; and forming an AlN layer on the nitride layer by supplying the gas including the nitrogen component and a source gas including Al.
    Type: Application
    Filed: July 17, 2013
    Publication date: April 3, 2014
    Inventors: Shuichi TOMABECHI, JUNJI KOTANI, NORIKAZU NAKAMURA
  • Publication number: 20140091314
    Abstract: A semiconductor apparatus includes a buffer layer formed on a substrate; an SLS (Strained Layer Supperlattice) buffer layer formed on the buffer layer; an electron transit layer formed on the SLS buffer layer and formed of a semiconductor material; and an electron supply layer formed on the electron transit layer and formed of a semiconductor material. Further, the buffer layer is formed of AlGaN and includes two or more layers with different Al composition ratios, the SLS buffer layer is formed by alternately laminating a first lattice layer including AlN and a second lattice layer including GaN, and the Al composition ratio in one of the layers of the buffer layer being in contact with the SLS buffer layer is greater than or equal to an Al effective composition ratio in the SLS buffer layer.
    Type: Application
    Filed: July 5, 2013
    Publication date: April 3, 2014
    Inventors: Tetsuro ISHIGURO, Atsushi YAMADA, Norikazu NAKAMURA
  • Patent number: 8669592
    Abstract: A compound semiconductor multilayer structure is formed on a Si substrate. The compound semiconductor multilayer structure includes an electrode transit layer, an electrode donor layer formed above the electron transit layer, and a cap layer formed above the electron donor layer. The cap layer contains a first crystal polarized in the same direction as the electron transit layer and the electron donor layer and a second crystal polarized in the direction opposite to the polarization direction of the electron transit layer and the electron donor layer.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: March 11, 2014
    Assignee: Fujitsu Limited
    Inventors: Toyoo Miyajima, Kenji Imanishi, Atsushi Yamada, Norikazu Nakamura
  • Publication number: 20140015608
    Abstract: A compound semiconductor device includes: a compound semiconductor multilayer structure including a first buffer layer composed of AlN; and a second buffer layer composed of AlGaN and formed above the first buffer layer, wherein the second buffer layer contains carbon, and wherein the concentration of carbon in the second buffer layer increases with increasing distance from a lower surface of the second buffer layer toward an upper surface of the second buffer layer.
    Type: Application
    Filed: May 23, 2013
    Publication date: January 16, 2014
    Applicant: FUJITSU LIMITED
    Inventors: JUNJI KOTANI, NORIKAZU NAKAMURA
  • Publication number: 20130306102
    Abstract: A method of manufacturing a semiconductor device includes: holding a semiconductor substrate with a surface inclined with respect to the vertical direction and the horizontal direction; and immersing the semiconductor substrate in a cleaning solution including an acid.
    Type: Application
    Filed: July 26, 2013
    Publication date: November 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Masayuki TAKEDA, Norikazu NAKAMURA, Junichi KON
  • Publication number: 20130256693
    Abstract: A semiconductor device, includes a semiconductor layer formed above a substrate; an insulating film formed on the semiconductor layer; and an electrode formed on the insulating film. The insulating film has a membrane stress at a side of the semiconductor layer lower than a membrane stress at a side of the electrode.
    Type: Application
    Filed: May 25, 2013
    Publication date: October 3, 2013
    Applicant: Fujitsu Limited
    Inventors: Norikazu NAKAMURA, Shirou OZAKI, Masayuki TAKEDA, Keiji WATANABE
  • Publication number: 20130256690
    Abstract: A semiconductor device may include a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a source electrode and a drain electrode in contact with the first semiconductor layer or the second semiconductor layer, an opening formed in the second semiconductor layer, an insulating film formed on an inner surface of the opening formed in the second semiconductor layer and above the second semiconductor layer, a gate electrode formed in the opening via the insulating film, and a protective film formed on the insulating film and including an amorphous film containing carbon as a major component.
    Type: Application
    Filed: May 23, 2013
    Publication date: October 3, 2013
    Inventors: NORIKAZU NAKAMURA, SHIROU OZAKI, MASAYUKI TAKEDA, TOYOO MIYAJIMA, TOSHIHIRO OHKI, MASAHITO KANAMURA, KENJI IMANISHI, TOSHIHIDE KIKKAWA, KEIJI WATANABE
  • Publication number: 20130256682
    Abstract: An embodiment of a method of manufacturing a compound semiconductor device includes: forming an initial layer over a substrate; forming a buffer layer over the initial layer; forming an electron transport layer and an electron supply layer over the buffer layer; and forming a gate electrode, a source electrode and a gate electrode over the electron supply layer. The forming an initial layer includes: forming a first compound semiconductor film with a flow rate ratio being a first value, the flow rate ratio being a ratio of a flow rate of a V-group element source gas to a flow rate of a III-group element source gas; and forming a second compound semiconductor film with the flow rate ratio being a second value different from the first value over the first compound semiconductor film. The method further includes forming an Fe-doped region between the buffer layer and the electron transport layer.
    Type: Application
    Filed: December 11, 2012
    Publication date: October 3, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuro Ishiguro, Atsushi Yamada, Norikazu Nakamura, Kenji Imanishi
  • Publication number: 20130248872
    Abstract: A semiconductor device includes: a nucleation layer formed over a substrate; a buffer layer formed over the nucleation layer; a first nitride semiconductor layer formed over the buffer layer; and a second nitride semiconductor layer formed over the first nitride semiconductor layer, wherein the ratio of yellow luminescence emission to band edge emission in photoluminescence is 400% or less and the twist value in an X-ray rocking curve is 1,000 arcsec or less.
    Type: Application
    Filed: February 8, 2013
    Publication date: September 26, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Norikazu NAKAMURA, Atsushi YAMADA, Tetsuro ISHIGURO, Toyoo MIYAJIMA, Kenji IMANISHI
  • Patent number: 8487384
    Abstract: A semiconductor device, includes a semiconductor layer formed above a substrate; an insulating film formed on the semiconductor layer; and an electrode formed on the insulating film. The insulating film has a membrane stress at a side of the semiconductor layer lower than a membrane stress at a side of the electrode.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: July 16, 2013
    Assignee: Fujitsu Limited
    Inventors: Norikazu Nakamura, Shirou Ozaki, Masayuki Takeda, Keiji Watanabe
  • Publication number: 20130082360
    Abstract: A compound semiconductor multilayer structure is formed on a Si substrate. The compound semiconductor multilayer structure includes an electrode transit layer, an electrode donor layer formed above the electron transit layer, and a cap layer formed above the electron donor layer. The cap layer contains a first crystal polarized in the same direction as the electron transit layer and the electron donor layer and a second crystal polarized in the direction opposite to the polarization direction of the electron transit layer and the electron donor layer.
    Type: Application
    Filed: July 18, 2012
    Publication date: April 4, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Toyoo MIYAJIMA, Kenji IMANISHI, Atsushi YAMADA, Norikazu NAKAMURA
  • Publication number: 20130076442
    Abstract: An embodiment of a compound semiconductor device includes: a substrate; a compound semiconductor stacked structure formed over the substrate; and an amorphous insulating film formed between the substrate and the compound semiconductor stacked structure.
    Type: Application
    Filed: July 10, 2012
    Publication date: March 28, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Norikazu Nakamura, Atsushi Yamada, Shiro Ozaki, Kenji Imanishi
  • Patent number: 8257604
    Abstract: The etching processing method is characterized in that, when performing an etching processing on a resin member by using a desmear liquid containing an alkaline permanganate etching liquid, the etching processing is performed by dipping the resin member into the desmear liquid of which an etching rate for a resin forming the resin member is adjusted by using at least one of an accelerator for accelerating the etching rate of the desmear liquid and a suppressor for suppressing the etching rate.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: September 4, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Norikazu Nakamura
  • Publication number: 20120220105
    Abstract: A method of manufacturing a semiconductor device includes: holding a semiconductor substrate with a surface inclined with respect to the vertical direction and the horizontal direction; and immersing the semiconductor substrate in a cleaning solution including an acid.
    Type: Application
    Filed: February 16, 2012
    Publication date: August 30, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Masayuki Takeda, Norikazu Nakamura, Junichi Kon
  • Publication number: 20120208351
    Abstract: A cleaning apparatus for a semiconductor manufacturing apparatus includes: a oxide removal unit that removes an oxide over a surface of a deposit adhered to components of the semiconductor manufacturing apparatus, and a deposit removal unit that removes the deposit after the oxide over the surface is removed by the oxide removal unit.
    Type: Application
    Filed: January 25, 2012
    Publication date: August 16, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Norikazu Nakamura, Atsushi Yamada, Masayuki Takeda, Keiji Watanabe, Kenji Imanishi
  • Publication number: 20120205663
    Abstract: A semiconductor device, includes a semiconductor layer formed above a substrate; an insulating film formed on the semiconductor layer; and an electrode formed on the insulating film. The insulating film has a membrane stress at a side of the semiconductor layer lower than a membrane stress at a side of the electrode.
    Type: Application
    Filed: February 9, 2012
    Publication date: August 16, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Norikazu NAKAMURA, Shirou OZAKI, Masayuki TAKEDA, Keiji WATANABE
  • Publication number: 20120205662
    Abstract: A semiconductor device includes: a semiconductor layer formed over a substrate; an insulating film formed over the semiconductor layer; and an electrode formed over the insulating film, wherein the insulating film includes an amorphous film including carbon.
    Type: Application
    Filed: January 25, 2012
    Publication date: August 16, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Norikazu Nakamura, Shirou Ozaki, Masayuki Takeda, Toyoo Miyajima, Toshihiro Ohki, Masahito Kanamura, Kenji Imanishi, Toshihide Kikkawa, Keiji Watanabe
  • Publication number: 20120139630
    Abstract: On a surface of a compound semiconductor layer including inner wall surfaces of an electrode trench, an etching residue 12a and an altered substance 12b which are produced due to dry etching for forming the electrode trench are removed, and a compound semiconductor is terminated with fluorine. Gate metal is buried in the electrode trench via a gate insulating film, or the gate metal is directly buried in the electrode trench, whereby a gate electrode is formed.
    Type: Application
    Filed: October 25, 2011
    Publication date: June 7, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Norikazu Nakamura, Toshihiro Ohki, Masahito Kanamura