Patents by Inventor Norio Chujo

Norio Chujo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080030242
    Abstract: The present invention provides a differential signaling system comprising: a driver circuit that transmits a differential signal; a receiver circuit that receives the differential signal; and two or more signal lines used for the differential signal to be transmitted by the driver circuit and received by the receiver circuit, wherein the driver circuit gives an arbitrary time lag between the two signals that form the differential signal before transmitting them.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 7, 2008
    Inventors: Norio Chujo, Satoshi Muraoka
  • Publication number: 20070184687
    Abstract: One of a group which is located on the side of a main surface of the circuit board than the one conductive layer of the plurality of conductive layers is used as a terminal to detect the digging depth of the through hole, and the digging of the through hole is stopped according to the change of the conductive state between the detection terminal and the through hole (or the one conductive layer which is electrically connected to this). A circuit board is formed so that the detection terminal in a group of the plurality of conductive layers contacts with the drill which dig the through hole and a group of the conductive layers except the detection terminal does not contact with the drill, respectively.
    Type: Application
    Filed: January 25, 2007
    Publication date: August 9, 2007
    Inventors: Hisaaki Kanai, Norio Chujo, Masayoshi Yagyu
  • Patent number: 7068691
    Abstract: In a directly modulated optical module, the input current to drive the semiconductor laser is controlled so as to make a rate of change in fall time smaller than a rate of change in rise time (inclination) in order to improve the eye opening of an eye pattern and extend the transmission distance. In addition, the input current is overshot at least during the period of transient state following the rising edge.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: June 27, 2006
    Assignee: OpNext Japan, Inc.
    Inventors: Norio Chujo, Osamu Kagaya
  • Patent number: 6979810
    Abstract: A sample & hold type phase detector is used in a CDR IC and, in jitter transfer bandwidth adjustment, VCO output waveforms 90° out of phase with each other can be inputted to the phase detector, whereby a jitter transfer bandwidth can be calculated by only the measurement of frequency and of a DC voltage and it is possible to make a jitter transfer bandwidth adjustment in DC test for IC.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: December 27, 2005
    Assignee: OpNext Japan, Inc.
    Inventors: Norio Chujo, Keiichi Yamamoto, Akio Osaki, Katsunori Hirano, Takayuki Nakao, Tomoaki Shimotsu, Atsushi Hasegawa, Tetsuya Aoki, Takeshi Yamashita
  • Publication number: 20050122300
    Abstract: A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+?V) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.
    Type: Application
    Filed: November 5, 2004
    Publication date: June 9, 2005
    Inventors: Masami Makuuchi, Norio Chujo, Kengo Imagawa, Ritsuro Orihashi, Yoshitomo Arai
  • Publication number: 20050122297
    Abstract: A problem, which one of the inventions included in the present application solves, is to provide a semiconductor device that can simultaneously test a plurality of output pins by less channels of a semiconductor test equipment in number than the integrated output pins of the semiconductor device. Representative one of the inventions has such a configuration that an LCD driver, which is the semiconductor device having a function of driving a gate line of a liquid crystal display panel, comprises: an exclusive-OR circuit for inverting polarities of positive and negative voltages for driving the gate line; a tri-state type inverter circuit capable of changing and controlling, to a high-impedance state, an output circuit for driving the gate line; and at least one of test control terminals TEST for controlling the exclusive-OR circuit and the tri-state type inverter circuit.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 9, 2005
    Inventors: Kengo Imagawa, Masami Makuuchi, Norio Chujo, Ritsuro Orihashi, Yoshitomo Arai
  • Patent number: 6894489
    Abstract: A testing apparatus of a magnetic recording medium for conducting a test on the magnetic recording medium by using reproduced data obtained through reproduction of the magnetic medium, including a plurality of conversion means for converting the reproduced data into digital data, holding means for holding the digital data converted by the plurality of conversion means, data processing means for performing a calculation process on the digital data held by the holding means in relation to a magnetic characteristic of the magnetic recording medium, and analysis processing means for performing an analysis to determine whether or not information obtained by the data processing means satisfies a certain condition.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: May 17, 2005
    Assignees: Hitachi, Ltd., Hitachi High-Tech Electronics Engineering Co., Ltd.
    Inventors: Masami Makuuchi, Ritsurou Orihashi, Norio Chujo, Masayoshi Takahashi, Yoshihiko Hayashi, Shinji Homma
  • Patent number: 6829441
    Abstract: A driver circuit comprises a first differential-amplifier circuit having a pair of first transistors with emitters thereof connected to each other and a first resistor provided between an emitter connection point of the first transistors and a first power supply. Different electric potentials are applied to the bases of the pair of the first transistors to set a ratio of a current flowing through one of the pair of the first transistors to a current flowing through the other first transistor at about 1/100 or smaller. An amplitude of an output current is controlled by the higher of the electric potentials applied to the base of one of the first transistors.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: December 7, 2004
    Assignee: Opnext Japan, Inc.
    Inventors: Norio Chujo, Yoshihiko Hayashi, Akio Osaki, Naohiko Baba
  • Publication number: 20040189564
    Abstract: A semiconductor device having a liquid crystal driving circuit is disclosed. The driving circuit includes a digital functional unit and an analog functional unit. The digital functional unit is comprised of a display controller and a display data storage RAM, while the analog functional unit is made up of a gradation voltage generating circuit and a gradation voltage selecting circuit. The digital and analog function units are functionally divided from each other and testing of the digital function and testing of the analog function unit are performed in an overlapping manner independently from each other.
    Type: Application
    Filed: November 18, 2003
    Publication date: September 30, 2004
    Inventors: Masami Makuuchi, Kengo Imagawa, Norio Chujo, Ritsuro Orihashi, Yoshitomo Arai, Atsushi Obuchi
  • Publication number: 20040174916
    Abstract: In a directly modulated optical module, the input current to drive the semiconductor laser is controlled so as to make a rate of change in fall time smaller than a rate of change in rise time (inclination) in order to improve the eye opening of an eye pattern and extend the transmission distance. In addition, the input current is overshot at least during the period of transient state following the rising edge.
    Type: Application
    Filed: August 15, 2003
    Publication date: September 9, 2004
    Applicant: OpNext Japan, Inc.
    Inventors: Norio Chujo, Osamu Kagaya
  • Patent number: 6774680
    Abstract: A comparator is provided with a pair of transistors which are continuously in ON state, in which a switch unit constructed of a diode pair, for switching a current path in response to a high/low relationship between a voltage level of an input signal and a voltage level of a reference voltage, and a unit for converting a current into a voltage level are provided between emitter terminals of the transistor pair.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: August 10, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Kengo Imagawa, Norio Chujo, Kaoru Arita, Yoshiharu Umemura, Masahiro Imanari
  • Publication number: 20040124832
    Abstract: A testing apparatus of a magnetic recording medium for conducting a test on the magnetic recording medium by using reproduced data obtained through reproduction of the magnetic medium, including a plurality of conversion means for converting the reproduced data into digital data, holding means for holding the digital data converted by the plurality of conversion means, data processing means for performing a calculation process on the digital data held by the holding means in relation to a magnetic characteristic of the magnetic recording medium, and analysis processing means for performing an analysis to determine whether or not information obtained by the data processing means satisfies a certain condition.
    Type: Application
    Filed: December 16, 2003
    Publication date: July 1, 2004
    Inventors: Masami Makuuchi, Ritsurou Orihashi, Norio Chujo, Masayoshi Takahashi, Yoshihiko Hayashi, Shinji Homma
  • Publication number: 20040067068
    Abstract: A sample & hold type phase detector is used in a CDR IC and, in jitter transfer bandwidth adjustment, VCO output waveforms 90° out of phase with each other can be inputted to the phase detector, whereby a jitter transfer bandwidth can be calculated by only the measurement of frequency and of a DC voltage and it is possible to make a jitter transfer bandwidth adjustment in DC test for IC.
    Type: Application
    Filed: August 15, 2001
    Publication date: April 8, 2004
    Inventors: Norio Chujo, Keiichi Yamamoto, Akio Osaki, Katsunori Hirano, Takayuki Nakao, Tomoaki Shimotsu, Atsushi Hasegawa, Tetsuya Aoki, Takeshi Yamashita
  • Patent number: 6700369
    Abstract: A testing apparatus of a magnetic recording medium for conducting a test on the magnetic recording medium by using reproduced data obtained through reproduction of the magnetic medium, including a plurality of conversion means for converting the reproduced data into digital data, holding means for holding the digital data converted by the plurality of conversion means, data processing means for performing a calculation process on the digital data held by the holding means in relation to a magnetic characteristic of the magnetic recording medium, and analysis processing means for performing an analysis to determine whether or not information obtained by the data processing means satisfies a certain condition.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: March 2, 2004
    Assignees: Hitachi, Ltd., Hitachi Electronics Engineering Co., Ltd.
    Inventors: Masami Makuuchi, Ritsurou Orihashi, Norio Chujo, Masayoshi Takahashi, Yoshihiko Hayashi, Shinji Homma
  • Publication number: 20030222681
    Abstract: A comparator is provided with a pair of transistors which are continuously in ON state, in which a switch unit constructed of a diode pair, for switching a current path in response to a high/low relationship between a voltage level of an input signal and a voltage level of a reference voltage, and a unit for converting a current into a voltage level are provided between emitter terminals of the transistor pair.
    Type: Application
    Filed: March 6, 2003
    Publication date: December 4, 2003
    Inventors: Kengo Imagawa, Norio Chujo, Kaoru Arita, Yoshiharu Umemura, Masahiro Imanari
  • Publication number: 20030198479
    Abstract: A driver circuit comprises a first differential-amplifier circuit having a pair of first transistors with emitters thereof connected to each other and a first resistor provided between an emitter connection point of the first transistors and a first power supply. Different electric potentials are applied to the bases of the pair of the first transistors to set a ratio of a current flowing through one of the pair of the first transistors to a current flowing through the other first transistor at about 1/100 or smaller. An amplitude of an output current is controlled by the higher of the electric potentials applied to the base of one of the first transistors.
    Type: Application
    Filed: June 6, 2003
    Publication date: October 23, 2003
    Inventors: Norio Chujo, Yoshihiko Hayashi, Akio Osaki, Naohiko Baba
  • Patent number: 6606177
    Abstract: A driver circuit comprises a first differential-amplifier circuit having a pair of first transistors with emitters thereof connected to each other and a first resistor provided between an emitter connection point of the first transistors and a first power supply. Different electric potentials are applied to the bases of the pair of the first transistors to set a ratio of a current flowing through one of the pair of the first transistors to a current flowing through the other first transistor at about {fraction (1/100)} or smaller. An amplitude of an output current is controlled by the higher of the electric potentials applied to the base of one of the first transistors.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: August 12, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Norio Chujo, Yoshihiko Hayashi, Akio Osaki, Naohiko Baba
  • Publication number: 20030081278
    Abstract: While modules to be tested in one constant temperature oven are tested by providing a plurality of constant temperature ovens, accommodating a plurality of modules to be tested in each constant temperature oven and connecting the modules to be tested accommodated in a plurality of constant temperature ovens to the measuring instruments via the switches, preparation for testing such as temperature change of the other constant temperature oven is conducted and the modules to be tested in one constant temperature oven are tested using measuring instruments. Thereafter, the switches are changed over and the modules to be tested accommodated in the other constant temperature oven are tested. Thereby, expensive measuring instruments can be used effectively.
    Type: Application
    Filed: April 2, 2002
    Publication date: May 1, 2003
    Applicant: OpNext Japan, Inc.
    Inventors: Norio Chujo, Kosuke Inoue, Tomoaki Shimotsu, Atsushi Hasegawa, Takeshi Yamashita, Hideyuki Kuwano, Ryozo Sato, Katsumi Uchida, Ikuo Kawaguchi, Kyouichi Yamamoto, Takashi Minato
  • Patent number: 6229832
    Abstract: An optical transmitter includes a plurality of optical wavelength stability control apparatuses, each of which is capable of compensating for a wavelength drift by varying a laser diode drive current. Each of the optical wavelength stability control apparatuses detects a laser diode drive current, which is controlled by an auto power control circuit, by using a laser diode drive current detector. The laser diode drive current is normalized by a laser diode drive current increase/decrease normalization unit. A laser diode temperature control target value is generated at a compensated reference voltage generator, in response to the normalized laser diode drive current, to control a current value applied to a thermoelectric cooler so that an output value of a temperature monitor circuit approaches a predetermined laser diode temperature control target value.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: May 8, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Naohiko Baba, Hideyuki Serizawa, Akihiro Hayami, Tadashi Hatano, Yasuhiro Yamada, Norio Chujo
  • Patent number: 5541553
    Abstract: An amplifier which performs the function of switching on and off its output signal includes an inverted Darlington circuit made up of an input transistor and an output transistor, a first switching circuit connected across the base and the emitter of the output transistor, and a second switching circuit connected between the emitter of the input transistor and the collector of the output transistor. Amplifier also includes means for opening the first switching circuit and closing the second switching circuit to send out an output signal, and for closing the first switching circuit and opening the second switching circuit to stop the output signal. The input and output transistors may be fabricated using vipolar or MOSFET technology because current of a small magnitude flows through the switching circuits, the switching circuits can be formed from elements that are small in size and which have small parasitic capacitance.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: July 30, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Norio Chujo, Yoshihiko Hayashi, Akio Osaki