Patents by Inventor Noritaka ISHIHARA
Noritaka ISHIHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12154827Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.Type: GrantFiled: October 24, 2023Date of Patent: November 26, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Tsutomu Murakawa, Hiroki Komagata, Daisuke Matsubayashi, Noritaka Ishihara, Yusuke Nonaka
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Publication number: 20240365547Abstract: A semiconductor storage device according to an embodiment includes a stacked body including a plurality of conductive layers and a plurality of insulating layers alternately stacked, and a plurality of pillars each including a core material extending in the stacked body in a first direction intersecting a face of each of the plurality of conductive layers, a semiconductor layer covering a side face of the core material, and a multi-layered insulating layer stacked on a side face of the semiconductor layer, the semiconductor layer being crystalline, the multi-layered insulating layer including a charge storage layer, wherein each of the semiconductor layers includes a crystal structure in which the appearance number of crystal grain boundaries per 1 ?m in the first direction is less than 2 near to at least a first end in the first direction, and an additive that includes one or more of carbon, nitrogen, oxygen, and fluorine.Type: ApplicationFiled: April 24, 2024Publication date: October 31, 2024Applicant: Kioxia CorporationInventors: Takumi MATSUSHITA, Noritaka ISHIHARA, Kazuya UEJIMA
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Publication number: 20240321897Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.Type: ApplicationFiled: March 26, 2024Publication date: September 26, 2024Inventors: Masahiro TAKAHASHI, Takuya HIROHASHI, Masashi TSUBUKU, Noritaka ISHIHARA, Masashi OOTA
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Patent number: 11978742Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.Type: GrantFiled: April 20, 2023Date of Patent: May 7, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiro Takahashi, Takuya Hirohashi, Masashi Tsubuku, Noritaka Ishihara, Masashi Oota
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Patent number: 11967505Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.Type: GrantFiled: April 21, 2023Date of Patent: April 23, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masashi Tsubuku, Masashi Oota, Yoichi Kurosawa, Noritaka Ishihara
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Publication number: 20240055299Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.Type: ApplicationFiled: October 24, 2023Publication date: February 15, 2024Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Tsutomu MURAKAWA, Hiroki KOMAGATA, Daisuke MATSUBAYASHI, Noritaka ISHIHARA, Yusuke NONAKA
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Patent number: 11903202Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a semiconductor layer including a plurality of metal atoms on a substrate, and forming a first layer including a plurality of silicon atoms and a plurality of nitrogen atoms on the semiconductor layer. The method further includes transferring at least some of the metal atoms in the semiconductor layer into the first layer. and removing the first layer after transferring the at least some of the metal atoms in the semiconductor layer into the first layer. Furthermore, a ratio of a number of the nitrogen atoms relative to a number of the silicon atoms and the nitrogen atoms in the first layer is smaller than 4/7.Type: GrantFiled: August 4, 2021Date of Patent: February 13, 2024Assignee: Kioxia CorporationInventors: Aki Maeda, Noritaka Ishihara, Atsushi Fukumoto, Shuto Yamasaka
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Publication number: 20230369341Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.Type: ApplicationFiled: April 20, 2023Publication date: November 16, 2023Inventors: Masahiro TAKAHASHI, Takuya HIROHASHI, Masashi TSUBUKU, Noritaka ISHIHARA, Masashi OOTA
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Patent number: 11804407Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.Type: GrantFiled: November 4, 2021Date of Patent: October 31, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Tsutomu Murakawa, Hiroki Komagata, Daisuke Matsubayashi, Noritaka Ishihara, Yusuke Nonaka
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Patent number: 11742431Abstract: A semiconductor device with favorable reliability is provided. The semiconductor device includes a first insulator; a second insulator positioned over the first insulator; an oxide positioned over the second insulator; a first conductor and a second conductor positioned apart from each other over the oxide; a third insulator positioned over the oxide, the first conductor, and the second conductor; a third conductor positioned over the third insulator and at least partly overlapping with a region between the first conductor and the second conductor; a fourth insulator positioned to cover the oxide, the first conductor, the second conductor, the third insulator, and the third conductor; a fifth insulator positioned over the fourth insulator; and a sixth insulator positioned over the fifth insulator.Type: GrantFiled: October 14, 2021Date of Patent: August 29, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yoshinobu Asami, Takahisa Ishiyama, Motomu Kurata, Ryo Tokumaru, Noritaka Ishihara, Yusuke Nonaka
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Publication number: 20230260785Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.Type: ApplicationFiled: April 21, 2023Publication date: August 17, 2023Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Masashi OOTA, Yoichi KUROSAWA, Noritaka ISHIHARA
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Patent number: 11652110Abstract: A metal oxide film including a crystal part and having highly stable physical properties is provided. The size of the crystal part is less than or equal to 10 nm, which allows the observation of circumferentially arranged spots in a nanobeam electron diffraction pattern of the cross section of the metal oxide film when the measurement area is greater than or equal to 5 nm? and less than or equal to 10 nm?.Type: GrantFiled: January 8, 2021Date of Patent: May 16, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiro Takahashi, Takuya Hirohashi, Masashi Tsubuku, Noritaka Ishihara, Masashi Oota
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Patent number: 11637015Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.Type: GrantFiled: October 1, 2021Date of Patent: April 25, 2023Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masashi Tsubuku, Masashi Oota, Yoichi Kurosawa, Noritaka Ishihara
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Publication number: 20220359575Abstract: To provide a method for manufacturing a semiconductor device including an oxide semiconductor film having conductivity, or a method for manufacturing a semiconductor device including an oxide semiconductor film having a light-transmitting property and conductivity. The method for manufacturing a semiconductor device includes the steps of forming an oxide semiconductor film over a first insulating film, performing first heat treatment in an atmosphere where oxygen contained in the oxide semiconductor film is released, and performing second heat treatment in a hydrogen-containing atmosphere, so that an oxide semiconductor film having conductivity is formed.Type: ApplicationFiled: July 11, 2022Publication date: November 10, 2022Inventors: Masashi OOTA, Noritaka ISHIHARA, Motoki NAKASHIMA, Yoichi KUROSAWA, Shunpei YAMAZAKI, Yasuharu HOSAKA, Toshimitsu OBONAI, Junichi KOEZUKA
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Publication number: 20220302158Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming a semiconductor layer including a plurality of metal atoms on a substrate, and forming a first layer including a plurality of silicon atoms and a plurality of nitrogen atoms on the semiconductor layer. The method further includes transferring at least some of the metal atoms in the semiconductor layer into the first layer. and removing the first layer after transferring the at least some of the metal atoms in the semiconductor layer into the first layer. Furthermore, a ratio of a number of the nitrogen atoms relative to a number of the silicon atoms and the nitrogen atoms in the first layer is smaller than 4/7.Type: ApplicationFiled: August 4, 2021Publication date: September 22, 2022Applicant: Kioxia CorporationInventors: Aki MAEDA, Noritaka ISHIHARA, Atsushi FUKUMOTO, Shuto YAMASAKA
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Publication number: 20220059409Abstract: A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.Type: ApplicationFiled: November 4, 2021Publication date: February 24, 2022Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Tsutomu MURAKAWA, Hiroki KOMAGATA, Daisuke MATSUBAYASHI, Noritaka ISHIHARA, Yusuke NONAKA
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Publication number: 20220059701Abstract: A semiconductor device with favorable reliability is provided. The semiconductor device includes a first insulator; a second insulator positioned over the first insulator; an oxide positioned over the second insulator; a first conductor and a second conductor positioned apart from each other over the oxide; a third insulator positioned over the oxide, the first conductor, and the second conductor; a third conductor positioned over the third insulator and at least partly overlapping with a region between the first conductor and the second conductor; a fourth insulator positioned to cover the oxide, the first conductor, the second conductor, the third insulator, and the third conductor; a fifth insulator positioned over the fourth insulator; and a sixth insulator positioned over the fifth insulator.Type: ApplicationFiled: October 14, 2021Publication date: February 24, 2022Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Yoshinobu ASAMI, Takahisa ISHIYAMA, Motomu KURATA, Ryo TOKUMARU, Noritaka ISHIHARA, Yusuke NONAKA
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Patent number: 11239237Abstract: A semiconductor device having high operation frequency is provided. The semiconductor device includes a transistor including a first conductive layer, a first insulating layer, a second insulating layer, a first oxide, a second oxide, a third oxide, a third insulating layer, and a second conductive layer that are stacked in this order, and a fourth insulating layer. The first conductive layer and the second conductive layer include a region overlapping with the second oxide. In a channel width direction of the transistor, a level of the bottom surface of the second oxide is from more than or equal to ?5 nm to less than 0 nm when a level of a region of the bottom surface of the second conductive layer which does not overlap with the second oxide is regarded as a reference.Type: GrantFiled: January 15, 2019Date of Patent: February 1, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yusuke Nonaka, Noritaka Ishihara, Tomoki Hiramatsu, Ryunosuke Honda, Tomoyo Kamogawa, Ryota Hodo, Katsuaki Tochibayashi, Shunpei Yamazaki
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Publication number: 20220020586Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.Type: ApplicationFiled: October 1, 2021Publication date: January 20, 2022Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Masashi OOTA, Yoichi KUROSAWA, Noritaka ISHIHARA
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Patent number: 11211467Abstract: A highly reliable semiconductor device is provided. The semiconductor device includes a first insulator; a first oxide provided over the first insulator; a second oxide provided over the first oxide; a first conductor and a second conductor provided apart from each other over the second oxide; a third oxide provided over the second oxide, the first conductor, and the second conductor; a second insulating film provided over the third oxide; and a third conductor provided over the second oxide with the third oxide and the second insulating film positioned therebetween. The third oxide contains a metal element and nitrogen, and the metal element is bonded to nitrogen.Type: GrantFiled: October 29, 2018Date of Patent: December 28, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Tomoki Hiramatsu, Yusuke Nonaka, Noritaka Ishihara, Shota Sambonsuge, Yasumasa Yamane, Yuta Endo