Abstract: This solid-state image capturing device includes a light receiving element, a charge holding region, and a floating diffusion region that are arranged in a semiconductor substrate, a first transfer gate between the light receiving element and the charge holding region, a second transfer gate between the charge holding region and the floating diffusion region, an interconnect layer including an interconnect that is arranged on the semiconductor substrate via a plurality of interlayer insulating films, and a light shielding film that is arranged on the semiconductor substrate side relative to the interconnect layer and shields the charge holding region.

Abstract: A solid-state image capturing device according to the present invention includes: a first-conductivity-type well; a first second-conductivity-type diffusion layer that is provided in the first-conductivity-type well and generates carriers upon being irradiated with light; a second second-conductivity-type diffusion layer that is provided in the first-conductivity-type well and stores carriers that are generated in the first second-conductivity-type diffusion layer and are transmitted thereto; and a first first-conductivity-type diffusion layer provided below the second second-conductivity-type diffusion layer, wherein an impurity concentration of the second second-conductivity-type diffusion layer is higher than an impurity concentration of the first second-conductivity-type diffusion layer, and an impurity concentration of the first first-conductivity-type diffusion layer is lower than an impurity concentration of the first-conductivity-type well.

Abstract: A power supply apparatus includes a controller that performs the following action. The controller determines a target direct-current electric amount value in accordance with an external input. Then, the controller performs feedback control in such a manner that an amount of direct-current electric power input to an inverter reaches the target direct-current electric amount value.

Abstract: In this solid-state imaging device, the sameness of the potential distributions in pixels, in a region from a photodiode of a transfer transistor to a floating diffusion in a charge transfer path, is improved. The solid-state imaging device includes a first transfer transistor including a first photodiode, a first gate electrode, and a first floating diffusion, a second transfer transistor including a second photodiode, a second gate electrode, and a second floating diffusion, a third transfer transistor including a third photodiode, a third gate electrode, and a third floating diffusion, and a reset transistor including a diffusion layer, which is a source or drain region, and a reset gate. The first to third floating diffusions and the diffusion layer of the reset transistor are separated from each other, and are electrically connected to each other via an interconnect. The first to third photodiodes are arrayed one-dimensionally.

Abstract: A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P+-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P?-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N?-type impurity region that is in contact with the P?-type impurity region and the gate insulating film, and an N??-type impurity region that surrounds at least a portion of the N?-type impurity region in plan view.

Abstract: A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P+-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P?-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N?-type impurity region that is located in the P-well so as to extend under the pinning layer and the P?-type impurity region and be in contact with the P?-type impurity region and the gate insulating film, and an N+-type impurity region that is located in the P-well and includes a portion that is under a second end portion of the gate electrode.

Abstract: A power supply apparatus outputs an alternating-current voltage to a plasma generator being a capacitive load and the power supply apparatus has a configuration that a transformer included in the power supply apparatus has a secondary-side magnetizing inductance more than five times as great as a leakage inductance.

Abstract: A solid state imaging device according to the invention includes: a semiconductor layer of a first conductivity type; a gate insulation film that is located on the semiconductor layer; a gate electrode that is located on the gate insulation film; a first impurity region of a second conductivity type that is located at least in a region outside the gate electrode on a first end portion side; a second impurity region of the second conductivity type that is located in a region extending across a second end portion that is opposite to the first end portion of the gate electrode; and a third impurity region of the first conductivity type that is located on top of the second impurity region at a position outside the gate electrode on the second end portion side, and is in contact with the second impurity region.

Abstract: An angle limiting filter includes: a first light-shielding layer containing a first light-shielding material and provided with a first opening; a second light-shielding layer containing a second light-shielding material and located in a region which surrounds at least one portion of the first light-shielding layer; a third light-shielding layer containing the first light-shielding material, provided with a second opening at least one portion of which overlaps the first opening, and located above the first light-shielding layer; and a fourth light-shielding layer containing the second light-shielding material and located above the second light-shielding layer in a region which surrounds at least one portion of the third light-shielding layer.

Abstract: A power supply apparatus includes a controller that performs the following action and resonance means for creating a resonance state between the power supply apparatus and a plasma generator. That is, the controller changes, when a value of electric power input equal to 100% (or a value of electric power input equal to or more than a threshold % and equal to or less than 100%) of a rated power is instructed, an inverter frequency and obtains an inverter output power factor for each of a plurality of inverter frequencies. Then, the controller determines, as a driving frequency of the inverter, one of the plurality of inverter frequencies at which the inverter output power factor is maximized.

Abstract: A spectroscopic sensor has plural angle limiting filters that limit incident angles of incident lights, plural light band-pass filters that transmit specific wavelengths, and plural photodiodes to which corresponding transmitted lights are input. The spectroscopic sensor is a semiconductor device in which the angle limiting filters, the light band-pass filters, and the photodiodes are integrated, and, assuming that the surface on which impurity regions for the photodiodes are formed is a front surface of a semiconductor substrate, holes for receiving lights are formed in the impurity regions from the rear surface side.

Abstract: A current-limiting reactor that regulates a short-circuit current, a controller that controls an action of an inverter, and a detection unit that detects a short circuit. The controller causes the inverter to stop when a short circuit has occurred.

Abstract: A solid state imaging element according to the invention includes: a semiconductor layer of a first conductivity type; a gate insulation film on the semiconductor layer; a gate electrode on the gate insulation film; a first impurity region of a second conductivity type in the semiconductor layer and in a region outside the gate electrode on a first end portion side; a second impurity region of the second conductivity type in the semiconductor layer and in a region outside the gate electrode on a second end portion side that is opposite to the first end portion of the gate electrode; and a third impurity region of the first conductivity type over the second impurity region in the semiconductor layer at a position separate from the second end portion of the gate electrode as viewed in plan view, and is in contact with the second impurity region.

Abstract: A solid state imaging device according to the invention includes: a semiconductor layer of a first conductivity type; a gate insulation film that is located on the semiconductor layer; a gate electrode that is located on the gate insulation film; a first impurity region of a second conductivity type that is located at least in a region outside the gate electrode on a first end portion side; a second impurity region of the second conductivity type that is located in a region extending across a second end portion that is opposite to the first end portion of the gate electrode; and a third impurity region of the first conductivity type that is located on top of the second impurity region at a position outside the gate electrode on the second end portion side, and is in contact with the second impurity region.

Abstract: An angle restriction filter that allows light incident thereon in a predetermined range of incident angles to pass, includes: an optical path wall section formed from a plurality of light shield members laminated in layers including a common material, thereby forming an optical path in a lamination direction of the light shield members; and a light transmission section formed in a region surrounded by the optical path wall section.

Abstract: A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P+-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P?-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N?-type impurity region that is located in the semiconductor layer under the P?-type impurity region and includes a portion that is under the pinning layer, and an N?-type impurity region that is in contact with the gate insulating film and the P?-type impurity region and is located so as to surround the N?-type impurity region in plan view.

Abstract: An aspect of the invention is a solid-state image capturing device that includes a P-type well 12, an N-type low concentration diffusion layer 18 formed in the P-type well 12, a P-type surface diffusion layer 16 formed on a surface of the N-type low concentration diffusion layer 18, and a P-type high concentration well 15 formed in a boundary region between a side surface of the N-type low concentration diffusion layer 18 and the P-type well 12.

Abstract: A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P+-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P?-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N?-type impurity region that is in contact with the P?-type impurity region and the gate insulating film, and an N??-type impurity region that surrounds at least a portion of the N?-type impurity region in plan view.

Abstract: A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P+-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P?-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N?-type impurity region that is located in the P-well so as to extend under the pinning layer and the P?-type impurity region and be in contact with the P?-type impurity region and the gate insulating film, and an N+-type impurity region that is located in the P-well and includes a portion that is under a second end portion of the gate electrode.

Abstract: A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P+-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P?-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N?-type impurity region that is located in the semiconductor layer under the P?-type impurity region and includes a portion that is under the pinning layer, and an N?-type impurity region that is in contact with the gate insulating film and the P?-type impurity region and is located so as to surround the N?-type impurity region in plan view.