Patents by Inventor Olivier Rayssac

Olivier Rayssac has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050029224
    Abstract: The invention relates to the preparation of a thin layer comprising a step in which an interface is created between a layer used to create said thin layer and a substrate, characterized in that said interface is made in such way that it is provided with at least one first zone (Z1) which has a first level of mechanical strength, and a second zone (Z2) which has a level of mechanical strength which is substantially lower than that of the first zone. Said interface can be created by glueing surfaces which are prepared in a differentiated manner, by a layer which is buried and embrittled in a differentiated manner in said zones, or by an intermediate porous layer.
    Type: Application
    Filed: April 11, 2002
    Publication date: February 10, 2005
    Inventors: Bernard Aspar, Hubert Moriceau, Marc Zussy, Olivier Rayssac
  • Publication number: 20050023610
    Abstract: A semiconductor-on-insulator structure for electronics, optics or optoelectronics, in which a semiconductor layer includes desirable elastic constraints. The structure includes a substrate, an insulating layer on the substrate, and a semiconductor layer on the insulating layer. The semiconductor layer has elastic constraints, and the insulating layer is made of an electrically insulating material having a viscosity temperature TG that is sufficiently high so as to protect the semiconductor layer from loss of the elastic constraints when the structure is exposed to a temperature of about 950° C. or more. Also described is a process for producing such a semiconductor-on-insulator structure.
    Type: Application
    Filed: November 3, 2003
    Publication date: February 3, 2005
    Inventors: Bruno Ghyselen, Cecile Aulnette, Olivier Rayssac
  • Publication number: 20050026391
    Abstract: A preventive treatment method for a multilayer semiconductor structure having a support substrate, at least one intermediate layer and a surface layer in which the surface layer is to be subjected to a subsequent chemical treatment. The method includes forming a protective layer between the intermediate layer and the surface layer. The protective layer is made from a material chosen to be sufficiently resistant to the chemical treatment to protect the intermediate layer from chemical attack.
    Type: Application
    Filed: October 14, 2003
    Publication date: February 3, 2005
    Inventors: Bruno Ghyselen, Olivier Rayssac
  • Publication number: 20050020031
    Abstract: Methods for preparing a semiconductor assembly are disclosed. In an implementation, the technique includes providing a support substrate and a bonding surface thereon, providing a donor substrate having a weakened zone that defines a useful layer and a bonding surface on the useful layer, and providing an interface layer of a predetermined material on the bonding surface of either the support substrate or the useful layer to provide a bonding surface thereon. The method also includes molecularly bonding the bonding surface of the interface layer to the bonding surface of the other of the support substrate or the useful layer to form a separable bonding interface therebetween, and to thus form the semiconductor assembly, and heat treating the semiconductor assembly to a temperature of at least 1000 to 1100° C.
    Type: Application
    Filed: July 15, 2004
    Publication date: January 27, 2005
    Inventors: Fabrice Letertre, Bruno Ghyselen, Olivier Rayssac
  • Publication number: 20050009297
    Abstract: A method is presented for cutting an assembly that includes two layers of material having a first surface and a second surface. The method includes providing a weakened interface between the two layers that defines an interface ring about the periphery of the assembly, providing a high-pressure zone at the interface ring, and providing at least one controllable low-pressure zone in the vicinity of at least one of the first surface and the second surface. The technique also includes supplying the high-pressure zone with a controllable high-pressure force, and attacking the interface ring with at least one mechanical force in combination with the high-pressure force to cut the assembly.
    Type: Application
    Filed: July 6, 2004
    Publication date: January 13, 2005
    Inventors: Olivier Rayssac, Fabrice Letertre
  • Publication number: 20050000649
    Abstract: An automatic cutting device is described for cutting an assembly. The assembly includes a material having a weakened zone therein that defines a useful layer and being attached to a source substrate. The cutting device includes a cutting mechanism and a holding and positioning mechanism operatively associated with the cutting mechanism. The holding and positioning mechanism positions the material so that the cutting mechanism detaches the layer from the source substrate along the weakened zone. The cutting device also includes a control mechanism for adjusting at least two different portions of the assembly during detachment of the layer to facilitate a more precise detachment.
    Type: Application
    Filed: July 1, 2004
    Publication date: January 6, 2005
    Inventors: Olivier Rayssac, Fabrice Letertre
  • Publication number: 20040248379
    Abstract: A method for bonding semiconductor structures together is described. The technique includes providing a bonding surface on each of two semiconductor structures, brushing a bonding surface of at least one of the structures to remove contaminants and to activate hydroxyl groups on the bonding surface to enhance hydrophilicity and to facilitate molecular bonding of the structures, and joining the bonding surfaces together by molecular bonding to form a composite structure.
    Type: Application
    Filed: April 27, 2004
    Publication date: December 9, 2004
    Inventors: Christophe Maleville, Corinne Maunand Tussot, Olivier Rayssac, Sebastien Kerdiles, Benjamin Scarfogliere, Hubert Moriceau, Christophe Morales
  • Publication number: 20040235268
    Abstract: Methods for fabricating a semiconductor substrate. In an embodiment, the technique includes providing an intermediate support, providing a nucleation layer, and providing at least one bonding layer between the intermediate support and the nucleation layer to improve the bonding energy therebetween, and to form an intermediate assembly. The method also includes providing at least one layer of a semiconductor material upon the nucleation layer, bonding a target substrate to the deposited semiconductor material to form a final support assembly comprising the target substrate, the deposited semiconductor material, and the intermediate assembly, and processing the final support assembly to remove the intermediate assembly. The result is a semiconductor substrate that includes the at least one layer of semiconductor material on the target substrate.
    Type: Application
    Filed: July 1, 2004
    Publication date: November 25, 2004
    Inventors: Fabrice Letertre, Bruno Ghyselen, Olivier Rayssac
  • Patent number: 6821376
    Abstract: A process and device for separating two semi-conductor substrate wafers along an interface. The process includes forming a cavity, and initiating separation by applying force to the interface through the cavity. The device utilizes fluid or gas, and pressure chambers, to subject adherent faces of the interface to at least one of chemical or mechanical action.
    Type: Grant
    Filed: January 8, 2002
    Date of Patent: November 23, 2004
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Olivier Rayssac, Hubert Moriceau, Bernard Aspar, Philippe Montmayeul
  • Publication number: 20040222500
    Abstract: The invention relates to a method for production of a detachable substrate, comprising a method step for the production of an interface by means of fixing, using molecular adhesion, one face of a layer on one face of a substrate, in which, before fixing, a treatment stage for at least one of said faces is provided, rendering the mechanical hold at the interface at such a controlled level to be compatible with a subsequent detachment.
    Type: Application
    Filed: June 10, 2004
    Publication date: November 11, 2004
    Inventors: Bernard Aspar, Hubert Moriceau, Olivier Rayssac, Bruno Ghyselen
  • Publication number: 20040206444
    Abstract: Methods for forming an assembly for transfer of a useful layer are described. In an embodiment, the method includes forming a useful layer on a first support having an interface therebetween, and a residual material on a portion of the first support to form the assembly, and processing the assembly to attenuate any bond between the useful layer and the first support caused by the residual material. An implementation of the method includes processing the assembly to remove residual material. In another variation, processing of the assembly includes forming at least one cut or separating channel between a free surface of the useful layer and the interface to separate the useful layer from contact with the residual material. In yet another variation, processing of the assembly includes forming a peripheral recess so that the residual material does not contact the useful layer.
    Type: Application
    Filed: March 11, 2004
    Publication date: October 21, 2004
    Inventors: Fabrice Letertre, Olivier Rayssac
  • Publication number: 20040178448
    Abstract: A semiconductor structure includes a substrate having a surface and being made of a material that provides a typical surface properties to the surface, a bonding layer on the surface of the substrate, and a further layer molecularly bonded to the bonding layer. A method for fabricating such a semiconductor structure includes providing a substrate having a surface and being made of a material that provides a typical surface properties to the surface, providing a bonding layer on the surface of the substrate, smoothing the bonding layer to provide a surface that is capable of molecular bonding, and molecularly bonding a further layer to the bonding layer to form the structure. The a typical surface properties preferably include at least one of a roughness of more than 0.5 nm rms, or a roughness of at least 0.4 nm rms that is difficult to polish, or a chemical composition that is incompatible with molecular bonding.
    Type: Application
    Filed: February 11, 2004
    Publication date: September 16, 2004
    Inventors: Olivier Rayssac, Muriel Maritnez, Sephorah Bisson, Lionel Portigliatti
  • Publication number: 20040175902
    Abstract: The invention relates to a method of producing a self-supported thin layer of a semiconductor material supporting at least one electronic component or circuit or both on one of its faces, from a wafer of the material by thinning of the wafer. The wafer has a front face supporting or for supporting at least one electronic component or circuit and a rear face. The method is remarkable in that it includes: a) implanting atomic species in the interior of the wafer through its rear face to obtain a zone of weakness defining a front portion extending from the front face of the zone of weakness and a rear portion formed by the remainder of the wafer; b) detaching the rear portion from the front portion; and c) if necessary, repeating steps a) and b) on the rear face of the front portion until the front portion has the desired thickness for constituting the self-supported thin layer.
    Type: Application
    Filed: February 9, 2004
    Publication date: September 9, 2004
    Inventors: Olivier Rayssac, Carlos Mazure, Bruno Ghyselen
  • Publication number: 20040166649
    Abstract: The invention relates to a method of removing a peripheral zone of adhesive while using a layer of adhesive in the process of assembling and transferring a layer of material from a source substrate to a support substrate. The method is remarkable in that it includes bonding the two substrates together by means of a curable adhesive so that an excess of adhesive is present. This assures proper bonding and provides a peripheral zone of adhesive outside of the joined substrates. Only that portion of adhesive is cured which is present in a connection zone between the substrates, and the peripheral zone of non-cured adhesive is removed prior to detaching the transferable layer. The invention is applicable to fabricating a composite substrate in the fields of electronics, opto-electronics, or optics.
    Type: Application
    Filed: January 6, 2004
    Publication date: August 26, 2004
    Applicant: SOITEC & CEA
    Inventors: Severine Bressot, Olivier Rayssac, Bernard Aspar
  • Publication number: 20040144487
    Abstract: An automatic high-precision layer cutting device for separating a layer from a semiconductor substrate. The cutting device includes a fixed positioning member for receiving at least a portion of a semiconductor substrate that has a weakened area therein and a peripheral annular notch that is located below the weakened area. The positioning member maintains a predetermined position of the substrate on a support. The device also includes cutting means having at least one blade for contacting the substrate and for inducing a cleaving wave into the substrate. The cutting means is operatively associated with the positioning member so that the at least one blade contacts the annular notch and the positioning member prevents movement of the substrate. The at least one blade induces a cleaving wave of sufficient intensity to both divide the substrate at the notch into first and second parts and detach the layer from the substrate along the weakened area.
    Type: Application
    Filed: October 7, 2003
    Publication date: July 29, 2004
    Inventors: Muriel Martinez, Thierry Barge, Alain Soubie, Chrystelle Lagahe-Blanchard, Cecile Berne, Olivier Rayssac
  • Patent number: 6756285
    Abstract: A multilayer structure with controlled internal stresses comprising, in this order, a first main layer (110a), at least a first constraint adaptation layer (130) in contact with the first main layer, at least a second stress adaptation layer (120) put into contact by adhesion with said first stress adaptation layer, and a second main layer (110b) in contact with the second stress adaptation layer, the first and second stress adaptation layers having contact stresses with the first and second main layers. Application to the realization of electronic circuits and membrane devices.
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: June 29, 2004
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Hubert Moriceau, Olivier Rayssac, Anne-Marie Cartier, Bernard Aspar
  • Publication number: 20040092084
    Abstract: A method for treating a semiconductor material for subsequent bonding. The technique includes bombarding a surface of the semiconductor material with a beam containing a controlled number of ions in ion clusters. The beam etches a pattern in the surface, and the number of ions is controlled to provide a desired roughness of the surface pattern to improve adhesion during subsequent bonding.
    Type: Application
    Filed: October 30, 2003
    Publication date: May 13, 2004
    Inventor: Olivier Rayssac
  • Publication number: 20040082147
    Abstract: Methods for transferring a layer of material from a source substrate having a zone of weakness onto a support substrate to fabricate a composite substrate are described. An implementation includes forming at least one recess in at least one of the source and support substrates, depositing material onto at least one of a front face of the source substrate and a front face of the support substrate, pressing the front faces of the source and support substrates together to bond the substrates, and detaching a transfer layer from the source substrate along the zone of weakness. When the front faces are pressed together, any excess material is received by the recess. The recess may advantageously include an opening in the front face of at least one of the source substrate and the support substrate.
    Type: Application
    Filed: July 9, 2003
    Publication date: April 29, 2004
    Inventors: Bernard Aspar, Severine Bressot, Olivier Rayssac
  • Publication number: 20030232487
    Abstract: The invention concerns a method of fabricating a substrate that includes a layer of at least one semiconductor material on a support. The substrate is fabricated by affixing a nucleation layer to an intermediate support substrate to form a barrier layer against diffusion of atoms from the intermediate support substrate, depositing at least one layer of semiconductor material to the nucleation layer; attaching a target substrate to the deposited semiconductor material to form a final support assembly, and removing the intermediate support substrate and the nucleation layer from the final support assembly. The final support assembly includes the target substrate, the deposited semiconductor material, the nucleation layer and the intermediate support substrate so that, after removal of the intermediate support substrate, a substrate is provided that includes at least one layer of at least one semiconductor material on a support.
    Type: Application
    Filed: June 9, 2003
    Publication date: December 18, 2003
    Inventors: Fabrice Letertre, Bruno Ghyselen, Olivier Rayssac
  • Publication number: 20030077885
    Abstract: This invention relates to a substrate (1) weakened by the presence of a micro-cavities zone, the micro-cavities zone (4′) delimiting a thin layer (5) with one face (2) of the substrate (1), some or all of the gaseous species having been eliminated from the micro-cavities (4′).
    Type: Application
    Filed: November 22, 2002
    Publication date: April 24, 2003
    Inventors: Bernard Aspar, Chrystelle Lagahe, Olivier Rayssac, Bruno Ghyselen