Patents by Inventor On Chang

On Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161798
    Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITED
    Inventors: Xiu-Li YANG, He-Zhou WAN, Mu-Yang YE, Lu-Ping KONG, Ming-Hung CHANG
  • Publication number: 20240162065
    Abstract: A method of determining an operational status of a semiconductor manufacturing assembly uses internal vibrations of an in-situ assembly to detect defects. The method may include initiating a first test vibration in an internal structure of the semiconductor manufacturing assembly while the semiconductor manufacturing assembly is in-situ in a semiconductor processing chamber, receiving a first vibration signal caused by the first test vibration, transforming the first vibration signal into a first frequency domain representation of the first vibration signal, determining the operational status of the semiconductor manufacturing assembly based on the first frequency domain representation, and performing a corrective action for the semiconductor manufacturing assembly in response to the operational status.
    Type: Application
    Filed: November 15, 2022
    Publication date: May 16, 2024
    Inventors: Yao-Hung YANG, Chih-Yang CHANG, Shannon WANG
  • Publication number: 20240160844
    Abstract: The present disclosure provides a synonym searching method, which includes steps as follows. When receiving the vocabulary and the definition of the vocabulary from the user device, the natural language processing model is used to search the synonym of the vocabulary from the data governance dictionary according to the definition of the vocabulary; after providing the synonym to the user device, feedback information about the synonym is received from the user device, and the feedback information is used as the token of the vocabulary for the natural language processing model.
    Type: Application
    Filed: February 8, 2023
    Publication date: May 16, 2024
    Inventors: Wei-Chao CHEN, Chen-I HUANG, Yu-Lun CHANG, Chuo-Jui WU, Chih-Pin WEI
  • Publication number: 20240162084
    Abstract: A method for manufacturing a semiconductor structure includes preparing a dielectric structure formed with trenches respectively defined by lateral surfaces of the dielectric structure, forming spacer layers on the lateral surfaces, filling an electrically conductive material into the trenches to form electrically conductive features, selectively depositing a blocking layer on the dielectric structure, selectively depositing a dielectric material on the electrically conductive features to form a capping layer, removing the blocking layer and the dielectric structure to form recesses, forming sacrificial features in the recesses, forming a sustaining layer to cover the sacrificial features; and removing the sacrificial features to obtain the semiconductor structure formed with air gaps confined by the sustaining layer and the spacer layers.
    Type: Application
    Filed: January 26, 2024
    Publication date: May 16, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Yen HUANG, Ting-Ya LO, Shao-Kuan LEE, Chi-Lin TENG, Cheng-Chin LEE, Shau-Lin SHUE, Hsiao-Kang CHANG
  • Publication number: 20240162218
    Abstract: An electrostatic discharge device including a gate structure, a plurality of first doped regions, and a plurality of second doped regions. The gate structure is disposed on a substrate. The gate structure includes a body part and a plurality of extension parts. The extension parts are connected with the body part, and an extension direction of the body part is different from an extension direction of the extension parts. The first doped regions are located in the substrate between the extension parts. The second doped regions are located in the substrate at two outer sides of the extension parts. The first doped regions and the second doped regions have different conductivity types.
    Type: Application
    Filed: February 6, 2023
    Publication date: May 16, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chih Hsiang Chang, Mei-Ling Chao, Yin-Chia Tsai, Tien-Hao Tang, Kuan-Cheng Su
  • Publication number: 20240161843
    Abstract: An anti-fuse memory device includes an anti-fuse module, a reference current circuit and a controller. A write enable signal enables a write controller and a write buffer of the anti-fuse module to program a selected anti-fuse memory cell in an anti-fuse array of the anti-fuse module, and a timing controller of the anti-fuse module stops a program operation of the anti-fuse array after a sense amplifier of the anti-fuse module changes a state of a readout data signal for a predetermined time duration.
    Type: Application
    Filed: September 20, 2023
    Publication date: May 16, 2024
    Applicant: eMemory Technology Inc.
    Inventors: Chia-Fu Chang, Chun-Hung Lin, Jen-Yu Peng, You-Ruei Chuang
  • Publication number: 20240162183
    Abstract: In some embodiments, the present disclosure relates to an integrated chip including a substrate and a first die disposed over the substrate. A first plurality of die stopper bumps are disposed along a backside of the first die. The first plurality of die stopper bumps directly contact the backside of the first die, and the first plurality of die stopper bumps are arranged as a plurality of groups of die stopper bumps. A plurality of adhesive structures are also present. Each of the plurality of adhesive structures surrounds a corresponding group of the plurality of groups of die stopper bumps.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Inventors: Wei-Jhih Mao, Kuei-Sung Chang, Shang-Ying Tsai
  • Publication number: 20240162108
    Abstract: A knockdown heat sink structure includes a carrier body with a high-temperature section in contact with at least one heat source. A non-high-temperature section of the carrier body has a first radiating fin assembly, while a higher second radiating fin assembly is on the high-temperature section. The second radiating fin assembly has a first part higher than the height of the first radiating fin assembly, and a second part that outward spreads and extends from a top end of the first part and covers the first assembly without touching it, creating a spacing flow way. Therefore, the structure increases the heat dissipation area for the high-temperature section, allowing for faster heat dissipation.
    Type: Application
    Filed: May 11, 2023
    Publication date: May 16, 2024
    Inventors: Yuan-Yi Lin, Fu-Kuei Chang
  • Publication number: 20240161278
    Abstract: Provided is a method of identifying a selection region in an intraoral image. In detail, provided is a method of identifying a selection region in an intraoral image, including: obtaining the intraoral image; determining a reference point of the intraoral image; determining a brush, based on the reference point and at least one piece of distance information; identifying a region of the intraoral image, which overlaps a region determined by the brush, as the selection region; and displaying the selection region in the intraoral image.
    Type: Application
    Filed: March 11, 2022
    Publication date: May 16, 2024
    Applicant: MEDIT CORP.
    Inventor: Chang Man YOO
  • Publication number: 20240161966
    Abstract: A planar magnetic component is arranged on a circuit board of a resonant converter, and the resonant converter includes a primary-side circuit and a secondary-side circuit. The planar magnetic component includes an inductor trace, a primary-side trace, a secondary-side trace, and an iron core assembly. The iron core assembly includes an inductor iron core and an iron core. The primary-side trace surrounds the first through hole in a first direction and surrounds the second through hole in a second direction to form an ?-shaped trace. The inductor trace is formed on the primary-side layer board and coupled to the primary-side trace, and two ends of the inductor trace form an input terminal and an output terminal of the planar magnetic component.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Chien-An LAI, Yi-Hsun CHIU, Chun-Yu YANG
  • Publication number: 20240162256
    Abstract: Provided are an image sensor and an electronic system including the same. An image sensor includes a substrate having a pixel region in which an active region is defined, and a gate electrode on the active region, wherein the active region includes an edge portion extending along an outline of a top surface thereof, the edge portion including a local round edge portion having a first radius of curvature that is greater than a second radius of curvature of other portions of the edge portion, wherein the gate electrode includes a lateral gate portion on a portion of the top surface of the active region, a vertical gate portion on a sidewall of the active region, and a round inner corner portion integrally connected to the lateral gate portion and the vertical gate portion, the round inner corner portion facing the local round edge portion.
    Type: Application
    Filed: June 29, 2023
    Publication date: May 16, 2024
    Inventors: Kyoungeun Chang, Sungin Kim, Jameyung Kim, Incheol Cho
  • Publication number: 20240162142
    Abstract: A method of manufacturing a plurality of via structures includes providing an integrated circuit (IC) photo mask including via features and assist features positioned exclusively along alternating diagonal grid lines of a grid, aligning the IC photo mask with first metal segments of a first metal layer of a semiconductor substrate, the first metal segments having a first spacing corresponding to a first pitch of the grid, performing one or more photolithography processes including the IC photo mask, thereby defining via structure locations corresponding to the via features, and forming via structures at the defined via structure locations.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Inventors: Shih-Wei PENG, Chih-Min HSIAO, Ching-Hsu CHANG, Jiann-Tyng TZENG
  • Publication number: 20240161968
    Abstract: A planar transformer is configured on a multi-layer circuit board of a resonant converter. The planar transformer includes multiple layers of primary-side traces, multiple layers of secondary-side traces, and an iron core. The primary-side traces serve as a primary-side coil of the transformer to generate a first direction magnetic flux when the resonant converter operates. The secondary-side traces serve as a secondary-side coil of the transformer to generate a second direction magnetic flux when the resonant converter operates. The primary-side traces and the secondary-side traces surround a first core pillar and the second core pillar, and the primary-side traces and the secondary-side traces are configured in a specific stacked structure on the multi-layer circuit board, so that a magnetomotive force of the planar transformer can maintain balance during the operation of the resonant converter.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Hsun CHIU, Yi-Sheng CHANG, Chun-Yu YANG, Meng-Chi TSAI
  • Publication number: 20240162321
    Abstract: A semiconductor structure includes a substrate, a dielectric wall, and two device units. The dielectric wall has two side surfaces opposite to each other. The two device units are respectively formed at the two side surfaces of the dielectric wall. Each of the device units includes channel features, a gate feature and a dielectric filler unit. The channel features are disposed on a corresponding one of the side surfaces of the dielectric wall, and spaced apart from each other. The gate feature is formed around the channel features and disposed on the corresponding one of the side surfaces of the dielectric wall. The dielectric filler unit includes a plurality of first dielectric fillers, each of which is disposed between the dielectric wall and a corresponding one of the channel features. The first dielectric fillers have a dielectric constant greater than that of the dielectric wall.
    Type: Application
    Filed: February 22, 2023
    Publication date: May 16, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huang-Chao CHANG, Ta-Chun LIN, Chun-Sheng LIANG, Jhon-Jhy LIAW
  • Publication number: 20240161502
    Abstract: A method for detecting and correcting cycle time includes multiple steps performed by a computing device, and these steps include: obtaining a video from a camera, obtaining a bounding box from an input device, inputting the bounding box and the video to a cycle time detection model to generate a preliminary report, wherein the bounding box is used to set a region of interest in the video, the preliminary report includes a plurality of candidate events, and each candidate event includes a start time and a candidate cycle time, receiving a revision label associated with at least one candidate event from the input device, and tuning a hyper-parameter of the cycle time detection model according to the revision label.
    Type: Application
    Filed: February 9, 2023
    Publication date: May 16, 2024
    Inventors: Jing-Lun Huang, Yu-Lun Chang, Wei-Chao Chen
  • Publication number: 20240161981
    Abstract: A multilayer electronic component includes a body including a capacitance forming portion including a dielectric layer and internal electrodes alternately disposed with the dielectric layer in a first direction and a cover portion disposed on one surface and the other surface of the capacitance forming portion in the first direction, and external electrodes disposed on the body, wherein a secondary phase including Al is disposed at an interface between the internal electrode and the dielectric layer, and the ratio of an area occupied by the secondary phase to an area of the capacitance forming portion is 0.03% or more and 0.40% or less.
    Type: Application
    Filed: February 2, 2023
    Publication date: May 16, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mun Seong JEONG, Jung Min KIM, Jin Kyung PARK, Chang Soo JANG, Su Ji KANG, Na Young KIM
  • Publication number: 20240161541
    Abstract: A face recognition system and a face recognition method are provided. The face recognition system includes an image capturing device and a processing device. The image capturing device is configured to capture a face image of a user to be recognized, de-identify the face image to obtain de-identified image data, and transform the de-identified image data into multiple de-identified features and output. The processing device is configured to verify an identity of the user to which the de-identified features belong by using a trained machine learning model. The machine learning model is trained by using de-identified features and identities of multiple users registered in advance.
    Type: Application
    Filed: September 6, 2023
    Publication date: May 16, 2024
    Applicant: DeCloak Intelligences Co.
    Inventors: Yao-Tung Tsou, Yun-Yu Wang, Guo-Cheng Chien, Kuo-Yu Chang
  • Publication number: 20240164054
    Abstract: A single-phase immersion cooling system includes an immersion cooling tank having a component area, which is separate from a main chamber and is configured to receive a heat-generating electronic device. A coolant circulates along a flow path, in a chamber path through the main chamber and a component path through the component area. A rotating propeller is mounted within the immersion cooling tank, causing a driven flow path in the component area. The driven flow path is configured to cause contact between the coolant in the driven flow path and the heat-generating electronic device when the heat-generating electronic device is received within the component area. The coolant in the driven flow path circulates at a faster speed than the coolant in the chamber path.
    Type: Application
    Filed: January 13, 2023
    Publication date: May 16, 2024
    Inventors: Chao-Jung CHEN, Yu-Nien HUANG, Chang-Yu CHIANG
  • Publication number: 20240161654
    Abstract: A renal surgery training system includes: an internal calyx fluid simulation device including a supply hose configured to supply fluid, a simulator connected to the supply hose and through which the fluid supplied by the supply hose flows, a fluid receiver connected to the simulator such that the fluid flows and in which the fluid moved from the simulator is received, and an outlet hose configured to discharge the fluid stored in the fluid receiver, the internal calyx fluid simulation device configured to simulate a flow of fluid in a kidney; and a translation device disposed below the internal calyx fluid simulation device and configured to perform a translational movement to translate the internal calyx fluid simulation device, the renal surgery training system configured to provide training on removing an object swimming inside the kidney by a flow of fluid in the kidney by using training equipment.
    Type: Application
    Filed: September 7, 2022
    Publication date: May 16, 2024
    Applicant: ROEN SURGICAL, INC.
    Inventors: Byung Sik CHEON, Chang Kyun KIM, Dong Soo KWON
  • Publication number: 20240162313
    Abstract: A method for forming a high electron mobility transistor is disclosed. A mesa structure having a channel layer and a barrier layer is formed on a substrate. The mesa structure has two first edges extending along a first direction and two second edges extending along a second direction. A passivation layer is formed on the substrate and the mesa structure. A first opening and a plurality of second openings connected to a bottom surface of the first opening are formed and through the passivation layer, the barrier layer and a portion of the channel layer. In a top view, the first opening exposes the two first edges of the mesa structure without exposing the two second edges of the mesa structure. A metal layer is formed in the first opening and the second openings thereby forming a contact structure.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Tung Yeh, Chun-Liang Hou, Wen-Jung Liao, Chun-Ming Chang, Yi-Shan Hsu, Ruey-Chyr Lee