Patents by Inventor Osamu Goto

Osamu Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7091056
    Abstract: When a semiconductor light emitting device or a semiconductor device is manufactured by growing nitride III–V compound semiconductor layers, which will form a light emitting device structure or a device structure, on a nitride III–V compound semiconductor substrate composed of a first region in form of a crystal having a first average dislocation density and a plurality of second regions having a second average dislocation density higher than the first average dislocation density and periodically aligned in the first region, device regions are defined on the nitride III–V compound semiconductor substrate such that the device regions do not substantially include second regions, emission regions or active regions of devices finally obtained do not include second regions.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: August 15, 2006
    Assignees: Sony Corporation, Sumitomo Electric Industries, Ltd.
    Inventors: Tsunenori Asatsuma, Shigetaka Tomiya, Koshi Tamamura, Tsuyoshi Tojo, Osamu Goto, Kensaku Motoki
  • Publication number: 20060097278
    Abstract: Provided is a GaN-based semiconductor light emitting device formed on a GaN single-crystal substrate and having a configuration capable of reducing a current leak. A GaN-based semiconductor laser device (50) is disclosed as an example of the GaN-based semiconductor light emitting device, and it is a semiconductor laser device having a structure such that a p-side electrode and an n-side electrode are provided on a multilayer structure of GaN-based compound semiconductor layers. The GaN-based semiconductor laser device (50) is similar in configuration to a conventional GaN-based semiconductor laser device formed on a sapphire substrate except that a GaN single-crystal substrate (52) is used in place of the sapphire substrate and that the multilayer structure is directly formed on the GaN single-crystal substrate (52) without providing a GaN-ELO structure layer. The GaN single-crystal substrate (52) has continuous belt-shaped core portions (52a) each having a width of 10 ?m.
    Type: Application
    Filed: June 19, 2003
    Publication date: May 11, 2006
    Inventors: Osamu Goto, Osamu Matsumoto, Tomomi Sasaki, Masao Ikeda
  • Publication number: 20060092264
    Abstract: An image forming apparatus having a plurality of light sources and printing an image carrier by collectively scanning an image carrier with beams from the plurality of light sources includes a screen processing unit for performing a screen process on input image data and a registration correction processing unit for performing skew correction on the image data on which the screen process has been performed and for performing an image shift process in the sub-scanning direction, which is a moving direction of the image carrier, based on a periodic characteristic of exposure by the collective scanning and the period of the screen by the screen process.
    Type: Application
    Filed: March 22, 2005
    Publication date: May 4, 2006
    Inventors: Yoshiki Matsuzaki, Kozo Tagawa, Takeshi Kato, Osamu Goto
  • Patent number: 7026179
    Abstract: When GaN or other nitride III-V compound semiconductor layers are grown on a substrate such as a sapphire substrate, thickness x of the substrate relative to thickness y of the nitride III-V compound semiconductor layers is controlled to satisfy 0<y/x?0.011 and x?450 ?m. Alternatively, if the maximum dimension of the substrate is D (cm), its warpage H is in the range of 0<H?70×10?4 (cm), and Z=y/x, D is controlled to satisfy the relation 0<D<(2/CZ)cos?1(1?HCZ), where C (cm?1) is the proportionality constant when the radius of curvature of the substrate ? (cm) is expressed as 1/?=CZ.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: April 11, 2006
    Assignee: Sony Corporation
    Inventors: Yasuhiko Suzuki, Takeharu Asano, Motonobu Takeya, Osamu Goto, Shinro Ikeda, Katsuyoshi Shibuya
  • Patent number: 6995406
    Abstract: In a multi-beam semiconductor laser including nitride III–V compound semiconductor layers stacked on one surface of a substrate of sapphire or other material to form laser structures, and including a plurality of anode electrodes and a plurality of cathode electrodes formed on the nitride III–V compound semiconductor layers, one of the anode electrodes is formed to bridge over one of the cathode electrodes via an insulating film, and another anode electrode is formed to bridge over another of the cathode electrodes via an insulating film.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: February 7, 2006
    Inventors: Tsuyoshi Tojo, Yoshifumi Yabuki, Shinichi Ansai, Tomonori Hino, Osamu Goto, Tsuyoshi Fujimoto, Osamu Matsumoto, Motonobu Takeya, Yoshio Oofuji
  • Patent number: 6972206
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: December 6, 2005
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Publication number: 20050227392
    Abstract: When a semiconductor light emitting device or a semiconductor device is manufactured by growing nitride III-V compound semiconductor layers, which will form a light emitting device structure or a device structure, on a nitride III-V compound semiconductor substrate composed of a first region in form of a crystal having a first average dislocation density and a plurality of second regions having a second average dislocation density higher than the first average dislocation density and periodically aligned in the first region, device regions are defined on the nitride III-V compound semiconductor substrate such that the device regions do not substantially include second regions, emission regions or active regions of devices finally obtained do not include second regions.
    Type: Application
    Filed: June 9, 2005
    Publication date: October 13, 2005
    Inventors: Tsunenori Asatsuma, Shigetaka Tomiya, Koshi Tamamura, Tsuyoshi Tojo, Osamu Goto, Kensaku Motoki
  • Publication number: 20050218422
    Abstract: A multi-beam semiconductor laser device capable of emitting respective laser beams with uniform optical output levels and enabling easy alignment is provided. This multi-beam semiconductor laser device (40) is a GaN base multi-beam semiconductor laser device provided with four laser stripes (42A, 42B, 42C and 42D) which are capable of emitting laser beams with the same wavelength. The respective laser oscillating regions (42A to 42D) are provided with a p-type common electrode (48) on a mesa structure (46) which is formed on a sapphire substrate (44), and have active regions (50A, 50B, 50C and 50D) respectively. Two n-type electrodes (52A and 52B) are provided on an n-type GaN contact layer (54) and located as common electrodes opposite to the p-type common electrode (48) on both sides of the mesa structure (46). The distance A between the laser stripe (42A) and the laser stripe (42D) is no larger than 100 ?m.
    Type: Application
    Filed: May 19, 2005
    Publication date: October 6, 2005
    Inventors: Tsuyoshi Tojo, Tomonori Hino, Osamu Goto, Yoshifumi Yabuki, Shinichi Ansai, Shiro Uchida, Masao Ikeda
  • Patent number: 6950451
    Abstract: A multi-beam semiconductor laser device capable of emitting respective laser beams with uniform optical output levels and enabling easy alignment is provided. This multi-beam semiconductor laser device (40) is a GaN base multi-beam semiconductor laser device provided with four laser stripes (42A, 42B, 42C and 42D) which are capable of emitting laser beams with the same wavelength. The respective laser oscillating regions (42A to 42D) are provided with a p-type common electrode (48) on a mesa structure (46) which is formed on a sapphire substrate (44), and have active regions (50A, 50B, 50C and 50D) respectively. Two n-type electrodes (52A and 52B) are provided on an n-type GaN contact layer (54) and located as common electrodes opposite to the p-type common electrode (48) on both sides of the mesa structure (46). The distance A between the laser stripe (42A) and the laser stripe (42D) is no larger than 100 ?m.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: September 27, 2005
    Assignee: Sony Corporation
    Inventors: Tsuyoshi Tojo, Tomonori Hino, Osamu Goto, Yoshifumi Yabuki, Shinichi Ansai, Shiro Uchida, Masao Ikeda
  • Patent number: 6939730
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: September 6, 2005
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Publication number: 20050191773
    Abstract: When GaN or other nitride III-V compound semiconductor layers are grown on a substrate such as a sapphire substrate, thickness x of the substrate relative to thickness y of the nitride III-V compound semiconductor layers is controlled to satisfy 0<y/x?0.011 and x?450 ?m. Alternatively, if the maximum dimension of the substrate is D (cm), its warpage H is in the range of 0<H?70×10?4 (cm), and Z=y/x, D is controlled to satisfy the relation 0<D<(2/CZ)cos?1(1?HCZ), where C (cm?1) is the proportionality constant when the radius of curvature of the substrate ? (cm) is expressed as 1/?=CZ.
    Type: Application
    Filed: June 23, 2004
    Publication date: September 1, 2005
    Inventors: Yasuhiko Suzuki, Takeharu Asano, Motonobu Takeya, Osamu Goto, Shinro Ikeda, Katsuyoshi Shibuya
  • Publication number: 20050178471
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Application
    Filed: April 18, 2005
    Publication date: August 18, 2005
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Publication number: 20050164418
    Abstract: Provided is a nitride semiconductor having a larger low-defective region on a surface thereof, a semiconductor device using the nitride semiconductor, a method of manufacturing a nitride semiconductor capable of easily reducing surface defects in a step of forming a layer through lateral growth, and a method of manufacturing a semiconductor device manufactured by the use of the nitride semiconductor. A seed crystal portion is formed into stripes on a substrate with a buffer layer sandwiched therebetween. Then, a crystal is grown from the seed crystal portion in two steps of growth conditions to form a nitride semiconductor layer. In a first step, a low temperature growth portion having a trapezoidal-shaped cross section in a layer thickness direction is formed at a growth temperature of 1030° C., and in a second step, lateral growth predominantly takes place at a growth temperature of 1070° C. Then, a high temperature growth potion is formed between the low temperature growth portions.
    Type: Application
    Filed: March 22, 2005
    Publication date: July 28, 2005
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima
  • Publication number: 20050145856
    Abstract: The present invention provides a gallium nitride semiconductor device including an electrode composed of a metallic film on an underlying gallium nitride compound semiconductor layer. The gallium nitride semiconductor device is characterized in that recessed portions are present dispersely over the whole surface area of the underlying compound semiconductor layer in contact with the electrode metallic film in such a manner that at least two recessed portions having a depth greater than the lattice constant of crystals constituting the underlying compound semiconductor layer are present on a width direction line in any 1 ?m width region of the whole surface area.
    Type: Application
    Filed: January 28, 2005
    Publication date: July 7, 2005
    Inventors: Tsunenori Asatsuma, Hiroshi Nakajima, Osamu Goto, Tsuyoshi Tojo
  • Publication number: 20050098791
    Abstract: A nitride semiconductor having a large low-defect region in a surface thereof, and a semiconductor device using the same are provided. Also, a manufacturing method for a nitride semiconductor comprising a layer formation step using a transverse growth technique where surface defects can easily be reduced, and a manufacturing method for a semiconductor device using the same are provided. On a substrate, a seed crystal part is formed in a stripe pattern with a buffer layer in between. Next, crystals are grown from the seed crystal part in two stages of growth conditions to form a nitride semiconductor layer. Low temperature growing parts with a trapezoid shaped cross section are formed at a growth temperature of 1030° C. in the first stage and a transverse growth is dominantly advanced at a growth temperature of 1070° C. to form a high temperature growing part between the low temperature growing parts in the second stage.
    Type: Application
    Filed: December 2, 2004
    Publication date: May 12, 2005
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima, Shinro Ikeda, Katsuyoshi Shibuya, Yasuhiko Suzuki
  • Patent number: 6890785
    Abstract: A nitride semiconductor having a large low-defect region in a surface thereof, and a semiconductor device using the same are provided. Also, a manufacturing method for a nitride semiconductor comprising a layer formation step using a transverse growth technique where surface defects can easily be reduced, and a manufacturing method for a semiconductor device using the same are provided. On a substrate, a seed crystal part is formed in a stripe pattern with a buffer layer in between. Next, crystals are grown from the seed crystal part in two stages of growth conditions to form a nitride semiconductor layer. Low temperature growing parts with a trapezoid shaped cross section are formed at a growth temperature of 1030° C. in the first stage and a transverse growth is dominantly advanced at a growth temperature of 1070° C. to form a high temperature growing part between the low temperature growing parts in the second stage.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: May 10, 2005
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Motonobu Takeya, Katsunori Yanashima, Shinro Ikeda, Katsuyoshi Shibuya, Yasuhiko Suzuki
  • Publication number: 20050062784
    Abstract: An image forming apparatus has: a recording head having plural unit recording heads divided in a direction orthogonal to a moving direction of a recording medium; a detecting section detecting at least offset of an image recorded by a vicinity of an end portion, in the direction orthogonal to the moving direction of the recording medium, of the plural unit recording heads; and a correcting section correcting recording offset of the recording head on the basis of results of detection of the detecting section.
    Type: Application
    Filed: July 30, 2004
    Publication date: March 24, 2005
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Yoshiki Matsuzaki, Kozo Tagawa, Ryo Ando, Takeshi Kato, Tsutomu Udaka, Toshiyuki Kazama, Osamu Goto, Kenichi Kawauchi
  • Publication number: 20050046667
    Abstract: Provided is an inkjet recording device that has a conveying unit for conveying a recording medium, plural recording head groups each structured by plural unit heads disposed along the conveying direction, and an ink receiving unit for receiving ink discharged from the unit heads. The recording head groups, correspond respectively to plural individual recording regions which are sectioned off in the recording medium transverse direction which is orthogonal to the conveying direction, are disposed so as to be at respectively different positions at adjacent individual recording regions along the conveying direction. The ink receiving unit is disposed so as to face ink drop discharging surfaces of the unit heads. The conveying unit is plural conveying belts disposed at positions evading trajectories of the ink drops from the unit heads as seen in a direction of a line normal to the recording medium so as to be divided in the conveying direction.
    Type: Application
    Filed: August 24, 2004
    Publication date: March 3, 2005
    Inventors: Ryo Ando, Hiroaki Satoh, Satoru Nishikawa, Kozo Tagawa, Takeshi Kato, Tsutomu Udaka, Toshiyuki Kazama, Yoshiki Matsuzaki, Osamu Goto, Susumu Kibayashi, Yoshihiko Mitamura
  • Publication number: 20050000407
    Abstract: A semiconductor laser, a semiconductor device and a nitride series III-V group compound substrate capable of obtaining a crystal growth layer with less fluctuation of the crystallographic axes and capable of improving the device characteristics, as well as a manufacturing method therefor are provided. The semiconductor laser comprises, on one surface of a substrate used for growing, a plurality of spaced apart seed crystal layers and an n-side contact layer having a lateral growing region which is grown on the basis of the plurality of seed crystal layers. The seed crystal layer is formed in that a product of width w1 (unit: ?m) at the boundary thereof relative to the n-side contact layer along the arranging direction A and a thickness t1 (unit: ?m) along the direction of laminating the n-side contact layer is 15 or less. This can decrease the fluctuation of the crystallographic axes in the n-side contact layer.
    Type: Application
    Filed: August 2, 2004
    Publication date: January 6, 2005
    Inventors: Motonobu Takeya, Katsunori Yanashima, Takeharu Asano, Osamu Goto, Shinro Ikeda, Katsuyoshi Shibuya, Tomonori Hino, Satoru Kijima, Masao Ikeda
  • Patent number: D500767
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: January 11, 2005
    Assignee: Brumby Corporation Limited
    Inventors: Masaaki Yoshikawa, Osamu Goto, Paul Fricker, Luca Guerciotti, Dimitri Bassis, Yasuyuki Satoh, Hironao Takahashi, Stephen Harris, Lester Harris, Alessandro Giussani, Urs Jann