Patents by Inventor Osamu Nagashima

Osamu Nagashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090295700
    Abstract: A display device includes a display region which is constituted of a plurality of partial regions, and drive circuits which are connected to a plurality of video signal lines for respective partial regions. The video signal lines and the drive circuits are connected with each other via relay lines. A center line of the drive circuit and a center line of the partial region are arranged at positions displaced from each other, and the relay lines have a bent portion between the drive circuit and the video signal lines. By forming the bent portion on the relay line, the line resistances of the relay lines can be adjusted thus decreasing display irregularities generated by the positional displacement of the drive circuit.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 3, 2009
    Inventors: Osamu Nagashima, Nobuyuki Ishige, Koichi Igeta, Yuji Maede
  • Patent number: 7579811
    Abstract: It is aimed at stably implementing a protection function of a secondary battery mainly under software control and providing a battery pack characterized by a reduced circuit installation area, parts costs, and power consumption. An AD converter outputs a voltage value between a positive electrode and a negative electrode of a secondary battery. Based on the voltage value, a microcontroller determines a state of the secondary battery out of overcharge, normal operation, and over-discharge states. According to the determined state, the microcontroller controls operations of a discharge current cutoff means and a charge current cutoff means via a FET driver. When it is determined that the secondary battery is placed in an overcurrent state based on the charge and discharge current size of the secondary battery, an overcurrent detection circuit enables the discharge current cutoff means to be a cutoff state in preference to control by the microcontroller.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: August 25, 2009
    Assignees: Sony Corporation, Maxim Japan Co., Ltd.
    Inventors: Hideyuki Sato, Yukio Tsuchiya, Ryuji Nakamichi, Osamu Nagashima, Toshihiro Koide
  • Patent number: 7567467
    Abstract: The present invention is a method of writing information to a synchronous memory device by examining a present word of N bits to be written, where each bit has a high or low value. The present word is compared to a previous word also having N bits to identify the number of bit transitions from a low value to a high value of vice versa. The present bit is inverted when the number of transitions is greater than N/2. To avoid the need for having an extra bit accompany data bytes to indicate the presence or absence of inversion, the present invention takes advantage of a data mask pin that is normally unused during writing operations to carry the inversion bit. Non-inverted data is written directly into the memory device while inverted data is first inverted again before writing to storage locations, so that true data is stored in the memory device.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: July 28, 2009
    Assignee: ATI Technologies, ULC
    Inventors: Joseph Macri, Olge Drapkin, Grigori Temkine, Osamu Nagashima
  • Patent number: 7551260
    Abstract: A liquid crystal display device is provided to prevent gas bubbles from being generated due to the contact of an inspection probe. An insulating film composed of a gate insulating film and a protection film is formed on a gate wire and wire inspection terminal, and is partially removed from an upper surface of the wire inspection terminal to form a concave portion exposing the top surface of the wire inspection terminal. A transparent conductive film made of ITO is formed on the insulating film, including the concave portion on the wire inspection terminal. The transparent conductive film is electrically connected with the wire inspection terminal at the concave portion, and formed extending onto the gate insulating film and protection film on the opposite side of a scanning wire of the wire inspection terminal. Disconnection inspection is performed using the extending portion as a contact portion with an inspection probe.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: June 23, 2009
    Assignee: Hitachi Displays, Ltd.
    Inventors: Osamu Nagashima, Kurando Shinba, Eisuke Hatakeyama, Hikaru Ito, Masataka Natori
  • Patent number: 7514902
    Abstract: To reduce calculation errors of remaining batter power so as to take into account capacity diminutions due to cycle degradation and temperature, a remaining power calculation device specifies a temperature correction value for calculation of remaining battery power corresponding to temperature, from among temperature correction values changed every predetermined number of charge/discharge cycles stored in a correction value storage device, on the basis of a temperature of a battery cell measured by a temperature measurement device and the number of charge/discharge cycles counted by a charge/discharge counting device, and calculates remaining battery power corresponding to the specified temperature correction value.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: April 7, 2009
    Assignee: Sony Corporation
    Inventors: Yukio Tsuchiya, Hideyuki Sato, Osamu Nagashima
  • Publication number: 20090059147
    Abstract: Light leakage between pixel electrodes over a video signal line in a TN-type liquid crystal display device in which a dot inversion driving is applied with a three o'clock viewing angle is prevented. Pixel electrodes (PX) are formed on both sides of a video signal line (DL) of a first substrate (SUB1), and an end of the pixel electrode (PX) and the video signal line (DL) overlap each other. Over a second substrate (SUB2), a black matrix (BM) is formed in a portion corresponding to the video signal line (DL). By shifting the black matrix BM and the video signal line DL to the left with respect to a gap G between the pixel electrodes PX, it is possible to prevent light leakage caused by a disclination line (DS) which occurs by a horizontal electric field between pixel electrodes (PX).
    Type: Application
    Filed: August 28, 2008
    Publication date: March 5, 2009
    Inventors: Koichi Igeta, Osamu Nagashima
  • Publication number: 20090061722
    Abstract: (Object) To provide a manufacturing method for a display device according to which a hole is created in a pair of substrates using a water jet without causing damage.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 5, 2009
    Inventors: Masataka Natori, Osamu Nagashima
  • Publication number: 20090017373
    Abstract: Erroneous insertion of a battery into an imaging device resulting from downsizing of the battery is prevented. In a battery loading and unloading mechanism for loading and unloading a battery 2 formed in a flat rectangular parallelepiped and having an almost square main surface to and from a device (an imaging device 1) to be detachable equipped with the battery 2, the battery 2 is formed with projecting portions 26, 27 at longitudinal both ends of a back surface thereof and along the back surface, the back surface being a surface opposite to an insertion surface of the battery inserted into the device, whereby even the battery formed in a flat rectangular parallelepiped and having the almost-square main surface can be prevented from being erroneously inserted into the device.
    Type: Application
    Filed: December 22, 2005
    Publication date: January 15, 2009
    Inventors: Takayoshi Yamasaki, Hiroaki Sato, Toshiaki Ueda, Tomonori Watanabe, Yoichi Miyajima, Osamu Nagashima, Mieko Hara
  • Publication number: 20080315846
    Abstract: A battery pack, a battery charger, a method for charging a battery pack are provided. The battery pack includes a secondary battery, a switch element for controlling charging and discharging the secondary battery, a controller for controlling the switch element, and a communication unit for performing with a battery charger. During charging, an initial charging is switched to a quick charging when a voltage of the secondary battery reaches a predetermined voltage, and the battery charger judges the battery pack as abnormal when the voltage does not reach the predetermined voltage within a timeout period after the initial charging is started. At least one of the timeout period and the predetermined is stored. At least one of the timeout period and the predetermined voltage to be read out is transmitted through the communication unit to the battery charger.
    Type: Application
    Filed: February 29, 2008
    Publication date: December 25, 2008
    Applicant: SONY CORPORATION
    Inventors: Masanao Sato, Koji Umetsu, Osamu Nagashima
  • Patent number: 7466577
    Abstract: A semiconductor storage employs a base substrate (101) having a command/address external terminal group (CA), a data input/output external terminal group (DQ), and a single chip select external terminal (CS), and also comprises a plurality of memory chips (110) to (113) mounted on a base substrate (101), each of which can individually carry out read and write operations. The terminals (CA), (DQ), and (CS) are connected to an interface chip (120). The interface chip (120) has a chip select signal generation circuit that can individually activate a plurality of memory chips (110) to (113) on the basis of an address signal fed by way of the terminal (CA) and on the basis of a chip select signal fed by way of the terminal (CS).
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: December 16, 2008
    Assignees: Hitachi, Ltd., Intellectual Property Group, Elpida Memory, Inc.
    Inventors: Tomonori Sekiguchi, Hideki Osaka, Tatemi Ido, Osamu Nagashima, Mitsuaki Katagiri, Ichiro Anjo
  • Publication number: 20080062372
    Abstract: A liquid crystal display device is provided to prevent gas bubbles from being generated due to the contact of an inspection probe. An insulating film composed of a gate insulating film and a protection film is formed on a gate wire and wire inspection terminal, and is partially removed from an upper surface of the wire inspection terminal to form a concave portion exposing the top surface of the wire inspection terminal. A transparent conductive film made of ITO is formed on the insulating film, including the concave portion on the wire inspection terminal. The transparent conductive film is electrically connected with the wire inspection terminal at the concave portion, and formed extending onto the gate insulating film and protection film on the opposite side of a scanning wire of the wire inspection terminal. Disconnection inspection is performed using the extending portion as a contact portion with an inspection probe.
    Type: Application
    Filed: September 11, 2007
    Publication date: March 13, 2008
    Inventors: Osamu Nagashima, Kurando Shinba, Eisuke Hatakeyama, Hikaru Ito, Masataka Natori
  • Publication number: 20080048876
    Abstract: A battery device includes a battery cell, a case housing the battery cell, an antenna, a battery-side communication unit performing wireless communication with an electronic-apparatus side communication unit provided at an electronic apparatus on which the battery device is removably mounted through the antenna, a memory unit storing battery data which is data concerning the battery device and a control unit performing control of the battery-side communication unit, both reading/writing of the battery data with respect to the memory unit or only reading thereof.
    Type: Application
    Filed: July 25, 2007
    Publication date: February 28, 2008
    Inventors: Yoichi Miyajima, Toshio Takeshita, Kei Tashiro, Osamu Nagashima, Masatsugu Honma
  • Publication number: 20080036425
    Abstract: A battery device includes a battery cell constituted by a secondary cell, a case that houses the battery cell, and a battery-side positive electrode terminal and a battery-side negative electrode terminal electrically provided in the case and connected to the battery cell. The battery device further includes a temperature detecting unit that detects the temperature of the battery cell, a temperature control unit that heats and/or cools the battery cell when an electric current is supplied thereto, and a current control unit that divides, according to the temperature detected by the temperature detecting unit, an externally-supplied charging current supplied from the outside via the battery-side positive electrode terminal and the battery-side negative electrode terminal into a first current supplied to the battery cell and a second current supplied to the temperature control unit.
    Type: Application
    Filed: July 24, 2007
    Publication date: February 14, 2008
    Applicant: Sony Corporation
    Inventors: Kei TASHIRO, Yoichi Miyajima, Osamu Nagashima, Toshio Takeshita
  • Publication number: 20070037045
    Abstract: A secondary battery for electronic appliance to be installed in an electronic appliance, thereby feeding an electric power to the electronic appliance, is disclosed, which includes: a battery cell in which a positive electrode, a negative electrode and an electrolyte are accommodated in a pack, and a positive electrode terminal and a negative electrode terminal from the positive electrode and the negative electrode, respectively are lead out from the same side face of the pack; a metallic battery can in which one opening from which the battery cell is inserted is formed and which accommodates the battery cell therein such that the side face from which the positive electrode terminal and the negative electrode terminal are lead out is faced towards the opening side; and a lid made of a synthetic resin in which a positive electrode terminal part and a negative electrode terminal part to be connected to the electrodes of the electronic appliance upon being connected to the positive electrode terminal and the neg
    Type: Application
    Filed: July 31, 2006
    Publication date: February 15, 2007
    Applicant: Sony Corporation
    Inventors: Toshio Takeshita, Yoichi Miyajima, Hiroaki Sato, Atsushi Takahashi, Shoichi Shintani, Kei Tashiro, Osamu Nagashima, Hideki Kamiya, Hisashi Aoki, Toshiyuki Okada, Yoshihiro Sato
  • Publication number: 20070037044
    Abstract: A secondary battery for electronic appliance to be installed in an electronic appliance, thereby feeding an electric power to the electronic appliance is disclosed, which includes a battery cell in which a positive electrode, a negative electrode and an electrolyte are accommodated in a pack, and a positive electrode terminal and a negative electrode terminal from the positive electrode and the negative electrode, respectively are lead out from the same side face of the pack; a metallic battery can in which one opening from which the battery cell is inserted is formed and which accommodates the battery cell therein such that the side face from which the positive electrode terminal and the negative electrode terminal are lead out is faced towards the opening side; and a lid made of a synthetic resin in which terminal parts to be connected to the electrodes of the electronic appliance upon being connected to the positive electrode terminal and the negative electrode terminal and being faced outwardly are provid
    Type: Application
    Filed: July 31, 2006
    Publication date: February 15, 2007
    Applicant: Sony Corporation
    Inventors: Hiroaki Sato, Yoichi Miyajima, Shoichi Shintani, Toshio Takeshita, Atsushi Takahashi, Kei Tashiro, Hideki Kamiya, Hisashi Aoki, Osamu Nagashima
  • Publication number: 20060233012
    Abstract: A semiconductor storage employs a base substrate (101) having a command/address external terminal group (CA), a data input/output external terminal group (DQ), and a single chip select external terminal (CS), and also comprises a plurality of memory chips (110) to (113) mounted on a base substrate (101), each of which can individually carry out read and write operations. The terminals (CA), (DQ), and (CS) are connected to an interface chip (120). The interface chip (120) has a chip select signal generation circuit that can individually activate a plurality of memory chips (110) to (113) on the basis of an address signal fed by way of the terminal (CA) and on the basis of a chip select signal fed by way of the terminal (CS).
    Type: Application
    Filed: March 30, 2006
    Publication date: October 19, 2006
    Inventors: Tomonori Sekiguchi, Hideki Osaka, Tatemi Ido, Osamu Nagashima, Mitsuaki Katagiri, Ichiro Anjo
  • Publication number: 20050134230
    Abstract: It is aimed at stably implementing a protection function of a secondary battery mainly under software control and providing a battery pack characterized by a reduced circuit installation area, parts costs, and power consumption. An AD converter outputs a voltage value between a positive electrode and a negative electrode of a secondary battery. Based on the voltage value, a microcontroller determines a state of the secondary battery out of overcharge, normal operation, and over-discharge states. According to the determined state, the microcontroller controls operations of a discharge current cutoff means and a charge current cutoff means via a FET driver. When it is determined that the secondary battery is placed in an overcurrent state based on the charge and discharge current size of the secondary battery, an overcurrent detection circuit enables the discharge current cutoff means to be a cutoff state in preference to control by the microcontroller.
    Type: Application
    Filed: November 12, 2004
    Publication date: June 23, 2005
    Inventors: Hideyuki Sato, Yukio Tsuchiya, Ryuji Nakamichi, Osamu Nagashima, Toshihiro Koide
  • Publication number: 20050127877
    Abstract: To reduce calculation errors of remaining battery power so as to take into account capacity diminutions due to cycle degradation and temperature, a remaining power calculation means specifies a temperature correction value for calculation of remaining battery power corresponding to temperature, from among temperature correction values changed every predetermined number of charge/discharge cycles stored in correction value storage means, on the basis of a temperature of a battery cell measured by a temperature measurement means and the number of charge/discharge cycles counted by charge/discharge counting means, and calculates remaining battery power corresponding to the specified temperature correction value.
    Type: Application
    Filed: November 12, 2004
    Publication date: June 16, 2005
    Inventors: Yukio Tsuchiya, Hideyuki Sato, Osamu Nagashima
  • Publication number: 20050055491
    Abstract: The present invention is a method of writing information to a synchronous memory device by examining a present word of N bits to be written, where each bit has a high or low value. The present word is compared to a previous word also having N bits to identify the number of bit transitions from a low value to a high value of vice versa. The present bit is inverted when the number of transitions is greater than N/2. To avoid the need for having an extra bit accompany data bytes to indicate the presence or absence of inversion, the present invention takes advantage of a data mask pin that is normally unused during writing operations to carry the inversion bit. Non-inverted data is written directly into the memory device while inverted data is first inverted again before writing to storage locations, so that true data is stored in the memory device.
    Type: Application
    Filed: October 15, 2004
    Publication date: March 10, 2005
    Inventors: Joseph Macri, Olge Drapkin, Grigori Temkine, Osamu Nagashima
  • Patent number: 6826095
    Abstract: A method of writing information to a synchronous memory device by examining a present word of N bits to be written, where each bit has a high or low value. The present word is compared to a previous word also having N bits to identify the number of bit transitions from a low value to a high value of vice versa. The present bit is inverted when the number of bit transitions is greater than N/2. To avoid the need for having an extra bit accompany data bytes to indicate the presence or absence of inversion, the present invention takes advantage of a data mask pin that is normally unused during writing operations to carry the inversion bit. Non-inverted data is written directly into the memory device while inverted data is first inverted again before writing to storage locations, so that true data is stored in the memory device.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: November 30, 2004
    Assignees: ATI Technologies Inc., Elpida Memory, Inc.
    Inventors: Joseph Macri, Olge Drapkin, Grigori Temkine, Osamu Nagashima