Patents by Inventor Osamu Okada

Osamu Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120219718
    Abstract: A CO2-facilitated transport membrane of excellent carbon dioxide permeability and CO2/H2 selectivity, which can be applied to a CO2 permeable membrane reactor, is stably provided. The CO2-facilitated transport membrane is formed such that a gel layer 1 obtained by adding cesium carbonate to a polyvinyl alcohol-polyacrylic acid copolymer gel membrane is supported by a hydrophilic porous membrane 2. More preferably, a gel layer supported by a hydrophilic porous membrane 2 is coated with hydrophilic porous membranes 3 and 4.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 30, 2012
    Applicant: Renaissance Energy Research Corporation
    Inventors: Osamu Okada, Masaaki Teramoto, Reza Yegani, Hideto Matsuyama, Keiko Shimada, Kaori Morimoto
  • Patent number: 8197576
    Abstract: A CO2-facilitated transport membrane of excellent carbon dioxide permeability and CO2/H2 selectivity, which can be applied to a CO2 permeable membrane reactor, is stably provided. The CO2-facilitated transport membrane is formed such that a gel layer 1 obtained by adding cesium carbonate to a polyvinyl alcohol-polyacrylic acid copolymer gel membrane is supported by a hydrophilic porous membrane 2. More preferably, a gel layer supported by a hydrophilic porous membrane 2 is coated with hydrophilic porous membranes 3 and 4.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: June 12, 2012
    Assignee: Renaissance Energy Research Corporation
    Inventors: Osamu Okada, Masaaki Teramoto, Reza Yegani, Hideto Matsuyama, Keiko Shimada, Kaori Morimoto
  • Patent number: 8154133
    Abstract: A low dielectric constant film/wiring line stack structure made up of a stack of low dielectric constant films and wiring lines is provided in a region on the upper surface of the semiconductor substrate except for the peripheral part of this surface. The peripheral side surface of the low dielectric constant film/wiring line stack structure is covered with a sealing film. This provides a structure in which the low dielectric constant films do not easily come off. In this case, a lower protective film is provided on the lower surface of a silicon substrate to protect this lower surface against cracks.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: April 10, 2012
    Assignee: Casio Computer Co., Ltd.
    Inventors: Taisuke Koroku, Takeshi Wakabayashi, Osamu Okada, Osamu Kuwabara, Junji Shiota, Nobumitsu Fujii
  • Patent number: 7922480
    Abstract: The invention provides a combustion apparatus which can inhibit an NOx generation even in the case of promoting a mixing between a high-temperature combustion gas and an air so as to intend to reduce an unburned combustible. In a combustion apparatus provided with a burner burning a fuel within a furnace in a theoretical air ratio or less, and an air port supplying a combustion air for a shortfall in the burner, a supply apparatus for supplying a nitrogen oxide generation inhibiting gas is provided in a mixing region between the both or near the mixing region. Further, the invention provides a wind box which can inhibit an NOx generation even in the case of promoting a mixing between a high-temperature combustion gas and an air so as to intend to reduce an unburned combustible.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: April 12, 2011
    Assignee: Babcock-Hitachi Kabushiki Kaisha
    Inventors: Kenji Kiyama, Shigeki Morita, Osamu Okada, Koji Kuramashi, Takanori Yano, Kenichi Ochi, Akira Baba, Miki Shimogori, Takeru Fukuchi, Hiroshi Yamaguchi, Hironobu Kobayashi, Masayuki Taniguchi, Hirofumi Okazaki, Kenji Yamamoto
  • Patent number: 7910405
    Abstract: A semiconductor device includes at least one semiconductor constructing body provided on one side of a base member, and having a semiconductor substrate and a plurality of external connecting electrodes provided on the semiconductor substrate. An insulating layer is provided on the one side of the base member around the semiconductor constructing body. An adhesion increasing film is formed between the insulating layer, and at least one of the semiconductor constructing body and the base member around the semiconductor constructing body, for preventing peeling between the insulating layer and the at least one of the semiconductor constructing body and base member.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: March 22, 2011
    Assignees: Casio Computer Co., Ltd., CMK Corporation
    Inventors: Osamu Okada, Hiroyasu Jobetto
  • Publication number: 20110036237
    Abstract: A CO2-facilitated transport membrane of excellent carbon dioxide permeability and CO2/H2 selectivity, which can be applied to a CO2 permeable membrane reactor, is stably provided. The CO2-facilitated transport membrane is formed such that a gel layer 1 obtained by adding cesium carbonate to a polyvinyl alcohol-polyacrylic acid copolymer gel membrane is supported by a hydrophilic porous membrane 2. More preferably, a gel layer supported by a hydrophilic porous membrane 2 is coated with hydrophilic porous membranes 3 and 4.
    Type: Application
    Filed: January 22, 2009
    Publication date: February 17, 2011
    Inventors: Osamu Okada, Masaaki Teramoto, Reza Yegani, Hideto Matsuyama, Keiko Shimada, Kaori Morimoto
  • Patent number: 7882362
    Abstract: In a data management apparatus (1) including a recording device (12) for recording contents data and a data processing section for processing the contents data, first management data for managing the contents data according to a first reference is recorded in the recording device (12), and the data processing section reproduces the contents data based on the first management data, and transfers the contents data to an external device (2) based on second management data which is used for management of the contents data by the external device according to a second reference different from the first reference. As a result, the protection of the contents data can be made while complying with related laws, and the contents data with optional functions added thereto can be backed up.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: February 1, 2011
    Assignee: Fujitsu Ten Limited
    Inventors: Yuu Nomura, Taku Yokawa, Yoshikazu Ueta, Mitsuhiro Maruo, Mitsuya Kawashita, Osamu Okada, Takeshi Ohhara
  • Patent number: 7863750
    Abstract: In this manufacturing method of a semiconductor device, after a sealing film is applied over an entire surface of a semiconductor wafer and hardened, a second groove for forming a side-section protective film is formed in the sealing film and on the top surface side of the semiconductor wafer. In other words, the sealing film is formed in a state where a groove that causes strength reduction has not been formed on the top surface side of the semiconductor wafer. Since the second groove is formed on the top surface side of the semiconductor wafer after the sealing film is formed, the semiconductor wafer is less likely to warp when the sealing film, made of liquid resin, is hardened.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: January 4, 2011
    Assignee: Casio Computer Co., Ltd.
    Inventors: Junji Shiota, Taisuke Koroku, Nobumitsu Fujii, Osamu Kuwabara, Osamu Okada
  • Patent number: 7820037
    Abstract: A desulfurizing agent is produced by mixing a copper compound, a zinc compound and an ammonium compound with an aqueous solution of an alkali substance to prepare or precipitate followed by calcitrating the resulting precipitate to form a calcined precipitate into a shape form of a copper oxide-zinc oxide-aluminum oxide mixture. The shaped form is impregnated with iron or nickel and calcined to produce a calcined oxide and reduced with hydrogen to form a sulfur-absorption desulfurizing agent.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: October 26, 2010
    Assignee: Osaka Gas Company Limited
    Inventors: Masataka Masuda, Shin-ichi Nagase, Susumu Takami, Osamu Okada
  • Patent number: 7816790
    Abstract: A semiconductor device includes a semiconductor substrate and low dielectric film wiring line laminated structure portions which are provided in regions on the semiconductor substrate except a peripheral portion thereof. Each of the laminated structure portions has a laminated structure of low dielectric films and a plurality of wiring lines. An insulating film is provided on an upper side of the laminated structure portion. Connection pad portions for electrodes are arranged on the insulating film to be electrically connected to the connection pad portions of uppermost wiring lines of the laminated structure portion. Bump electrodes for external connection are provided on the connection pad portions for the electrodes. A sealing film is provided on the insulating film and on the peripheral portion of the semiconductor substrate. Side surfaces of the laminated structure portions are covered with the insulating film or the sealing film.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: October 19, 2010
    Assignee: Casio Computer Co., Ltd.
    Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi
  • Patent number: 7751690
    Abstract: A recording and reproducing apparatus for reproducing information recorded on a recording medium concurrently while recording the information, includes a compression section, a temporary storage section, a reproducing process section, and a storage section. The compression section reads the information recorded on the recording medium and compresses read information. The temporary storage section stores compressed information provided by the compression process. The reproducing process section decompresses the compressed information output thereto from the temporary storage section and reproduces decompressed information. The storage section stores the compressed information output thereto from the temporary storage section.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: July 6, 2010
    Assignees: Fujitsu Ten Limited, Fujitsu Limited
    Inventors: Mitsuya Kawashita, Osamu Okada, Nobuyuki Batou, Taku Yokawa, Yoshikazu Ueta, Hidenori Mitsunaga, Takashi Kouno
  • Publication number: 20100144097
    Abstract: First, a trench is formed in parts of a semiconductor wafer, a sealing film and other elements corresponding to a dicing street and both sides thereof. In this state, the semiconductor wafer is separated into silicon substrates by the formation of the trench. Then, a resin protective film is formed on the bottom surface of each silicon substrate including the inner part of the trench. In this case, the semiconductor wafer is separated into the silicon substrates. However, a support plate is affixed to the upper surfaces of the columnar electrode and the sealing film via an adhesive layer. Therefore, when the resin protective film is formed, it is possible to prevent the entire workpiece including the separated silicon substrates from being easily warped.
    Type: Application
    Filed: December 7, 2009
    Publication date: June 10, 2010
    Applicants: CASIO COMPUTER CO., LTD.
    Inventors: TAISUKE KOROKU, OSAMU OKADA, OSAMU KUWABARA, JUNJI SHIOTA, NOBUMITSU FUJII
  • Publication number: 20100144095
    Abstract: First, a trench formed in parts of a semiconductor wafer, a sealing film and others corresponding to a dicing street and both sides thereof. In this state, the semiconductor wafer is separated into silicon substrates by the formation of the trench. Then, a resin protective film is formed on the bottom surface of each silicon substrate including the inner part of the trench. In this case, the semiconductor wafer is separated into the silicon substrates. However, a support plate is affixed to the upper surfaces of the columnar electrode and the sealing film via an adhesive layer. Therefore, when the resin protective film is formed, it is possible to prevent the entirety including the separated silicon substrates from being easily warped.
    Type: Application
    Filed: December 7, 2009
    Publication date: June 10, 2010
    Applicant: Casio Computer Co., Ltd.
    Inventors: Taisuke KOROKU, Osamu Okada, Osamu Kuwabara, Junji Shiota, Nobumitsu Fujii
  • Publication number: 20100144096
    Abstract: First, a trench is formed in parts of a semiconductor wafer, a sealing film and other elements corresponding to a dicing street and both sides thereof. In this state, the semiconductor wafer is separated into silicon substrates by the formation of the trench. Then, a resin protective film is formed on the bottom surface of each silicon substrate including the inner part of the trench. In this case, the semiconductor wafer is separated into the silicon substrates. However, a support plate is affixed to the upper surfaces of the columnar electrode and the sealing film via an adhesive layer. Therefore, when the resin protective film is formed, it is possible to prevent the entire workpiece including the separated silicon substrates from being easily warped.
    Type: Application
    Filed: December 7, 2009
    Publication date: June 10, 2010
    Applicants: Casio Computer Co., Ltd.
    Inventors: Taisuke Koroku, Osamu Okada, Osamu Kuwabara, Junji Shiota, Nobumitsu Fujii
  • Patent number: 7690624
    Abstract: A valve drive device which can prevent a locknut fixing a stem nut to a drive sleeve from getting loosened. The valve drive device comprises: the stem nut for screwing a valve stem thereinto; the drive sleeve engaging with a male spline formed on a peripheral outer surface of said stem nut, said drive sleeve including a worm gear on a peripheral outer surface thereof; a worm in meshing engagement with said worm gear; and a housing that supports said drive sleeve by bearings. The valve drive device further comprises: a stem nut fastening member having a first male screw that engages with a female screw provided on a peripheral inner surface of said drive sleeve; and a locknut that engages with a second male screw provided on a reduced diameter portion of said stem nut fastening member, said second male screw having a reverse screw thread relative to said first male screw, so that no slack may arise between said stem nut fastening member and said drive sleeve.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: April 6, 2010
    Assignees: The Japan Atomic Power Company, Nippon Gear Co., Ltd.
    Inventors: Haruo Ito, Susumu Watanabe, Osamu Okada
  • Publication number: 20100064986
    Abstract: The present invention provides a solid fuel burner, which, while rendering the capacity larger than that in the conventional art, can suppress an increase in an unignited region and thus can realize the prevention of an increase in NOx concentration in a combustion gas and the prevention of a lowering in combustion efficiency, and a combustion equipment and boiler including the burner. The burner includes a fuel-containing fluid supply nozzle (12) which supplies a fuel-containing fluid, from a connecting part in a fluid transfer flow passage (10) for transferring a fuel-containing fluid including a fuel and a medium for transfer of the fuel, toward an outlet part provided on the wall of a furnace (4).
    Type: Application
    Filed: March 27, 2007
    Publication date: March 18, 2010
    Applicant: BABCOCK-HITACHI KABUSHIKI KAISHA
    Inventors: Kenji Kiyama, Akira Baba, Takanori Yano, Osamu Okada, Hirofumi Okazaki, Kouji Kuramashi
  • Publication number: 20100019371
    Abstract: In this manufacturing method of a semiconductor device, after a sealing film is applied over an entire surface of a semiconductor wafer and hardened, a second groove for forming a side-section protective film is formed in the sealing film and on the top surface side of the semiconductor wafer. In other words, the sealing film is formed in a state where a groove that causes strength reduction has not been formed on the top surface side of the semiconductor wafer. Since the second groove is formed on the top surface side of the semiconductor wafer after the sealing film is formed, the semiconductor wafer is less likely to warp when the sealing film, made of liquid resin, is hardened.
    Type: Application
    Filed: July 22, 2009
    Publication date: January 28, 2010
    Applicant: Casio Computer Co., Ltd.
    Inventors: Junji SHIOTA, Talsuke Koroku, Nobumitsu Fujii, Osamu Kuwabara, Osamu Okada
  • Publication number: 20090308307
    Abstract: A crucible protection sheet is provided that can prevent damages to an inner crucible, hinder an outer crucible from silicon-carbidization, and transmit heat from the outer crucible to the inner crucible uniformly. In a crucible having an inner crucible 2 and an outer crucible 3, the crucible protection sheet is arranged between the two crucibles and is made of expanded graphite. The planar thermal conductivity is 120 W/(m·K) or higher, the gas permeability is less than 1.0×10?4 cm2/s, and the compression ratio is 20% or higher when the sheet is compressed in a thickness direction at a pressure of 34.3 MPa. Since the compression ratio is high, the effect of preventing breakage is great when inserting the inner crucible, improving workability and preventing the inner crucible from tilting inside the outer crucible.
    Type: Application
    Filed: July 9, 2007
    Publication date: December 17, 2009
    Applicant: TOYO TANSO CO., LTD.
    Inventors: Yoshiaki Hirose, Tetsuya Yuki, Teruhisa Kondo, Osamu Okada
  • Publication number: 20090243097
    Abstract: A low dielectric constant film/wiring line stack structure made up of a stack of low dielectric constant films and wiring lines is provided in a region on the upper surface of the semiconductor substrate except for the peripheral part of this surface. The peripheral side surface of the low dielectric constant film/wiring line stack structure is covered with a sealing film. This provides a structure in which the low dielectric constant films do not easily come off. In this case, a lower protective film is provided on the lower surface of a silicon substrate to protect this lower surface against cracks.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 1, 2009
    Applicant: Casio Computer Co., Ltd.
    Inventors: Taisuke KOROKU, Takeshi Wakabayashi, Osamu Okada, Osamu Kuwabara, Junji Shiota, Nobumitsu Fujii
  • Patent number: 7592672
    Abstract: A circuit substrate of a grounding structure of a semiconductor device according to the invention has a plurality of connection pads and a grounding wiring. The semiconductor device has a semiconductor substrate having one side face and the other side face opposite thereto, an insulating film formed thereon, an SOI integrated circuit provided thereon and including a plurality of connection pads, and electrodes for external connection each of which is connected to the corresponding connection pad. The semiconductor device has the external connection electrodes connected to the respective connection pads of the circuit substrate by a face-down bonding scheme. An under-filling material is provided between the semiconductor device and the circuit substrate, and there is provided a connection member which connects the other side face of the semiconductor device with the grounding wiring of the circuit substrate, and is made of a conductive material.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: September 22, 2009
    Assignee: Casio Computer Co., Ltd.
    Inventors: Takeshi Wakabayashi, Ichiro Mihara, Osamu Okada