Patents by Inventor Osamu Torii

Osamu Torii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8780376
    Abstract: Disclosed is an image processing apparatus having a function to cooperatively output, via a cooperative image processing apparatus, document data, including a data sending unit that sends to the cooperative image processing apparatus the document data to be output, for which the total limited number of output times is set, with output setting information including an allocated number of output times for the document data individually allocated for the cooperative image processing apparatus; and a number updating unit that updates the total limited number of output times set for the document data based on the allocated number of output times by subtracting the allocated number of output times from the total limited number of output times, when the data sending unit sends the document data with the output setting information to the cooperative image processing apparatus.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: July 15, 2014
    Assignee: Ricoh Company, Ltd.
    Inventors: Reiji Yukumoto, Takahiko Hayashi, Ayako Watanabe, Ryo Takemoto, Osamu Torii, Masafumi Nagao, Yasukiyo Nakamura
  • Publication number: 20140173377
    Abstract: According to an embodiment, a memory interface that includes n number of channels and writes data subjected to an error correction encoding process having capable of correcting t symbols, n number of first error correction decoding units that perform an error correction decoding process of correcting s (s<t) symbols on read data, and a second error correction decoding units that perform an error correction decoding process of correcting t symbols on read data from which an error is detected after the error correction decoding process of correcting s symbols.
    Type: Application
    Filed: March 14, 2012
    Publication date: June 19, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koji Horisaki, Toshikatsu Hida, Shinichi Kanno, Osamu Torii
  • Publication number: 20140108887
    Abstract: According to one embodiment, a storage device performs error correction processing of a code of which the maximum correction performance is T bits, the decoding device including an error correction processor for performing error correction processing using calculating devices capable of handling errors of J bits (J is an integer equal to or more than one and less than T), wherein an initial value of an error number expectation value is set to I (I is an integer equal to or more than one and less than T), and execution of increment of the error number expectation value and execution of the error correction processing is repeated until no error is detected or the error number expectation value becomes T bits.
    Type: Application
    Filed: December 26, 2013
    Publication date: April 17, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshikatsu HIDA, Shinichi Kanno, Osamu Torii, Koji Horisaki, Dong Zhang
  • Publication number: 20140032992
    Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory that includes memory cells each storing 3 bits, a control unit that writes data to the non-volatile semiconductor memory, and an encoding unit that generates a first parity for user data stored in the first page, a second parity for user data stored in the second page, and a third parity for user data stored in the third page. The user data, the first parity, the third parity, and a portion of the second parity are written to the non-volatile semiconductor memory by a first data coding and a portion of the second parity and a portion of the third parity are written to the non-volatile semiconductor memory by second data coding in which the first page is 0 bit, the second page is 2 bits, and the third page is 1 bit.
    Type: Application
    Filed: February 8, 2013
    Publication date: January 30, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tokumasa HARA, Osamu Torii
  • Patent number: 8640013
    Abstract: According to one embodiment, a storage device performs error correction processing of a code of which the maximum correction performance is T bits, the decoding device including an error correction processor for performing error correction processing using calculating devices capable of handling errors of J bits (J is an integer equal to or more than one and less than T), wherein an initial value of an error number expectation value is set to I (I is an integer equal to or more than one and less than T), and execution of increment of the error number expectation value and execution of the error correction processing is repeated until no error is detected or the error number expectation value becomes T bits.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: January 28, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshikatsu Hida, Shinichi Kanno, Osamu Torii, Koji Horisaki, Dong Zhang
  • Patent number: 8599442
    Abstract: An image processing apparatus utilization system includes image processing apparatuses; an apparatus search unit configured to search for the image processing apparatuses; a capability information obtaining unit configured to obtain scanning capability information from the image processing apparatuses; a delivery setting receiving unit configured to receive a delivery setting for a first image processing apparatus; a first scenario generation unit configured to generate a scenario including the scanning capability information and the delivery setting for the first image processing apparatus; a second scenario generation unit configured to generate scenarios for second image processing apparatuses based on the scenario for the first image processing apparatus; a scenario storing unit configured to store the scenarios generated by the first and second scenario generation units; and an image delivery unit configured to send image data received from one of the image processing apparatuses according to the deliver
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: December 3, 2013
    Assignee: Ricoh Company, Ltd.
    Inventors: Reiji Yukumoto, Osamu Torii, Hiroki Hiraguchi, Yasukiyo Nakamura, Kazuhide Tanabe
  • Publication number: 20130305120
    Abstract: According to one embodiment, a memory controller includes an encoding unit that generates a first parity for every user data and a second parity for two or more user data and the corresponding first parity, a memory interface unit that the non-volatile memory to write and read the user data and the parities to and from the non-volatile memory, and a decoding unit that performs an error correction decoding process using the user data, and the parities. The error correction decoding processing that uses both the first parity and the second parity has at least A (a correcting capability of the first parity)+B (a correcting capability of the second parity) bits of correcting capability for the first user data and its first and second parities and for the second user data and its first and second parities.
    Type: Application
    Filed: December 21, 2012
    Publication date: November 14, 2013
    Inventors: Osamu TORII, Shinichi Kanno
  • Patent number: 8582176
    Abstract: An image forming apparatus connected to an image forming system in which a plurality of image forming apparatuses is linked. The image forming apparatus comprises: a user environment information acquiring unit that acquires user environment information; a user environment information reflecting unit that generates the screen representing the settings by using the user environment information; a capability acquiring unit that acquires capability information representing capabilities; a settability determining unit that determines the settability of various settings; a display control unit that is a unit displaying the screen on the display unit and further displays the screen that represents a determination result of the settability determining unit on the display unit; a search unit that searches for a first image forming apparatus; and a search result output unit that further displays the screen representing a search result of the search unit on the display unit through the display control unit.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: November 12, 2013
    Assignee: Ricoh Company, Ltd.
    Inventors: Reiji Yukumoto, Osamu Torii, Takahiko Hayashi, Ryo Takemoto
  • Patent number: 8570582
    Abstract: An image forming apparatus including an acquisition unit configured to acquire a plurality of combinations of document reading settings and delivery destination information of image data from a storage device configured to store the plurality of combinations, a reception unit configured to display the plurality of combinations acquired by the acquisition unit and receive a selection of the plurality of combinations by a user, a duplication identification unit configured to determine, upon the reception unit receiving the selection, whether the selected plurality of combinations contain duplicated delivery destination information, and a control unit configured to control, upon the duplication identification unit determining that the selected plurality of combinations selected contain the duplicated delivery destination information, a transmission of image data such that the image data is transmitted once to a delivery destination corresponding to the duplicated delivery destination information.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: October 29, 2013
    Assignee: Ricoh Company, Limited
    Inventors: Osamu Torii, Hiroki Hiraguchi
  • Publication number: 20130246887
    Abstract: According to an embodiment, a memory controller includes: a coding unit that performs an error correction coding process for user data to generate first to n-th parities and performs the error correction coding process for each of the first to n-th parities to generate first to n-th external parities; and a decoding unit that performs an error correction decoding process using the user data, the first to n-th parities, and the first to n-th external parities. A generator polynomial used to generate an i-th parity is selected on the basis of a generator polynomial used to generate the first to (i?1)-th parities.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 19, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Osamu TORII, Shinichi Kanno, Ryo Yamaki
  • Publication number: 20130179571
    Abstract: The present invention provides a novel communications apparatus that includes a plurality of wired LAN functions and wireless LAN functions and facilitates determining which network interface is to be enabled more flexibly. The communications apparatus of this invention switches a plurality of wired LAN functions and wireless LAN functions and includes a network interface control unit that enables and disables wired LAN and wireless LAN, a wired LAN communication availability status acquisition unit that detects that there is a change in the status of communication availability of wired LAN and acquires the status of communication availability of wired LAN, and a network interface determining unit that enables only one network interface from communication availability status of wired LAN acquired by the wired LAN communication availability status acquisition unit and a plurality of operating states of the apparatus.
    Type: Application
    Filed: December 5, 2012
    Publication date: July 11, 2013
    Inventor: Osamu TORII
  • Patent number: 8438454
    Abstract: According to an embodiment, a semiconductor memory device includes a nonvolatile memory; an input/output control unit to control input/output of data to/from the nonvolatile memory; an address translation table that associates first address information specifying a logical recording position of user data stored in the nonvolatile memory with second address information indicating a physical recording position in the nonvolatile memory; a translating unit to translate the first address information to the second address information according to the table; and a generating unit to generate redundant data for checking whether there is error in the user data and the first address information used as one data piece. The input/output control unit records, as data set, the user data, the first address information, and the redundant data, which are used as one data set, in the physical recording position in the nonvolatile memory indicated by the second address information.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: May 7, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinichi Kanno, Osamu Torii
  • Publication number: 20130104002
    Abstract: According to one embodiment, a memory controller that controls a non-volatile semiconductor memory including a memory cell of 3 bits/cell includes a controller that extracts bits which becomes an error caused by the movement to the adjacent threshold voltage distribution from a first bit and a second bit of data to be written in each of the memory cells to generate a virtual page and an encoding unit that generate an error correcting code for the virtual page and writes the data for three pages and the error correcting code in the non-volatile semiconductor memory.
    Type: Application
    Filed: August 24, 2012
    Publication date: April 25, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tokumasa Hara, Osamu Torii
  • Publication number: 20130094059
    Abstract: An image forming apparatus including an acquisition unit configured to acquire a plurality of combinations of document reading settings and delivery destination information of image data from a storage device configured to store the plurality of combinations, a reception unit configured to display the plurality of combinations acquired by the acquisition unit and receive a selection of the plurality of combinations by a user, a duplication identification unit configured to determine, upon the reception unit receiving the selection, whether the selected plurality of combinations contain duplicated delivery destination information, and a control unit configured to control, upon the duplication identification unit determining that the selected plurality of combinations selected contain the duplicated delivery destination information, a transmission of image data such that the image data is transmitted once to a delivery destination corresponding to the duplicated delivery destination information.
    Type: Application
    Filed: November 13, 2012
    Publication date: April 18, 2013
    Inventors: Osamu TORII, Hiroki HIRAGUCHI
  • Publication number: 20130080863
    Abstract: According to one embodiment, a storage device performs error correction processing of a code of which the maximum correction performance is T bits, the decoding device including an error correction processor for performing error correction processing using calculating devices capable of handling errors of J bits (J is an integer equal to or more than one and less than T), wherein an initial value of an error number expectation value is set to I (I is an integer equal to or more than one and less than T), and execution of increment of the error number expectation value and execution of the error correction processing is repeated until no error is detected or the error number expectation value becomes T bits.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 28, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Toshikatsu HIDA, Shinichi KANNO, Osamu TORII, Koji HORISAKI, Dong ZHANG
  • Patent number: 8339648
    Abstract: An image forming apparatus reading documents based on a scenario and generating image data to transmit the image data with the scenario includes a scenario retrieving unit retrieving scenarios from a scenario storage device; a scenario reception unit receiving the retrieved scenarios; a plural scenario selection identification unit determining whether plural scenarios are received; a scenario destination acquisition unit acquiring, if the plural scenarios are received, delivery destination information from the received the plural scenarios; a duplicated scenario destination identification unit determining whether duplicated delivery destination information is in the acquired delivery destination information; a scenario processing unit carrying out, if the duplicated delivery destination information is contained, processing on one of the plural scenarios to create a processed scenario to transmit the image data once to a destination of the duplicated delivery destination information; and a scenario registratio
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: December 25, 2012
    Assignee: Ricoh Company, Ltd.
    Inventors: Osamu Torii, Hiroki Hiraguchi
  • Publication number: 20120246387
    Abstract: According to an embodiment, a semiconductor memory device includes a nonvolatile memory; an input/output control unit to control input/output of data to/from the nonvolatile memory; an address translation table that associates first address information specifying a logical recording position of user data stored in the nonvolatile memory with second address information indicating a physical recording position in the nonvolatile memory; a translating unit to translate the first address information to the second address information according to the table; and a generating unit to generate redundant data for checking whether there is error in the user data and the first address information used as one data piece. The input/output control unit records, as data set, the user data, the first address information, and the redundant data, which are used as one data set, in the physical recording position in the nonvolatile memory indicated by the second address information.
    Type: Application
    Filed: August 26, 2011
    Publication date: September 27, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinichi KANNO, Osamu Torii
  • Publication number: 20120221947
    Abstract: An information processing apparatus is connected to a viewing apparatus through which a document is viewed. A view management part creates view information that indicates a viewed portion of the document where the document has been viewed. A document management part creates change information that indicates a changed portion of the document where the document has been changed. A creation part creates individual apparatus basis change information that indicates a coincident portion where the viewed portion indicated in the view information and the changed portion indicated in the change information are coincident with each other. A transmission part transmits the individual apparatus basis change information to the viewing apparatus through which the document was viewed.
    Type: Application
    Filed: February 21, 2012
    Publication date: August 30, 2012
    Inventors: Reiji YUKUMOTO, Tetsuo Asakawa, Osamu Torii, Masafumi Nagao, Miki Oouchi, Daisuke Noguchi
  • Publication number: 20120215883
    Abstract: A document management apparatus delivers a to-be-delivered document to a delivery destination and collects information about browsing history of the document. The document management apparatus includes: a delivery-pattern determining unit; a delivery-information generating unit; a document delivery unit that delivers the document by transmitting the information of the delivery pattern to a network address of the delivery destination; and a browsing-history management unit that acquires information about browsing history. The delivery-pattern determining unit, when the type of the device is a type not adapted to a function of collecting information about browsing history, determines that a pattern for delivering a program for implementing collection of the information about browsing history together with the document as the delivery pattern.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 23, 2012
    Inventors: Daisuke NOGUCHI, Miki OOUCHI, Masafumi NAGAO, Osamu TORII, Reiji YUKUMOTO, Tetsuo ASAKAWA
  • Publication number: 20120215828
    Abstract: An information processing device is arranged to include a macro changing unit to change a pertinent device of a process in macro information to a second information processing device when the second information processing device has a function required to execute the process and determined as being not executable on the information processing device, and to set the pertinent device in the macro information to the information processing device when the function required to execute the process is determined as being executable on the information processing device.
    Type: Application
    Filed: February 22, 2012
    Publication date: August 23, 2012
    Applicant: RICOH COMAPNY, LTD.
    Inventors: Osamu TORII, Takahiko Hayashi, Reiji Yukumoto, Ayako Watanabe, Ryo Takemoto, Masafumi Nagao, Yasukiyo Nakamura