Patents by Inventor Osvaldo J. Lopez

Osvaldo J. Lopez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110148376
    Abstract: A MOSFET main switch transistor has a pull-down FET coupled between a drain thereof and the gate of the main switch transistor. A gate of the pull-down FET is coupled to the drain of the main switch transistor by a capacitor and is connected to a source thereof by a resistor. The pull-down FET is operated by capacitive coupling to the voltage drop across the main switch and can be used to hold the gate of the main switch transistor at or near its source potential to avoid or reduce unintentional turn-on of the main switch transistor by the Miller effect.
    Type: Application
    Filed: December 9, 2010
    Publication date: June 23, 2011
    Applicant: Texas Instruments Incorporated
    Inventors: Shuming Xu, Jacek Korec, Osvaldo J. Lopez
  • Publication number: 20110095411
    Abstract: A wirebond-less packaged semiconductor device includes a plurality of I/O contacts, at least one semiconductor die, the semiconductor die having a bottom major surface and a top major surface, the top major surface having at least two electrically isolated electrodes, and a conductive clip system disposed over the top major surface, the clip system comprising at least two electrically isolated sections coupling the electrodes to respective I/O contacts.
    Type: Application
    Filed: December 13, 2010
    Publication date: April 28, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Juan Alejandro HERBSOMMER, George J. PRZYBYLEK, Osvaldo J. LOPEZ
  • Publication number: 20100176508
    Abstract: A semiconductor die package includes: an assembly including a semiconductor die, a clip structure attached to an upper surface of the semiconductor die, and a heat sink attached to an upper surface of the clip structure; and a molding material partially encapsulating the assembly, wherein an upper surface of the heat sink is exposed through the molding material.
    Type: Application
    Filed: January 12, 2009
    Publication date: July 15, 2010
    Applicant: CICLON SEMICONDUCTOR DEVICE CORP.
    Inventors: Juan Alejandro Herbsommer, Jonathan A. Noquil, Osvaldo J. Lopez
  • Publication number: 20080036078
    Abstract: A wirebond-less packaged semiconductor device includes a plurality of I/O contacts, at least one semiconductor die, the semiconductor die having a bottom major surface and a top major surface, the top major surface having at least two electrically isolated electrodes, and a conductive clip system disposed over the top major surface, the clip system comprising at least two electrically isolated sections coupling the electrodes to respective I/O contacts.
    Type: Application
    Filed: August 14, 2006
    Publication date: February 14, 2008
    Applicant: Ciclon Semiconductor Device Corp.
    Inventors: Juan Alejandro Herbsommer, George J. Przybylek, Osvaldo J. Lopez
  • Patent number: 6580321
    Abstract: An active clamping circuit for a multi-stage power amplifier includes a feedback circuit which affects the gain of the amplifier. The feedback circuit feeds an output via a filter and a clamping transistor to an input of at least one stage of the power amplifier. The output fed to the filter and clamping transistor may be tapped from one or more diodes belonging to a diode stack connected to the power amplifier's output.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: June 17, 2003
    Assignee: Anadigics, Inc.
    Inventors: Thomas William Arell, Henry Liwinski, Joel Morison Lott, Osvaldo J. Lopez
  • Patent number: 6514698
    Abstract: DNA Methyltransferases can be utilized in methods for quickly and accurately: determining variations, mutations or polymorphisms in DNA sequences; identifying specific alleles in single copy genes; creating genomic fingerprints; creating DNA Paints; and generating ordered maps.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: February 4, 2003
    Inventors: Osvaldo J. Lopez, R. Michael Nelson
  • Patent number: 5428837
    Abstract: Technique for reducing local oscillator leakage in integrated frequency conversion circuits is disclosed, which provides coupling an external portion of a resonator circuit to the integrated frequency conversion circuit. The coupling is accomplished without using any of the DC power or ground pins of the conversion circuit. A frequency conversion circuit based on this technique includes resonator, oscillator, and mixer circuits. Part of the oscillator and mixer circuit is encapsulated in a package, whereas at least a portion of the resonator circuit is located outside the package. The outside portion of the resonator circuit connects to at least two external resonator pins of the package such that, during the operating of the conversion circuit, the net current entering the package via said external resonator pins is approximately zero.
    Type: Grant
    Filed: January 13, 1993
    Date of Patent: June 27, 1995
    Assignee: Anadigics, Inc.
    Inventors: Robert J. Bayruns, Scott D. Sweeney, Osvaldo J. Lopez