Abstract: A method for starting a polyphase DC motor having a rotor. The position of the rotor is detected by initiating current in each of the phases of the motor and measuring a time period between the initiation of current in the coil and an instant when the current exceeds a threshold current. The phase in which the current reaches the threshold in the shortest amount of time is the phase closest to the position of the rotor. A phase closest to the position of the rotor is identified in each of an odd number of trials, and a starting phase is selected as the phase identified in the majority of trials. The motor is started by providing current to the starting phase.

Abstract: A method and a circuit for switching a motor controller from pulse width modulation to linear control for a brush-less, sensor-less, poly-phase DC motor. The method includes steps of operating a drive circuit for a poly-phase direct current motor in a pulse width modulation mode and determining that a zero crossing will occur within a predetermined interval. The method also includes steps of enabling a bias current to a transconductance operational amplifier and changing an operating state of the drive circuit from the pulse width modulation mode to a linear mode. The method further includes steps of determining that the zero crossing has occurred, disabling the bias current to the transconductance operational amplifier and changing the operating state of the drive circuit from the linear mode to the pulse width modulation mode.

Abstract: A circuit and method for reconstructing the back emf of a floating coil of a polyphase dc motor in PWM mode is provided. The floating coil is coupled to a first capacitor through a floating phase switch that closes during a pulse produced by the PWM drive signaling the appropriate time to sample in the PWM cycle. The signal on the floating coil is sampled and the sampled signal is stored using a capacitor. After the sampling period, the stored signal is discharged (or charged) at a rate that substantially models the slew rate or slope rate of the expected back emf signal at or near the zero crossing of the back emf signal with the common tap signal. The voltage across the capacitor is a reconstruction of the actual back emf and is generated using samples of the back emf. The reconstructed back emf is compared to the center tap voltage to more accurately detect the zero crossing.

Abstract: A DMOS device in a complex integrated circuit having a well region defined by a buried isolation region and an overlapping deep drain region within an epitaxial layer formed over a substrate, a body region having two source regions within the well region, insulated gates over the two source regions, and a Schottky contact over a central portion of the well region and spaced from the body region. The Schottky contact defines a Schottky diode within the epitaxial layer for diverting current from the substrate in the event of a below ground effect or an oversupply effect. The invention reduces or eliminates altogether the effects of parasitic transistors in the complex integrated circuit.

Abstract: A method for starting a polyphase DC motor having a rotor. The position of the rotor is detected by initiating current in each of the phases of the motor and measuring a time period between the initiation of current in the coil and an instant when the current exceeds a threshold current. The phase in which the current reaches the threshold in the shortest amount of time is the phase closest to the position of the rotor. A phase closest to the position of the rotor is identified in each of an odd number of trials, and a starting phase is selected as the phase identified in the majority of trials. The motor is started by providing current to the starting phase.

Abstract: A circuit and method for clocking counters in a polyphase dc motor is provided in which the motor is capable of operating at two or more operating states, spin-up and regulation. The system clock is connected to the clocking circuit through dividers to produce a first clock signal having a low frequency for operating the counter at spin-up, and a second clock signal having a higher frequency for operating the counter at regulation. The clocking circuit includes a switch for connecting the first clock signal to the clock input of the counter when the motor is at spin-up, and for connecting the second clock signal to the clock input when the motor is at regulation. The switch is controlled by a switch control circuit that ensures that switching does not occur when the counter is timing the motor by only allowing the switching to occur when the counter is at an end of a timing cycle and before the counter resets. An at-speed circuit is used to determine whether the motor is at spin-up or at regulation.

Abstract: A circuit and method for measuring a back EMF voltage of a voice coil in a mass storage device, or the like, includes an amplifier connected across the coil to produce an output signal proportional to a voltage across the coil and a circuit connected to selectively connect the output signal of the amplifier to a circuit output when a driving current is not applied to said coil. A sample window is generated after drive currents within the coil have been allowed to decay to zero, and between a time during which a PWM signal changes from negative to positive and a time when the PWM waveform crosses a voltage error value.

Abstract: A method and a circuit for switching a motor controller from pulse width modulation to linear control for a brush-less, sensor-less, poly-phase DC motor. The method includes steps of operating a drive circuit for a poly-phase direct current motor in a pulse width modulation mode and determining that a zero crossing will occur within a predetermined interval. The method also includes steps of enabling a bias current to a transconductance operational amplifier and changing an operating state of the drive circuit from the pulse width modulation mode to a linear mode. The method further includes steps of determining that the zero crossing has occurred, disabling the bias current to the transconductance operational amplifier and changing the operating state of the drive circuit from the linear mode to the pulse width modulation mode.

Abstract: A DMOS device in a complex integrated circuit having a well region defined by a buried isolation region and an overlapping deep drain region within an epitaxial layer formed over a substrate, a body region having two source regions within the well region, insulated gates over the two source regions, and a Schottky contact over a central portion of the well region and spaced from the body region. The Schottky contact defines a Schottky diode within the epitaxial layer for diverting current from the substrate in the event of a below ground effect or an oversupply effect. The invention reduces or eliminates altogether the effects of parasitic transistors in the complex integrated circuit.

Abstract: A set of circuits for controlling the slew rate of a driving transistor in a rotating three-phase DC motor having a "Y" configuration of coils. The slew rate is reduced when the rotational speed of the motor is low. The slew rate is controlled by controlling the voltage applied to a control terminal of the driving transistor. The voltage applied to the control terminal of the driving transistor is selected in response to a control signal that is indicative of the speed of the motor.

Abstract: A circuit and method to clamp a node of a power device connected to a driving node of a polyphase d-c motor to a reference potential during a powering off of the drive includes a current mirror and a comparator. A first input of the comparator is connected to the reference potential, and a second input is connected to the driving node. The reference potential may be a ground potential, or, preferably, the potential at another driving node of the motor. An output of the comparator is connected to a first side of the current mirror. A circuit is connected to apply a current reflecting the output of the comparator to a low side driver connected to the node.

Abstract: A power-switched driver circuit for a disc drive that provides accurate back emf detection in PWM mode. In one embodiment, a power transistor is coupled between the low side drivers and ground. During the off time of a PWM cycle, all of the high side drivers are off and the current recirculates through two of the low side drivers. The power transistor is off. This disconnects the motor from ground and allows the voltage on the center tap of the motor to be about half of V.sub.cc, which allows the back emf of the motor to be detected during the off time using a conventional comparator as the back emf approaches a zero crossing. During the on time of a PWM cycle, the power transistor is on.In an alternative embodiment, a power transistor is coupled between the high side drivers and V.sub.cc. During the off time of a PWM cycle, all of the low side drivers are turned off and the current recirculates through two of the high side drivers. The power transistor is off, disconnecting the motor from V.sub.

Abstract: A circuit, and method of operation, allows initial operation of a parasitic transistor in a junction isolated integrated circuit. The initial operation activates elements that produce a turn-on drive signal to a power transistor that has a part in the parasitic transistor, resulting in ending the operation of the parasitic transistor. A low side driver, such as an N channel DMOS, in a bridge circuit for an inductive load is arranged with a sinker region close by so that the sinker region acts as a preferred collector of a parasitic transistor that also includes a region of the low side driver as an emitter. The circuit includes logic that processes signals developed by initial operation of the parasitic transistor to develop the turn-on drive signal to the particular low side driver without affecting other low side drivers in the integrated circuit and before any other devices in the integrated circuit are caused to sink any appreciable current in parasitic transistor operation.

Abstract: A pulse width modulated (PWM) motor drive with back EMF monitoring of the floating phase of a polyphase motor is arranged so that zero crossings of the back EMF can be read without interference by PWM switching. A measure is taken of an interval between two zero crossings and, in the next interval, the PWM switching is stopped near to and before the next expected zero crossing, based on the time of the last prior interval. A period counter counts up during the first interval and another counter, loaded with the previous count reached by the period counter, counts down at the same rate during the second interval until a certain number is reached, near to but before zero, to generate a signal that results in stopping PWM switching until after the next zero crossing is detected.

Abstract: In a disk drive, the read-write heads of the disk drive should be parked during a power failure. The kinetic energy of the spinning rotor is used to move the head away from the disk's surface. A high voltage is produce from the low voltage spindle motor by using a BEMF voltage to step up the voltage in a voltage supply capacitor to a higher voltage by enabling or disabling a switch connected to a comparator. When the switch is turned on, it shorts the rectified voltage in the stator windings to ground in order provide a current path for a current formed in the coils by the BEMF. When the current reaches a predetermined level, the switch is turned off. The current flows through the voltage supply capacitor so that its voltage is "kicked-up" by the inductance of the windings and by the BEMF still present in the stator windings. This increased voltage is used to park the heads and to brake the motion of the spindle. Two control feedback loops are used to more efficiently enable the voltage conversion.

Abstract: A full wave rectifier includes an amplifier having a minus input, a plus input and an amplifier output; an input resistor connected between a circuit input and the minus input; and a current bridge having an output terminal connected to the circuit output, a first terminal connected to the minus input and a second terminal connected to the amplifier output. The current bridge includes a first current mirror circuit and a second current mirror circuit. The first current mirror circuit includes a first current source and a second current source, a source end of each current source of the first and second current sources being connected to the first terminal, a drain end of the first current source being connected to the second terminal and a drain end of the second current source being connected to the output terminal.

Abstract: A voltage multiplier has first, second, and third capacitors, each having first and second plates. The multiplied output voltage is developed between the first and second plates of the third capacitor. First and second diodes are connected respectively between first plates of the first and second and the second and third diodes. A switch is connected between the supply voltage and the first plate of the first capacitor. First and second inverters are provided, each having an input, and having an output connected respectively to the second plates of the first and second capacitors. The first inverter is connected to the supply voltage to produce the supply voltage as an output of the first inverter when a low state is applied to the input of the inverter. The second inverter is connected to the first plate of the first capacitor to produce a voltage from the first capacitor as an output of the second inverter when a low state is applied to the input of the second inverter.

Abstract: A full wave rectifier includes an amplifier having a minus input, a plus input and an amplifier output; an input resistor connected between a circuit input and the minus input; and a current bridge having an output terminal connected to the circuit output, a first terminal connected to the minus input and a second terminal connected to the amplifier output. The current bridge includes a first current mirror circuit and a second current mirror circuit. The first current mirror circuit includes a first current source and a second current source, a source end of each current source of the first and second current sources being connected to the first terminal, a drain end of the first current source being connected to the second terminal and a drain end of the second current source being connected to the output terminal.

Abstract: An automotive charging circuit fault detection circuit includes a pseudo stator-phase signal generator and a stator-phase existence circuit for determining if a stator-phase signal is below a predetermined threshold. A pseudo stator-phase signal control circuit selectively applies the pseudo stator-phase signal to replace the stator-phase signal when the stator-phase existence circuit determines that the stator-phase signal is below the predetermined threshold. A voltage detector circuit continues the application of the pseudo stator-phase signal if an output voltage from the charging circuit is above a minimum voltage. A timer times a predetermined time the stator-phase signal is below the predetermined threshold to enable the voltage detection circuit, and a warning indicator provides a warning if the pseudo stator-phase signal is applied and if an output voltage from the charging circuit is below the minimum voltage.

Abstract: A pair of control transistors and a pair of storage transistors have their collectors coupled to a current source. The emitters of the storage transistors are grounded and the emitters of the control transistors are coupled to the bases of the storage transistors. The control transistor collector and base electrodes are cross-coupled, and the storage transistor collector and base electrodes are also cross-coupled. The emitter of each control transistor is connected to the collector of the associative storage transistor through a respective resistor. Two diodes in series connect the collectors of the control transistor, and a command transistor having a grounded emitter electrode, drives the common node of the diodes.