Abstract: A novel semiconductor power transistor is presented. The semiconductor structure is simple and is based on a FET structure, where multiple channels and multiple gate regions are formed in order to achieve a lower specific on-resistance, and a higher control on the transport properties of the device. No dielectric layer is present between gate electrodes and device channels, decreasing the parasitic capacitance associated with the gate terminal. The fabrication of the device does not require Silicon On Insulator techniques and it is not limited to Silicon semiconductor materials. It can be fabricated as an enhancement or depletion device with much more control on the threshold voltage of the device, and with superior RF performance.

Abstract: A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage avoiding distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a linear dependence of the capacitance value with respect to the voltage of its control terminal.

Abstract: A novel inductive overvoltage suppression circuit for power converters is presented. High amplitude voltage spikes are generally occurring in high frequency power converters in presence of small parasitic inductances coupled to the power distribution rails, in correspondence of the switching transitions, particularly when high load currents are required. The presented invention proposes active clamps to limit the amplitude of the overvoltage. Furthermore the excess energy in the parasitic inductances is utilized to provide energy and/or a signal to determine when to turn on the next phase power device with the fastest transition possible without incurring in cross-conduction currents in the power stage of the converter, thus improving its overall performance, and circuit reliability in addition to achieving high conversion efficiency.

Abstract: A novel semiconductor power transistor is presented. The semiconductor structure is simple and is based on a MOS configuration with a drift region and an additional gate that modulates the carrier density in the drift region, so that the control on the carrier transport is enhanced and the specific on-resistance per area is reduced. This characteristic enables the use of short gate lengths while maintaining the electric field under the gate within reasonable values in high voltage applications, without increasing the device on-resistance. It offers the advantage of extremely lower on-resistance for the same silicon area while improving on its dynamic performances with respect to the standard CMOS technology. Another inherent advantage is that the switching gate losses are smaller due to lower VGS voltages required to operate the device.

Abstract: A novel switching hysteretic power converter is presented. The converter includes the generation of a synthetic ripple signal and a feedback network to combine a signal in phase with the inductor current with a signal proportional to the regulated output voltage. The presented approach provides a switching boost converter with a much simpler control method with respect to conventional inductive boost power converters. The hysteretic control provides stable operation in all conditions with excellent load and line transient response. Furthermore the hysteretic control allows high frequency switching, reducing the size and cost of the passive components. The presented converter includes the Discontinuous Conduction Mode of operation to achieve very high efficiency at light loads. The presented approach can also be applied to buck switching power converters with excellent performance in terms of transient response, stability, efficiency and operation at high switching frequencies.

Abstract: A novel semiconductor power transistor is presented. The semiconductor structure is simple and is based on a multi-gate vertical MOS configuration with multi semiconductor pillars, so that the control on the carrier transport is enhanced and the specific on-resistance per area is reduced. Furthermore, due to its particular geometry, the parasitic resistances due to the source/drain junctions, are also drastically reduced with respect to standard CMOS technologies. It offers the advantage of extremely lower on-resistance for the same silicon area while improving on its dynamic performances. The novel structure does not require Silicon On Insulator technologies and can be built using the standard Bulk CMOS process technology. This characteristic improves the thermal properties of the device which are extremely important in power applications.

Abstract: A novel switching hysteretic power converter is presented. The power converter combines the function of a capacitive charge pump with the function of an inductive step down converter to obtain a switching boost converter with a much simpler control method with respect to conventional inductive boost power converters. The hysteretic control provides stable operation in all conditions with excellent load transient response. Furthermore the hysteretic control allows high frequency switching reducing the size and cost of the passive components. The Discontinuous Conduction Mode of operation provides very high efficiency even at light loads. The presented power converter can be operated as a boost converter or as a buck converter simply by changing the switching phase of one switch. In both types of operation the efficiency of the hysteretic power converter can be quite high even at high switching frequencies.

Abstract: A novel semiconductor transistor is presented. The semiconductor structure has a gate region forming a channel with repetitive patterns in the direction perpendicular to the current flow, so that the portion of its channel that is not strictly planar contributes to a significant reduction of the silicon area occupied by the device. It offers the advantage of lower on-resistance for the same silicon area while improving on its dynamic performances. The additional cost to shape the channel region of the device in periodic repetitive patterns is minimum, which makes the present invention easy to implement in any conventional CMOS process technology and very cost effective.

Abstract: A novel circuit for reading data in solid state memory cells is presented. It can be used for any type of memory cell array but more specifically it is particularly suited for volatile memories like SRAM and DRAM. It is based on sensing the current in the ground line of the memory cell when the data is being read. This eliminates the need for detecting large voltage swings on the bit line resulting in large delays or complex sense amplification circuits. It offers the advantages of being very small in silicon area, very fast and very efficient. The read and write static noise margins are increased with respect to conventional techniques. The current can be amplified and converted to a voltage signal by a transimpedance amplifier ac coupled to a sense resistor on the ground line. The signal can be successively latched. The same technique can be used to detect when the writing of a cell has been successfully carried out.

Abstract: A novel semiconductor inverter is presented. The semiconductor structure is simple and has a reduced number of semiconductor junctions. It offers the advantage of being very small in area, very fast and very efficient. The current conductivity from either of the two main terminals to the output terminal is controlled by the gate voltage by means of depleting and enhancing the areas underneath the gate oxide. The signal isolation is obtained mainly by the carrier depletion of the channel region. Having a reduced number of semiconductor junctions, the intrinsic current leakage can be very small. This inverter is the elementary component for latches, memory and logic elements based on this technology.

Abstract: A novel semiconductor latch is presented. The semiconductor structure is simple and has a reduced number of semiconductor junctions. It offers the advantage of being very small in area, very fast and very efficient. The current conductivity in the structures of the latch circuit is controlled by the gates voltage by means of depleting and enhancing the areas under the gate oxide. The signal isolation is obtained mainly by the carrier depletion of the channel region. By having a reduced number of semiconductor junctions, the intrinsic current leakage can be very small. This latch is the elementary component for volatile memory and logic elements based on this principle.

Abstract: Exemplary embodiments are directed to wireless power transfer. A receiver with a receive antenna couples with near field radiation in a coupling-mode region. The receiver generates an RF signal at a resonant frequency responsive to the near field radiation. A de-tuning circuit generates a variable impedance responsive to a control signal to modify the RF signal to a smaller amplitude or to a different resonant frequency. A rectifier converts the modified RF signal to a DC signal. A comparator creates a feedback loop by generating the control signal responsive to comparing the DC signal to a reference voltage. The de-tuning circuit may operate in digital mode or in linear mode with the feedback. An impedance element may be coupled to the de-tuning circuit to generate a voltage proportional to a current through the de-tuning circuit. The proportional voltage is rectified to a receive signal with information sent from a transmitter.

Abstract: A method for driving a load by using an output stage amplifier in full bridge configuration whose supply is modulated by means of a fast switching power converter, controlled in order to maintain the stage's output common mode at its minimum voltage, is presented. The modulation of the switching power converter output is obtained by a feedback control system regulating directly the voltage of the bridge output stage terminals. This bridge unipolar class H stage allows driving the load with high accuracy and improved efficiency without introducing switching noise and EMI at the load terminals typical of PWM driving. This method can be applied with the same benefits to class AB, pseudo class AB or to class A output stages. When this method is associated with an imposed current driving approach and with a current oversampling digital to analog converter the resulting advantages are very significant for accurate motor control applications.

Abstract: An integrated circuit is disclosed that integrates a low current, high speed optical receiver with the primary side control functions of the power supply. This is further combined with an optical emitter to create a single component for feedback and control, providing improved performance and manufacturing. A method of providing feedback for the power supply using such an integrated optically coupled control circuit is also disclosed.

Abstract: A method for driving a load by using an output stage amplifier in full bridge configuration whose supply is modulated by means of a fast switching power converter, controlled in order to maintain the stage's output common mode at its minimum voltage, is presented. The modulation of the switching power converter output is obtained by a feedback control system regulating directly the voltage of the bridge output stage terminals. This bridge unipolar class H stage allows driving the load with high accuracy and improved efficiency without introducing switching noise and EMI at the load terminals typical of PWM driving. This method can be applied with the same benefits to class AB, pseudo class AB or to class A output stages. When this method is associated with an imposed current driving approach and with a current oversampling digital to analog converter the resulting advantages are very significant for accurate motor control applications.

Abstract: An integrated circuit is disclosed that integrates a low current, high speed optical receiver with the primary side control functions of the power supply. This is further combined with an optical emitter to create a single component for feedback and control, providing improved performance and manufacturing. A method of providing feedback for the power supply using such an integrated optically coupled control circuit is also disclosed.

Abstract: A method for driving a motor by using an output stage amplifier that operates between two or more separate supply voltages, depending on the amplitude of the input signal, is presented. This bridge unipolar class G stage allows driving the motor with high accuracy and improved efficiency without introducing switching noise typical of PWM motor driving. This method can be applied with the same benefits to class AB, pseudo class AB or to class A output stages. When this method is associated with an imposed current driving approach and with a current oversampling digital to analog converter the resulting advantages are very significant.

Abstract: A switching power supply is disclosed for improving the no-load power drain of low-power mains operated supplies. The power converter utilizes a cascoded switch arrangement with a conventional high voltage power MOSFET and a low voltage, low gate charge MOSFET. Driving only the small low voltage device reduces the power required for gate drive. The disclosed configuration is also capable of generating a non-isolated auxiliary rail for powering its control circuitry utilizing the parasitic capacitance of the high voltage power devices as an element in a charge pump. The resulting power supply requires significantly fewer components.

Abstract: A method for driving a motor by imposing the current in the motor by means of power current mirrors is presented. This allows driving the motor in current with higher accuracy and lower electrical noise. The Hard Disk Drive application is an example where higher resolution is required for the VCM motor. Furthermore this method reduces the complexity of the system eliminating components and high performance circuits. Moreover this approach reduces the development and manufacturing cost by simplifying the testability and the analysis of the system. The intrinsic elimination of DC offset also takes out the need for the system offset calibration phase and significantly improves on the harmonic distortion of the transfer function. Furthermore this method offers the advantage of faster overall response of the system and higher efficiency.

Abstract: A low cost, low EMI air core inductor fabricated on printed circuit board for power conversion circuits is described. The inductive element combines the advantages of high efficiency and minimum board height requirements. It allows high frequency switching without adding undesired magnetic losses and minimizing the electro-magnetic interferences in form of radiated energy. The absence of any magnetic layer adds to the simplicity of the manufacturing process resulting in lower cost. This inductive element allows operation for the conventional and higher frequency step-up and step-down switching voltage converters minimizing the size and cost of output capacitors and reducing the output voltage ripple.