Patents by Inventor Parthasarathy Ranganathan

Parthasarathy Ranganathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Server switch integration in a virtualized system
    Patent number: 8990801
    Abstract: A switch, a system and operational method for packet switching between virtual machines running in a server and a network. The server comprises a switch with swappable, virtual ports. The switch routes packets to and from the various virtual machines resident in the server memory.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: March 24, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jayaram Mudigonda, Parthasarathy Ranganathan
  • Method of using a buffer within an indexing accelerator during periods of inactivity
    Patent number: 8984230
    Abstract: A method of using a buffer within an indexing accelerator during periods of inactivity, comprising flushing indexing specific data located in the buffer, disabling a controller within the indexing accelerator, handing control of the buffer over to a higher level cache, and selecting one of a number of operation modes of the buffer. An indexing accelerator, comprising a controller and a buffer communicatively coupled to the controller, in which, during periods of inactivity, the controller is disabled and a buffer operating mode among a number of operating modes is chosen under which the buffer will be used.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: March 17, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Onur Kocberber, Kevin T. Lim, Parthasarathy Ranganathan
  • NETWORK MANAGEMENT
    Publication number: 20150074250
    Abstract: A system and method for network management are described herein. The system includes a number of servers and a first network coupling the servers to each other and configured to connect the servers to one or more client computing devices. The system also includes a second network coupling the servers to each other, wherein data transferred between the servers is transferred though the second network. Network management requests for configuring the second network are communicated to the servers through the first network.
    Type: Application
    Filed: April 25, 2012
    Publication date: March 12, 2015
    Inventors: Jichuan Chang, Parthasarathy Ranganathan
  • VERSIONED MEMORIES USING A MULTI-LEVEL CELL
    Publication number: 20150074456
    Abstract: Versioned memories using a multi-level cell (MLC) are disclosed. An example method includes comparing a global memory version to a block memory version, the global memory version corresponding to a plurality of memory blocks, the block memory version corresponding to one of the plurality of memory blocks. The example method includes determining, based on the comparison, which level in a multi-level cell of the one of the plurality of memory blocks stores checkpoint data.
    Type: Application
    Filed: March 2, 2012
    Publication date: March 12, 2015
    Inventors: Doe Hyun Yoon, Jichuan Chang, Naveen Muralimanohar, Robert Schreiber, Paolo Faraboschi, Parthasarathy Ranganathan
  • Data migration between memory locations
    Patent number: 8966204
    Abstract: Migrating data may include determining to copy a first data block in a first memory location to a second memory location and determining to copy a second data block in the first memory location to the second memory location based on a migration policy.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: February 24, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jichuan Chang, Justin James Meza, Parthasarathy Ranganathan
  • Distributed graph storage system
    Patent number: 8938599
    Abstract: In a method of implementing a graph storage system, the graph storage system is stored on a plurality of computing systems. A global address space is provided for distributed graph storage. The global address space is managed with graph allocators, in which a graph allocator allocates space from a block of the distributed global memory in order to store a plurality of graphs.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: January 20, 2015
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Michael Mihn-Jong Lee, Indrajit Roy, Vanish Talwar, Alvin AuYoung, Parthasarathy Ranganathan
  • Write-absorbing buffer for non-volatile memory
    Patent number: 8935484
    Abstract: A write-absorbing, volatile memory buffer for use with a processor module and a non-volatile memory is disclosed. The write-absorbing buffer operates as a dirty cache that can be used to look up both read and write requests, although allocating new blocks only for write requests and not read requests. The blocks are small sized, and a write-only least-recently used cache replacement policy is used to transfer data in the blocks to the non-volatile memory. The write-absorbing buffer can be used to store copy-on-write pages for at least one virtual machine associated with the processor module and reduce write overhead to the non-volatile memory.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: January 13, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jichuan Chang, Parthasarathy Ranganathan, David Roberts
  • Data storage apparatus and methods
    Patent number: 8924645
    Abstract: Data storage apparatus and methods are disclosed. A disclosed example data storage apparatus comprises a cache layer and a processor in communication with the cache layer. The processor is to dynamically enable or disable the cache layer via a cache layer enable line based on a data store access type.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: December 30, 2014
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Jichuan Chang, Parthasarathy Ranganathan, David Andrew Roberts, Mehul A. Shah, John Sontag
  • Network system management
    Patent number: 8909762
    Abstract: Systems, methods, and machine-readable and executable instructions are provided for network system management. Network system management can include receiving a network system size and a number of system parameters. Network system management can also include receiving a desired monitoring performance and a desired monitoring quality. Furthermore, network system management can include generating a monitoring system topology for a monitoring and analysis system based on the network system size, the number of system parameters, the desired monitoring performance, and the desired monitoring quality.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: December 9, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chengwei Wang, Vanish Talwar, Parthasarathy Ranganathan
  • Integrated circuit package
    Patent number: 8907462
    Abstract: An integrated circuit package includes a digital logic die disposed on a substrate; and an interposer die stacked vertically with the digital logic die on the substrate. The interposer die includes at least one vertical transistor configured to selectively provide electrical power to a portion of the digital logic die.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: December 9, 2014
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Matteo Monchiero, Jacob B. Leverich, Parthasarathy Ranganathan, Norman Paul Jouppi, Vanish Talwar
  • MULTI-LEVEL CACHE TRACKING TABLE
    Publication number: 20140351518
    Abstract: Disclosed herein are a computing system, integrated circuit, and method to enhance retrieval of cached data. A tracking table is used to initiate a search for data from a location specified in the table, if the data is not in a first level of a multi-level cache hierarchy.
    Type: Application
    Filed: May 24, 2013
    Publication date: November 27, 2014
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Jichuan Chang, Doe Hyun Yoon, Parthasarathy Ranganathan
  • LOCAL CHECKPOINTING USING A MULTI-LEVEL CELL
    Publication number: 20140351495
    Abstract: Local checkpointing using a multi-level call is described herein. An example method includes storing a first datum in a first level of a multi-level cell. A second datum is stored in a second level of the multi-level cell, the second datum representing a checkpoint of the first datum. The first datum is copied from the first level to the second level of the multi-level cell to create the checkpoint.
    Type: Application
    Filed: April 27, 2012
    Publication date: November 27, 2014
    Inventors: Doe Hyun Yoon, Robert Schreiber, Paolo Faraboschi, Jichuan Chang, Naveen Muralimanohar, Parthasarathy Ranganathan
  • Retention-value associated memory
    Patent number: 8892808
    Abstract: A memory component or subsystem is provided. The memory comprises one or more memory devices and one or more write controllers within each of the one or more memory devices that each controls memory-device components to write input data values into a plurality of memory cells within a memory device that represents a unit of stored data addressed by a logical-address-space address, the write controller applying a current to the plurality of memory cells during a WRITE operation with a magnitude that corresponds to a retention value associated with the logical-address-space address.
    Type: Grant
    Filed: April 23, 2011
    Date of Patent: November 18, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan
  • Switching to core executing OS like codes upon system call reading greater than predetermined amount of data
    Patent number: 8886917
    Abstract: A multi-core processor includes at least one first core and at least one second core. The first core is optimized to run applications, and the second core is optimized to meet the computing demands of operating-system-like code. The first core and the second core execute the same instruction set.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: November 11, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Nathan L. Binkert, Jeffrey C. Mogul, Jayaram Mudlgonda, Parthasarathy Ranganathan
  • Supplying a resource to an entity from a resource actuator
    Patent number: 8812166
    Abstract: In a method for supplying a resource to an entity from a resource actuator, a plurality of physics-based models pertaining to the resource actuator and the entity are developed, a condition detected at the entity is received, feedback control on a resource demand of the entity employed based upon the detected condition, feed forward control on the resource demand of the entity is employed based upon the detected condition and the plurality of physics-based models, a constraint optimization problem having an objective function and at least one constraint using the plurality of physics-based models is formulated, a solution to the constraint optimization problem is determined, in which the solution provides the actuator setting, and the resource actuator is set to the actuator setting to supply the entity with the resource from the resource actuator.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: August 19, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Zhikui Wang, Cullen E. Bash, Niraj Tolia, Manish Marwah, Parthasarathy Ranganathan, Shailesh N Joshi, Andrew James Phelan
  • MEMCACHED SERVER REPLICATION
    Publication number: 20140215260
    Abstract: According to an example, data for a memcached server is replicated to a memcached replication server. Data operations for the memcached server may be filtered for backing up data to the memcached replication server.
    Type: Application
    Filed: January 31, 2013
    Publication date: July 31, 2014
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin T. LIM, Sai Rahul Chalamalasetti, Mitchel E. Wright, Parthasarathy Ranganathan, Alvin AuYoung
  • Remote memory for virtual machines
    Patent number: 8793427
    Abstract: Remote memory can be used for a number idle pages located on a virtual machine. A number of idle pages can be sent to the remote memory according to a placement policy, where the placement policy can include a number of weighting factors. A hypervisor on a computing device can record a local size and a remote page fault frequency of the number of virtual machines. The hypervisor can scan local memory to determine the number of idle pages and a number of idle virtual machines. The number of idle pages, including a page map and a remote address destination for each idle page, can be sent to the remote memory by the hypervisor. The number of virtual machines can be analyzed to determine a per-virtual machine local memory allocation.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: July 29, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kevin T. Lim, Jichuan Chang, Jose Renato G. Santos, Yoshio Turner, Parthasarathy Ranganathan
  • Control system for resource selection between or among conjoined-cores
    Patent number: 8732368
    Abstract: A processing system is provided including sharing a resource in a processor system for processing signals, the processor system having first and second conjoined-cores, and selecting the conjoined-core having control over the resource based on arbitration between the first and second conjoined-cores.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: May 20, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Norman Paul Jouppi, Parthasarathy Ranganathan
  • Coordinated management in virtualized systems using management brokers and management channels
    Patent number: 8732308
    Abstract: A system for coordinating information between management entities includes management channels, management brokers and management agents. The management channels provide bidirectional communication between management entities. The management brokers implement coordination policies, and the management agents facilitate communication on the management channels.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: May 20, 2014
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Vanish Talwar, Jeff S. Autor, Sanjay Kumar, Parthasarathy Ranganathan
  • Management processors, methods and articles of manufacture
    Patent number: 8725904
    Abstract: Example management processors, methods and articles of manufacture are disclosed. A disclosed example management processor includes a network card interface to communicatively couple the management processor to an operating environment, and a request processor to forward a received external management request to the operating environment via the network card interface, and to combine response information received from the operating environment with response information generated at the management processor.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: May 13, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey R. Hilland, Dwight L. Barron, Vanish Talwar, Parthasarathy Ranganathan, Luis E. Luciani, Jr.