Patents by Inventor Patrick A. Van Cleemput
Patrick A. Van Cleemput has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11270896Abstract: Provided are methods and apparatus for ultraviolet (UV) assisted capillary condensation to form dielectric materials. In some embodiments, a UV driven reaction facilitates photo-polymerization of a liquid phase flowable material. Applications include high quality gap fill in high aspect ratio structures and pore sealing of a porous solid dielectric film. According to various embodiments, single station and multi-station chambers configured for capillary condensation and UV exposure are provided.Type: GrantFiled: July 11, 2019Date of Patent: March 8, 2022Assignee: Lam Research CorporationInventors: Jonathan D. Mohn, Nicholas Muga Ndiege, Patrick A. van Cleemput, David Fang Wei Chen, Wenbo Liang, Shawn M. Hamilton
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Publication number: 20220028864Abstract: A method for reducing bending of word lines in a memory cell includes a) providing a substrate including a plurality of word lines arranged adjacent to one another and above a plurality of transistors; b) depositing a layer of film on the plurality of word lines using a deposition process; c) after depositing the layer of film, measuring word line bending; d) comparing the word line bending to a predetermined range; e) based on the word line bending, adjusting at least one of nucleation delay and grain size of the deposition process; and f) repeating b) to e) one or more times using one or more substrates, respectively, until the word line bending is within the predetermined range.Type: ApplicationFiled: November 25, 2019Publication date: January 27, 2022Inventors: Gorun BUTAIL, Shruti THOMBARE, Ishtak KARIM, Patrick VAN CLEEMPUT
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Publication number: 20220013365Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication, The methods involve forming bulk conductive films on thin low resistivity transition metal layers that have large grain size. The bulk conductive films follow the grains of the low resistivity transition metal films, resulting in large grain size. Also provided are devices including template layers and bulk films.Type: ApplicationFiled: November 18, 2019Publication date: January 13, 2022Applicant: Lam Research CorporationInventors: Patrick A. van Cleemput, Shruti Vivek Thombare, Michal Danek
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Publication number: 20220005694Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, formation of spacers involves deposition of a tin oxide layer on a semiconductor substrate having multiple protruding features. The deposition is performed in a deposition apparatus having a controller with program instructions configured to cause sequential contacting of the semiconductor substrate with a tin-containing precursor and an oxygen-containing precursor such as to coat the semiconductor substrate having the protruding features with a tin oxide layer. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the semiconductor substrate.Type: ApplicationFiled: September 21, 2021Publication date: January 6, 2022Inventors: David Charles Smith, Richard Wise, Arpan Pravin Mahorowala, Patrick A. van Cleemput, Bart J. van Schravendijk
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Patent number: 11183383Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.Type: GrantFiled: March 20, 2020Date of Patent: November 23, 2021Assignee: Lam Research CorporationInventors: David Charles Smith, Richard Wise, Arpan Mahorowala, Patrick van Cleemput, Bart J. van Schravendijk
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Publication number: 20210343579Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an H2-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% H2. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.Type: ApplicationFiled: June 24, 2021Publication date: November 4, 2021Inventors: Patrick A. van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
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Patent number: 11088019Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an H2-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% H2. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.Type: GrantFiled: February 9, 2018Date of Patent: August 10, 2021Assignee: Lam Research CorporationInventors: Patrick A. Van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
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Publication number: 20210242019Abstract: Thin tin oxide films can be used in semiconductor device manufacturing. In one implementation, a method of processing a semiconductor substrate includes: providing a semiconductor substrate having a plurality of protruding features residing on an etch stop layer material, and an exposed tin oxide layer in contact with both the protruding features and the etch stop layer material, where the tin oxide layer covers both sidewalls and horizontal surfaces of the protruding features; and then completely removing the tin oxide layer from horizontal surfaces of the semiconductor substrate without completely removing the tin oxide layer residing at the sidewalls of the protruding features. Next, the protruding features can be removed without completely removing the tin oxide layer that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers.Type: ApplicationFiled: April 22, 2021Publication date: August 5, 2021Inventors: David Charles Smith, Richard Wise, Arpan Pravin Mahorowala, Patrick A. van Cleemput, Bart J. van Schravendijk
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Publication number: 20210242032Abstract: Various embodiments herein relate to methods, apparatus, and systems for etching a feature in a substrate. Typically the feature is etched in a dielectric-containing stack. The etching process involves cyclically etching the feature and depositing a protective film on sidewalls of the partially etched feature. These stages are repeated until the feature reaches its final depth. The protective film may have a particular composition, for example including at least one of a tungsten carbonitride, a tungsten sulfide, tin, a tin-containing compound, molybdenum, a molybdenum-containing compound, a ruthenium carbonitride, a ruthenium sulfide, an aluminum carbonitride, an aluminum sulfide, zirconium, and a zirconium-containing compound. A number of optional steps may be taken including, for example, doping the mask layer, pre-treating the substrate prior to deposition, removing the protective film from the sidewalls, and oxidizing any remaining protective film.Type: ApplicationFiled: August 19, 2019Publication date: August 5, 2021Inventors: Karthik S. COLINJIVADI, Samantha SiamHwa TAN, Shih-Ked LEE, George MATAMIS, Yongsik YU, Yang PAN, Patrick VAN CLEEMPUT, Akhil SINGHAL, Juwen GAO, Raashina HUMAYUN
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Patent number: 11031245Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.Type: GrantFiled: September 22, 2017Date of Patent: June 8, 2021Assignee: Lan Research CorporationInventors: David Charles Smith, Richard Wise, Arpan Mahorowala, Patrick A. Van Cleemput, Bart J. van Schravendijk
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Publication number: 20210140043Abstract: Provided herein are methods and apparatus for deposition of pure metal films. The methods involve the use of oxygen-containing precursors. The metals include molybdenum (Mo) and tungsten (W). To deposit pure films with no more than one atomic percentage oxygen, the reducing agent to metal precursor ratio is significantly greater than 1. Molar ratios of 100:1 to 10000:1 may be used in some embodiments.Type: ApplicationFiled: July 25, 2019Publication date: May 13, 2021Inventors: Shruti Vivek Thombare, Gorun Butail, Patrick A. van Cleemput, Ilanit Fisher
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Patent number: 10957514Abstract: Provided are apparatuses and methods for performing deposition and etch processes in an integrated tool. An apparatus may include a plasma processing chamber that is a capacitively-coupled plasma reactor, and the plasma processing chamber can include a showerhead that includes a top electrode and a pedestal that includes a bottom electrode. The apparatus may be configured with an RF hardware configuration so that an RF generator may power the top electrode in a deposition mode and power the bottom electrode in an etch mode. In some implementations, the apparatus can include one or more switches so that at least an HFRF generator is electrically connected to the showerhead in a deposition mode, and the HFRF generator and an LFRF generator is electrically connected to the pedestal and the showerhead is grounded in the etch mode.Type: GrantFiled: June 26, 2019Date of Patent: March 23, 2021Assignee: Lam Research CorporationInventors: Akhil Singhal, Patrick A. van Cleemput, Martin E. Freeborn, Bart J. van Schravendijk
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Publication number: 20200407842Abstract: A method includes arranging a substrate in a processing chamber, and exposing the substrate to a gas mixture including a first metal precursor gas and a second metal precursor gas to deposit a first metal precursor and a second metal precursor onto the substrate at the same time. The method further includes purging the processing chamber, supplying a reactant common to both the first metal precursor and the second metal precursor to form a layer of an alloy on the substrate, and purging the processing chamber.Type: ApplicationFiled: December 6, 2018Publication date: December 31, 2020Inventors: Ilanit FISHER, Raashina HUMAYUN, Michal DANEK, Patrick VAN CLEEMPUT, Shruti THOMBARE
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Publication number: 20200402846Abstract: Provided herein are methods and apparatuses for forming metal films such as tungsten (W) and molybdenum (Mo) films on semiconductor substrates. The methods involve forming a reducing agent layer, then exposing the reducing agent layer to a metal precursor to convert the reducing agent layer to a layer of the metal. In some embodiments, the reducing agent layer is a silicon- (Si-) and boron- (B-) containing layer. The methods may involve forming the reducing agent layer at a first substrate temperature, raising the substrate temperature to a second substrate temperature, and then exposing the reducing agent layer to the metal precursor at the second substrate temperature. The methods may be used to form fluorine-free tungsten or molybdenum films in certain embodiments. Apparatuses to perform the methods are also provided.Type: ApplicationFiled: November 19, 2018Publication date: December 24, 2020Applicant: Lam Research CorporationInventors: Joshua Collins, Griffin John Kennedy, Hanna Bamnolker, Michal Danek, Shruti Vivek Thombare, Patrick van Cleemput, Gorun Butail
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Publication number: 20200365456Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.Type: ApplicationFiled: July 27, 2020Publication date: November 19, 2020Inventors: Shruti Vivek Thombare, Raashina Humayun, Michal Danek, Chiukin Steven Lai, Joshua Collins, Hanna Bamnolker, Griffin John Kennedy, Gorun Butail, Patrick van Cleemput
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Patent number: 10777386Abstract: Methods for controlling glow discharge in a plasma chamber are disclosed. One method includes connecting a radio frequency (RF) generator to a top electrode of a chamber, the chamber having chamber walls coupled to ground and connecting the RF generator to a bottom electrode of the chamber. Identifying a process operation of deposition to be performed in the chamber and setting an RF signal from the RF generator to be supplied to the top electrode at a first phase. And, setting the RF signal from the RF generator to be supplied to the bottom electrode at a second phase. The first phase and the second phase being adjustable to a phase difference to cause the plasma glow discharge to be controllably positioned within the chamber based on the phase difference.Type: GrantFiled: October 17, 2017Date of Patent: September 15, 2020Assignee: Lam Research CorporationInventors: Aaron Bingham, Patrick Van Cleemput
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Patent number: 10777453Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.Type: GrantFiled: November 6, 2019Date of Patent: September 15, 2020Assignee: Lam Research CorporationInventors: Shruti Vivek Thombare, Raashina Humayun, Michal Danek, Chiukin Steven Lai, Joshua Collins, Hanna Bamnolker, Griffin John Kennedy, Gorun Butail, Patrick A. van Cleemput
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Publication number: 20200219725Abstract: Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride.Type: ApplicationFiled: March 20, 2020Publication date: July 9, 2020Applicant: Lam Research CorporationInventors: David Charles Smith, Richard Wise, Arpan Mahorowala, Patrick van Cleemput, Bart J. van Schravendijk
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Publication number: 20200219758Abstract: Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.Type: ApplicationFiled: March 20, 2020Publication date: July 9, 2020Applicant: Lam Research CorporationInventors: Patrick van Cleemput, Seshasayee Varadarajan, Bart J. van Schravendijk
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Publication number: 20200199751Abstract: An Atomic Layer Deposition (ALD) configured to deposit a metal oxide layer onto an organic photoresist on a substrate using a highly reactive organic metal precursor. By using a highly reactive metal precursor, the rate of growth of the metal oxide layer is very fast, creating a “seal” that effectively protects the organic photoresist from loss and degradation from subsequent exposure to oxygen species during subsequent ALD cycles. The ability to deposit metal oxide layers means metal oxide spacers can be used in multi-patterning, resulting in highly uniform, dense lines, and the elimination of photolithography-etch steps.Type: ApplicationFiled: February 28, 2020Publication date: June 25, 2020Inventors: Akhil SINGHAL, Patrick VAN CLEEMPUT