Patents by Inventor Patrick Roberts

Patrick Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Iterative Read Calibration Enhanced according to Patterns of Shifts in Read Voltages
    Publication number: 20220044739
    Abstract: A memory sub-system configured to use first values of a plurality of optimized read voltages to perform a first read calibration, which determines second values of the plurality of optimized read voltages. A plurality of shifts, from the first values to the second values respectively, can be computed for the plurality of optimized read voltages respectively. After recognizing a pattern in the plurality of shifts that are computed for the plurality of voltages respectively, the memory sub-system can control and/or initiate a second read calibration based on the recognized pattern in the shifts.
    Type: Application
    Filed: September 24, 2021
    Publication date: February 10, 2022
    Inventors: James Fitzpatrick, Sivagnanam Parthasarathy, Patrick Robert Khayat, AbdelHakim S. Alhussien
  • Search for an Optimized Read Voltage
    Publication number: 20220044735
    Abstract: A memory device to search for a voltage optimized to read a group of memory cells. In response to a read command, the memory device measures first signal and noise characteristics of the memory cells by reading the memory cells at first test voltages. Based on the first signal and noise characteristics, the memory device may determine that the optimized read voltage is outside of a range of the first test voltages. In response, the memory device determines, based on the first signal and noise characteristics, an estimate of the optimized read voltage, and measures second signal and noise characteristics by reading at second test voltages configured around the estimate. The optimized read voltage can be computed based at least in part on the second signal and noise characteristics. The memory device retrieves data from the memory cells using the optimized read voltage.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Patrick Robert Khayat, James Fitzpatrick, AbdelHakim S. Alhussien, Sivagnanam Parthasarathy
  • Determine Optimized Read Voltage via Identification of Distribution Shape of Signal and Noise Characteristics
    Publication number: 20220044736
    Abstract: A memory device to determine a voltage optimized to read a group of memory cells. In response to a command, the memory device reads the group of memory cells at a plurality of test voltages to determine a set of signal and noise characteristics of the group of memory cells. The memory device determines or recognizes a shape of a distribution of the signal and noise characteristics over the plurality of test voltages. Based on the shape, the memory device selects an operation in determining an optimized read voltage of the group of memory cells.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: AbdelHakim S. Alhussien, James Fitzpatrick, Patrick Robert Khayat, Sivagnanam Parthasarathy
  • Track Charge Loss based on Signal and Noise Characteristics of Memory Cells Collected in Calibration Operations
    Publication number: 20220044751
    Abstract: A memory sub-system to track charge loss in memory cells and shifts of voltages optimized to read the memory cells. For example, a memory device can measure signal and noise characteristics of a group of memory cells to calculate an optimized read voltage of the group of memory cells. The memory sub-system having the memory device can determine an amount of charge loss in the group of memory cells, using at least the signal and noise characteristics, the optimized read voltage, and/or the bit error rate of data read using the optimized read voltage. The memory sub-system tracks changes in optimized read voltages of memory cells in the memory device based on the amount of charge loss.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Sivagnanam Parthasarathy, James Fitzpatrick, Patrick Robert Khayat, AbdelHakim S. Alhussien
  • Read Model of Memory Cells using Information Generated during Read Operations
    Publication number: 20220044756
    Abstract: A memory sub-system configured to generate or update a model for reading memory cells in a memory device. For example, in response to a processing device of a memory sub-system transmitting to a memory device read commands that are configured to instruct the memory device to retrieve data from a group of memory cells formed on an integrated circuit die in the memory device, the memory device may measure signal and noise characteristics of the group of memory cells during execution of the read commands. Based on the signal and noise characteristics the memory sub-system can generate or update, measured during the execution of the read commands a model of changes relevant to reading data from the group of memory cells. The changes can be a result of damage, charge loss, read disturb, cross-temperature effect, etc.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 10, 2022
    Inventors: James Fitzpatrick, Sivagnanam Parthasarathy, Patrick Robert Khayat, AbdelHakim S. Alhussien
  • Coarse Calibration based on Signal and Noise Characteristics of Memory Cells Collected in Prior Calibration Operations
    Publication number: 20220044737
    Abstract: A memory device to perform a calibration of read voltages of a group of memory cells. For example, the memory device can measure signal and noise characteristics of a group of memory cells to determine an optimized read voltage of the group of memory cells and determine an amount of accumulated storage charge loss in the group of memory cells. Subsequently, the memory device can perform a read voltage calibration based on the determined amount of accumulated storage charge loss and a look up table.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 10, 2022
    Inventors: Patrick Robert Khayat, James Fitzpatrick, AbdelHakim S. Alhussien, Sivagnanam Parthasarathy
  • Search for an optimized read voltage
    Patent number: 11244729
    Abstract: A memory device to search for a voltage optimized to read a group of memory cells. In response to a read command, the memory device measures first signal and noise characteristics of the memory cells by reading the memory cells at first test voltages. Based on the first signal and noise characteristics, the memory device may determine that the optimized read voltage is outside of a range of the first test voltages. In response, the memory device determines, based on the first signal and noise characteristics, an estimate of the optimized read voltage, and measures second signal and noise characteristics by reading at second test voltages configured around the estimate. The optimized read voltage can be computed based at least in part on the second signal and noise characteristics. The memory device retrieves data from the memory cells using the optimized read voltage.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: February 8, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Patrick Robert Khayat, James Fitzpatrick, AbdelHakim S. Alhussien, Sivagnanam Parthasarathy
  • Determine bit error count based on signal and noise characteristics centered at an optimized read voltage
    Patent number: 11238953
    Abstract: A memory device to estimate a bit error count of data retrievable from a group of memory cells. For example, the memory device has a group of memory cells programmed to store a predetermined number of bits per memory cells to be read at a plurality of first voltages. The memory device determines a plurality of calibrated read voltages corresponding to the plurality of first voltages respectively, based on first signal and noise characteristics of the group of memory cells. The first signal and noise characteristics are used to compute second signal and noise characteristics of the group of memory cells for the calibrated read voltages. The second signal and noise characteristics are used in an empirical formula to compute an estimate of the bit error count of data retrievable from the group of memory cells using the calibrated read voltages.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: February 1, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Patrick Robert Khayat, Sivagnanam Parthasarathy, James Fitzpatrick
  • Memory system performance enhancements using measured signal and noise characteristics of memory cells
    Patent number: 11237726
    Abstract: A memory sub-system configured to improve performance using signal and noise characteristics of memory cells measured during the execution of a command in a memory component. For example, the memory component is enclosed in an integrated circuit and has a calibration circuit. The signal and noise characteristics are measured by the calibration circuit as a byproduct of executing the command in the memory component. A processing device separate from the memory component transmits the command to the memory component, and receives and processes the signal and noise characteristics to identify an attribute about the memory component. Subsequently, an operation related to data stored in the memory component can be performed based on the attribute.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: February 1, 2022
    Assignee: Micron Technology, Inc.
    Inventors: James Fitzpatrick, Sivagnanam Parthasarathy, Patrick Robert Khayat, AbdelHakim S. Alhussien, Violante Moschiano
  • Track charge loss based on signal and noise characteristics of memory cells collected in calibration operations
    Patent number: 11227666
    Abstract: A memory sub-system to track charge loss in memory cells and shifts of voltages optimized to read the memory cells. For example, a memory device can measure signal and noise characteristics of a group of memory cells to calculate an optimized read voltage of the group of memory cells. The memory sub-system having the memory device can determine an amount of charge loss in the group of memory cells, using at least the signal and noise characteristics, the optimized read voltage, and/or the bit error rate of data read using the optimized read voltage. The memory sub-system tracks changes in optimized read voltages of memory cells in the memory device based on the amount of charge loss.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: January 18, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Sivagnanam Parthasarathy, James Fitzpatrick, Patrick Robert Khayat, AbdelHakim S. Alhussien
  • DETERMINE SIGNAL AND NOISE CHARACTERISTICS CENTERED AT AN OPTIMIZED READ VOLTAGE
    Publication number: 20220013186
    Abstract: A memory device to estimate signal and noise characteristics of a group of memory cells in response to a command identifying the group of memory cells. For example, the memory device measures first signal and noise characteristics of the group of memory cells based on first test voltages, compute using the first signal and noise characteristics an optimized read voltage of the group of memory cells, and estimate, using the first signal and noise characteristics, second signal and noise characteristics of the group of memory cells, where the second signal and noise characteristics are based on second test voltages that are centered at the optimized read voltage of the group of memory cells.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Inventors: Patrick Robert Khayat, Sivagnanam Parthasarathy, James Fitzpatrick
  • Adaptive and/or iterative operations in executing a read command to retrieve data from memory cells
    Patent number: 11221800
    Abstract: A memory sub-system configured to adaptively and/or iteratively determine sub-operations of executing a read command to retrieve data from memory cells. For example, after receiving the read command from a processing device of a memory sub-system, a memory device starts an atomic operation of executing the read command in the memory device. The memory device can have one or more groups of memory cells formed on an integrated circuit die and a calibration circuit configured to measure signal and noise characteristics of memory cells in the memory device. During the atomic operation, the calibration circuit generates outputs, based on which a read manager of the memory sub-system identifies sub-operations to be performed in the atomic operation and/or decides to end the atomic operation.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: January 11, 2022
    Assignee: Micron Technology, Inc.
    Inventors: James Fitzpatrick, Sivagnanam Parthasarathy, Patrick Robert Khayat, AbdelHakim S. Alhussien
  • Preloadable connectors for tubing
    Patent number: 11215014
    Abstract: Connectors and connection systems for connecting two tubing sections together are provided. The connectors can include: a first end having an outer surface and adapted for insertion into an end of the tubing section and a second end adapted for connection to a second connector. The connector can have an attachment block in one aspect with a first threaded aperture and a second threaded aperture passing through it so that axial screws and radial screws can secure the connector to the end of a tubing section before it is connected to another connector. In another aspect, the connector can have an attachment slot provided in an outer surface of the first end of the connector sized to fit a retaining clips so that axial screws can secure the connector to an end of a tubing section before the connector is connected to another connector.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: January 4, 2022
    Assignee: EVOLUTION ENGINEERING INC.
    Inventors: Patrick Robert Derkacz, Justin Christopher Logan, Luke Anthony Stack, Gavin Gaw-Wae Lee, Aaron William Logan
  • Read disturb mitigation based on signal and noise characteristics of memory cells collected for read calibration
    Patent number: 11205495
    Abstract: A memory device to perform a read disturb mitigation operation. For example, the memory device can measure signal and noise characteristics of a group of memory cells to determine an optimized read voltage of the group of memory cells and determine a margin of read disturb accumulated in the group of memory cells. Subsequently, the memory device can identify the group of memory cells for the read disturb mitigation operation based on the margin of read disturb and a predetermined threshold.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: December 21, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Patrick Robert Khayat, James Fitzpatrick, AbdelHakim S. Alhussien, Sivagnanam Parthasarathy
  • Optimization of soft bit windows based on signal and noise characteristics of memory cells
    Patent number: 11200959
    Abstract: A memory device to determine a voltage window to read soft bit data. For example, in response to a read command, the memory device can read a group of memory cells at a plurality of test voltages to determine signal and noise characteristics, which can be used to determine an optimized read voltage for reading hard bit data and a voltage window between a first voltage and a second voltage for reading soft bit data. The soft bit data identifies exclusive or (XOR) of results read from the group of memory cells at the first voltage and at the second voltage respective. The memory device can provide a response to the read command based on the hard bit data and the soft bit data.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: December 14, 2021
    Assignee: Micron Technology, Inc.
    Inventors: James Fitzpatrick, Sivagnanam Parthasarathy, Patrick Robert Khayat, AbdelHakim S. Alhussien
  • PROTECTION OF A MONOSTATIC OR QUASI-MONOSTATIC LASER RANGEFINDER
    Publication number: 20210364602
    Abstract: An optical module (10) is attached in front of an optical outlet (21) of a monostatic or quasi-monostatic laser rangefinder (20), for the purpose of transversely offsetting a laser beam of primary radiation (F) emitted by the optical outlet. In this manner, the risk of damage to an optical sensor (23) of the rangefinder can be avoided.
    Type: Application
    Filed: November 16, 2018
    Publication date: November 25, 2021
    Inventors: Patrick ROBERT, Vincent MARIE
  • NOVEL IMIDAZO[4,5-C]QUINOLINE DERIVATIVES AS LRRK2 INHIBITORS
    Publication number: 20210355117
    Abstract: The present invention provides novel imidazo[4,5-c]quinoline derivatives of Formula (I), and the pharmaceutically acceptable salts thereof I wherein R1, R2 and R3 are as defined in the specification. The invention is also directed to pharmaceutical compositions comprising the compounds of Formula I and to use of the compounds in the treatment of diseases associated with LRRK2, such as neurodegenerative diseases including Parkinson's disease or Alzheimer's disease, cancer, Crohn's disease or leprosy.
    Type: Application
    Filed: March 6, 2018
    Publication date: November 18, 2021
    Inventors: Michael Aaron BRODNEY, Thomas Allen CHAPPIE, Jinshan Michael CHEN, Jotham Wadsworth COE, Karen Jean COFFMAN, Paul GALATSIS, Michelle Renee GARNSEY, Christopher John HELAL, Jaclyn Louise Henderson, Bethany Lyn KORMOS, Ravi G. KURUMBAIL, Luis Angel MARTINEZ-ALSINA, Martin Youngjin PETTERSSON, Matthew Richard REESE, Colin Richard ROSE, Antonia Friederike STEPAN, Patrick Robert VERHOEST, Travis T. WAGER, Joseph Scott WARMUS, Yuan ZHANG
  • Determine signal and noise characteristics centered at an optimized read voltage
    Patent number: 11177013
    Abstract: A memory device to estimate signal and noise characteristics of a group of memory cells in response to a command identifying the group of memory cells. For example, the memory device measures first signal and noise characteristics of the group of memory cells based on first test voltages, compute using the first signal and noise characteristics an optimized read voltage of the group of memory cells, and estimate, using the first signal and noise characteristics, second signal and noise characteristics of the group of memory cells, where the second signal and noise characteristics are based on second test voltages that are centered at the optimized read voltage of the group of memory cells.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: November 16, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Patrick Robert Khayat, Sivagnanam Parthasarathy, James Fitzpatrick
  • Detection of an Incorrectly Located Read Voltage
    Publication number: 20210350868
    Abstract: A memory device to program a group of memory cells to store multiple bits per memory cell. Each bit per memory cell in the group from a page. After determining a plurality of read voltages of the group of memory cells, the memory device can read the multiple pages of the group using the plurality of read voltages. For each respective page in the multiple pages, the memory device can determine a count of first memory cells in the respective page that have threshold voltages higher than a highest read voltage, among the plurality of read voltages, used to read the respective page. The count of the first memory cells can be compared with a predetermined range of a fraction of memory cells in the respective page to evaluate the plurality of read voltages (e.g., whether any of the read voltages is in a wrong voltage range).
    Type: Application
    Filed: May 6, 2021
    Publication date: November 11, 2021
    Inventors: Sivagnanam Parthasarathy, James Fitzpatrick, Patrick Robert Khayat, AbdelHakim S. Alhussien
  • IMPROVED READING OF SOFT BITS AND HARD BITS FROM MEMORY CELLS
    Publication number: 20210350856
    Abstract: A memory sub-system configured to execute a read command of a first type using a combine process to read soft bit data and hard bit data from memory cells. For example, a memory device is to: measure signal and noise characteristics of memory cells for the read command; calculate, based on the characteristics, an optimized voltage and two adjacent voltages that have offsets of a same amount from the optimized voltage; read the memory cells for hard bit data using the optimized voltage and for soft bit data using the two adjacent voltages; and transmit, to the processing device, a response including the hard bit data. The soft bit data can be selectively transmitted based on a classification determined from the characteristics. When a read command of a second type is executed, soft bit data is not read; and/or the signal and noise characteristics are not measured.
    Type: Application
    Filed: May 7, 2020
    Publication date: November 11, 2021
    Inventors: James Fitzpatrick, Sivagnanam Parthasarathy, Patrick Robert Khayat, AbdelHakim S. Alhussien