Patents by Inventor Paul Chow

Paul Chow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11150658
    Abstract: Systems and methods for operating a HAUCS sensing platform. The methods comprise: autonomous travel by a UAAV to a first location in proximity to a body of water (“BoW”) in accordance with a mission plan; actuating a mechanical device to transition a sensor from a retracted position in which the sensor is adjacent to a UAAV to an extended position in which the sensor resides a given distance from a UAAV; collect, by HAUCS sensing platform and sensor, sensor data concerning a water condition of BoW at different depths; actuating the mechanical device to transition the sensor from the extended position to the retracted position after the sensor data has been collected; causing the sensor data to be processed using a machine learning-based analytical engine to determine whether a water distress condition exists/is predicted to occur; and modifying the mission plan when the water distress condition exists/is predicted to occur.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: October 19, 2021
    Assignee: Florida Atlantic University Board of Trustees
    Inventors: Bing Ouyang, Paul Wills, Jason Hallstrom, Tsung-Chow Su, Martin Riche, Peter Reiff, Yufei Tang
  • Patent number: 10685630
    Abstract: According to various aspects, just-in-time system bandwidth changes may be implemented in hardware to optimize power consumption and performance in an electronic device. More particularly, in a periodic system associated with an electronic device, a bandwidth for a next frame may be configured during a current frame via software operating on the electronic device. Hardware associated with the periodic system may issue a bandwidth change request for the next frame when a current time reaches a bandwidth increase threshold in response to actual processing time associated with the current frame finishing prior to the bandwidth increase threshold, which may be defined relative to a timer deadline that defines when the next frame starts to process.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: June 16, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Carlos Javier Moreira, Paul Chow, Dhaval Kanubhai Patel
  • Publication number: 20190378478
    Abstract: According to various aspects, just-in-time system bandwidth changes may be implemented in hardware to optimize power consumption and performance in an electronic device. More particularly, in a periodic system associated with an electronic device, a bandwidth for a next frame may be configured during a current frame via software operating on the electronic device. Hardware associated with the periodic system may issue a bandwidth change request for the next frame when a current time reaches a bandwidth increase threshold in response to actual processing time associated with the current frame finishing prior to the bandwidth increase threshold, which may be defined relative to a timer deadline that defines when the next frame starts to process.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventors: Carlos Javier MOREIRA, Paul CHOW, Dhaval Kanubhai PATEL
  • Patent number: 10445902
    Abstract: Techniques are described in which a device is configured to retrieve a metadata buffer for rendering a sub-frame of a set of sub-frames for a frame. A data block of a data buffer is configured to store image data for rendering the sub-frame. In response to determining, based on the metadata buffer for rendering the sub-frame, that the sub-frame includes a color pattern, fixed color value, or combination thereof, the device refrains from retrieving the image data from the data block of the data buffer and determines the image data for rendering the sub-frame based on the metadata buffer.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: October 15, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Andrew Evan Gruber, Serag GadelRab, Zhenbiao Ma, Meghal Varia, Tao Wang, Tom Longo, Mark Sternberg, Paul Chow
  • Publication number: 20180165789
    Abstract: Techniques are described in which a device is configured to retrieve a metadata buffer for rendering a sub-frame of a set of sub-frames for a frame. A data block of a data buffer is configured to store image data for rendering the sub-frame. In response to determining, based on the metadata buffer for rendering the sub-frame, that the sub-frame includes a color pattern, fixed color value, or combination thereof, the device refrains from retrieving the image data from the data block of the data buffer and determines the image data for rendering the sub-frame based on the metadata buffer.
    Type: Application
    Filed: December 13, 2016
    Publication date: June 14, 2018
    Inventors: Andrew Evan Gruber, Serag GadelRab, Zhenbiao Ma, Meghal Varia, Tao Wang, Tom Longo, Mark Sternberg, Paul Chow
  • Patent number: 9864647
    Abstract: A method and system for adjusting bandwidth within a portable computing device based on danger signals monitored from one on more elements of the portable computing device are disclosed. A danger level of an unacceptable deadline miss (“UDM”) element of the portable computing device may be determined with a danger level sensor within the UDM element. Next, a quality of service (“QoS”) controller may adjust a magnitude for one or more danger levels received based on the UDM element type that generated the danger level and based on a potential fault condition type associated with the particular danger level. The danger levels received from one UDM element may be mapped to at least one of another UDM element and a non-UDM element. A quality of service policy for each UDM element and non-UDM element may be mapped in accordance with the danger levels.
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: January 9, 2018
    Assignee: QUALCOM Incorporated
    Inventors: Serag Gadelrab, Cristian Duroiu, Vinod Chamarty, Pooja Sinha, John Daniel Chaparro, Anil Vootukuru, Vinodh Ramesh Cuppu, Joseph Schweiray Lee, Vinay Mitter, Paul Chow, Ruolong Liu, Johnny Jone Wai Kuan
  • Publication number: 20160127259
    Abstract: A method and system for managing safe downtime of shared resources within a portable computing device are described. The method may include determining a tolerance for a downtime period for an unacceptable deadline miss element of the portable computing device. Next, the determined tolerance for the downtime period may be transmitted to quality-of-service (“QoS”) controller. The QoS controller may determine if the tolerance for the downtime period needs to be adjusted. The QoS controller may receive a downtime request from one or more shared resources of the portable computing device. The QoS controller may determine if the downtime request needs to be adjusted. Next, the QoS controller may select a downtime request for execution and then identify which one or more unacceptable deadline miss elements of the portable computing device that are impacted by the selected downtime request.
    Type: Application
    Filed: January 2, 2015
    Publication date: May 5, 2016
    Inventors: CRISTIAN DUROIU, VINOD CHAMARTY, SERAG GADELRAB, MICHAEL DROP, POOJA SINHA, RUOLONG LIU, JOHN DANIEL CHAPARRO, VINODH RAMESH CUPPU, JOSEPH SCHWEIRAY LEE, JOHNNY JONE WAI KUAN, PAUL CHOW, ANIL VOOTUKURU, VINAY MITTER
  • Publication number: 20160117215
    Abstract: A method and system for adjusting bandwidth within a portable computing device based on danger signals monitored from one on more elements of the portable computing device are disclosed. A danger level of an unacceptable deadline miss (“UDM”) element of the portable computing device may be determined with a danger level sensor within the UDM element. Next, a quality of service (“QoS”) controller may adjust a magnitude for one or more danger levels received based on the UDM element type that generated the danger level and based on a potential fault condition type associated with the particular danger level. The danger levels received from one UDM element may be mapped to at least one of another UDM element and a non-UDM element. A quality of service policy for each UDM element and non-UDM element may be mapped in accordance with the danger levels.
    Type: Application
    Filed: January 2, 2015
    Publication date: April 28, 2016
    Inventors: SERAG GADELRAB, CRISTIAN DUROIU, VINOD CHAMARTY, POOJA SINHA, JOHN DANIEL CHAPARRO, ANIL VOOTUKURU, VINODH RAMESH CUPPU, JOSEPH SCHWEIRAY LEE, VINAY MITTER, PAUL CHOW, RUOLONG LIU, JOHNNY JONE WAI KUAN
  • Patent number: 8694570
    Abstract: A device and method for evaluating multidimensional discrete Fourier transforms (DFT) by eliminating transpose operations by transforming every dimension concurrently. At least one computing node is enabled to evaluate a DFT of one of a multidimensional input data set and a subgroup of the input data set, wherein the subgroup comprises groupings of elements taken from a plurality of selected dimensions of the input data set for subsequent multidimensional DFT operations.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: April 8, 2014
    Inventors: Arun Mohanlal Patel, Paul Chow
  • Publication number: 20130159452
    Abstract: A memory server system is provided herein. It includes a first plurality of Field Programmable Gate Arrays (FPGA) application server nodes that are configured to parse the location of the FPGA data server nodes; a second plurality of FPGA data server nodes that are configured as memory controllers, each of the second plurality of FPGA data server nodes being connected to a plurality of RAM memory banks; and a network connection between the first plurality of FPGAs and the second plurality of FPGA processing nodes.
    Type: Application
    Filed: December 3, 2012
    Publication date: June 20, 2013
    Inventors: Manuel Alejandro Saldana De Fuentes, Paul Chow
  • Patent number: 8350293
    Abstract: A p-type nitride compound semiconductor layer is formed on a buffer formed on a substrate. An n-type contact region is formed by ion implantation under a source electrode and a drain electrode. An electric-field reducing layer made of an n-type nitride compound semiconductor is formed on the p-type nitride compound semiconductor layer. A carrier density of the electric-field reducing layer is lower than that of the n-type contact region. A first end portion of the electric-field reducing layer contacts with the n-type contact region, and a second end portion of the electric-field reducing layer overlaps with a gate electrode.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: January 8, 2013
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Tat-Sing Paul Chow, Takehiko Nomura, Yuki Niiyama, Hiroshi Kambayashi, Seikoh Yoshida
  • Patent number: 8204106
    Abstract: The subject matter disclosed herein provides methods and apparatus, including computer program products, for providing intermediate compression or decompression for use with a video decoder and a memory. In one aspect, there is provided a method including receiving information to enable compression of a macroblock. At an intermediate section coupled to a video decoder and a memory, a macroblock may be compressed. The compression of the macroblock may be based on the received information. The compressed macroblock may be provided to memory. Related apparatus, systems, methods, and articles are also described.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: June 19, 2012
    Assignees: ATI Technologies, ULC, Advanced Micro Devices, Inc.
    Inventors: Greg Sadowski, Thomas E. Ryan, Daniel Wong, Paul Chow
  • Patent number: 8188514
    Abstract: An HEMT type transistor is disclosed that is a normally off type, and in which variations in the gate threshold voltage are small. A transistor is provided with a p-type region, a barrier region, an insulation film, a gate electrode. The channel region is connected to an upper surface of the p-type region. The channel region is n-type or i-type and provided with a first channel region and a second channel region. The barrier region is forming a hetero-junction with an upper surface of the first channel region. The insulation film is connected to an upper surface of the second channel region and an upper surface of the barrier region. The gate electrode faces the second channel region and the barrier region via the insulation film. The first channel region and the second channel region are arranged in series in a current pathway.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: May 29, 2012
    Assignees: Rensselaer Polytechnic Institute, Toyota Jidosha Kabushiki Kaisha
    Inventors: Masahiro Sugimoto, Tat-Sing Paul Chow, Zhongda Li, Tetsu Kachi, Tsutomu Uesugi
  • Patent number: 8159024
    Abstract: In one aspect, a lateral MOS device is provided. The lateral MOS device includes a gate electrode disposed at least partially in a gate trench to apply a voltage to a channel region, and a drain electrode spaced from the gate electrode, and in electrical communication with a drift region having a boundary with a lower end of the channel region. The device includes a gate dielectric layer in contact with the gate electrode, and disposed between the gate electrode and the drain electrode. The channel region is adjacent to a substantially vertical wall of the gate trench. The device includes a field plate contacting the gate electrode and configured to increase a breakdown voltage of the device.
    Type: Grant
    Filed: April 20, 2008
    Date of Patent: April 17, 2012
    Assignee: Rensselaer Polytechnic Institute
    Inventors: Tat-sing Paul Chow, Kamal Raj Varadarajan
  • Patent number: 8106804
    Abstract: A video decoder (10) with reduced power consumption includes a power management controller (45) that is operative to select one of a plurality of different power consumption states for a video decoder (10), and, in response to the determination, vary power consumption of at least one operational portion of the video decoder (10). In addition, in one example, a method (200) for reducing power consumption for a video decoder (10) includes determining input stream encoding description data (34) to select one of a plurality of different power consumption states for a video decoder (10) and, in response to the determination, varying power consumption of at least one operational portion of the video decoder (10).
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: January 31, 2012
    Assignee: ATI Technologies ULC
    Inventors: Greg Sadowski, George Jacobs, Paul Chow
  • Publication number: 20100322318
    Abstract: A video decoder (10) with reduced power consumption includes a power management controller (45) that is operative to select one of a plurality of different power consumption states for a video decoder (10), and, in response to the determination, vary power consumption of at least one operational portion of the video decoder (10). In addition, in one example, a method (200) for reducing power consumption for a video decoder (10) includes determining input stream encoding description data (34) to select one of a plurality of different power consumption states for a video decoder (10) and, in response to the determination, varying power consumption of at least one operational portion of the video decoder (10).
    Type: Application
    Filed: August 24, 2010
    Publication date: December 23, 2010
    Applicant: ATI Technologies ULC
    Inventors: Greg Sadowski, George Jacobs, Paul Chow
  • Patent number: 7804435
    Abstract: A video decoder (10) with reduced power consumption includes a power management controller (45) that is operative to select one of a plurality of different power consumption states for a video decoder (10), and, in response to the determination, vary power consumption of at least one operational portion of the video decoder (10). In addition, in one example, a method (200) for reducing power consumption for a video decoder (10) includes determining input stream encoding description data (34) to select one of a plurality of different power consumption states for a video decoder (10) and, in response to the determination, varying power consumption of at least one operational portion of the video decoder (10).
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: September 28, 2010
    Assignee: ATI Technologies ULC
    Inventors: Greg Sadowski, George Jacobs, Paul Chow
  • Publication number: 20100219451
    Abstract: A p-type nitride compound semiconductor layer is formed on a buffer formed on a substrate. An n-type contact region is formed by ion implantation under a source electrode and a drain electrode. An electric-field reducing layer made of an n-type nitride compound semiconductor is formed on the p-type nitride compound semiconductor layer. A career density of the electric-field reducing layer is lower than that of the n-type contact region. A first end portion of the electric-field reducing layer contacts with the n-type contact region, and a second end portion of the electric-field reducing layer overlaps with a gate electrode.
    Type: Application
    Filed: December 29, 2009
    Publication date: September 2, 2010
    Inventors: Tat-Sing Paul Chow, Takehiko Nomura, Yuki Niiyama, Hiroshi Kambayashi, Seikoh Yoshida
  • Patent number: 7779177
    Abstract: A reconfigurable multi-processor computing system including a plurality of configurable processing elements each having a plurality of integrated high-speed serial input/output ports. Interconnects link the plurality of processing elements, wherein at least one of the integrated high-speed serial input/output ports of each processing element is connected by at least one interconnect to at least one of the integrated high-speed serial input/output ports of each other processing element, thereby creating a full mesh network. The full mesh network is located on a processor card, multiples of which may be grouped in a shelf having a backplane card with a shelf controller card for providing cross-connects between processor cards. Multiple shelves may be interconnected to form a large computer system.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: August 17, 2010
    Assignee: Arches Computing Systems
    Inventor: Paul Chow
  • Publication number: 20100191791
    Abstract: A device and method for evaluating multidimensional discrete Fourier transforms (DFT) by eliminating transpose operations by transforming every dimension concurrently. At least one computing node is enabled to evaluate a DFT of one of a multidimensional input data set and a subgroup of the input data set, wherein the subgroup comprises groupings of elements taken from a plurality of selected dimensions of the input data set for subsequent multidimensional DFT operations.
    Type: Application
    Filed: January 27, 2010
    Publication date: July 29, 2010
    Inventors: Arun Mohanlal Patel, Paul Chow