Patents by Inventor Paul Farrar

Paul Farrar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230320941
    Abstract: The present invention relates to a dental composition and a dental kit comprising a polymerisable adhesive free of a photoinitiator, and a self-cure composite restorative including a redox initiator system. The dental composition cures upon contact between the self-cure composite restorative and the adhesive, to thereby form a dental restoration. The present invention also relates to a method of applying the dental composition, and methods of replacing a dental amalgam with the dental composition, or dental kit, of the present invention.
    Type: Application
    Filed: August 13, 2021
    Publication date: October 12, 2023
    Inventor: Paul FARRAR
  • Publication number: 20220218743
    Abstract: The present invention relates to an aqueous Silver Fluoride (AgF) containing solutions with pH 4.0-5.3.
    Type: Application
    Filed: February 7, 2019
    Publication date: July 14, 2022
    Inventors: Paul FARRAR, Amanda TARGETT, Mingdeng LUO
  • Patent number: 11213462
    Abstract: A dental adhesive composition, having a solvent which is an azeotrope of methyl ethyl ketone with water. Optionally, the azeotropic solvent may comprise in addition, ethanol or isopropanol. The boiling point of the solvent is less than 75° C.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: January 4, 2022
    Assignee: SDI (NORTH AMERICA), INC.
    Inventors: Tony Clayton, Paul Farrar, Manon Agrissais
  • Patent number: 11177104
    Abstract: A device for controlling electron flow is provided. The device comprises a cathode, an elongate electrical conductor embedded in a diamond substrate, an anode, and a control electrode provided on the substrate surface for modifying the electric field in the region of the end of the conductor. A method of manufacturing the device is also provided.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: November 16, 2021
    Assignee: Evince Technology Limited
    Inventors: Gareth Andrew Taylor, David Andrew James Moran, John Peter Carr, Paul Farrar, Mark Kieran Massey
  • Patent number: 11094496
    Abstract: A device for controlling electron flow is provided. The device comprises a cathode, an elongate electrical conductor embedded in a diamond substrate, an anode, and a control electrode provided on the substrate surface for modifying the electric field in the region of the end of the conductor. A method of manufacturing the device is also provided.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: August 17, 2021
    Assignee: Evince Technology Limited
    Inventors: Gareth Andrew Taylor, David Andrew James Moran, John Peter Carr, Paul Farrar, Mark Kieran Massey
  • Publication number: 20210159039
    Abstract: A device for controlling electron flow is provided. The device comprises a cathode, an elongate electrical conductor embedded in a diamond substrate, an anode, and a control electrode provided on the substrate surface for modifying the electric field in the region of the end of the conductor. A method of manufacturing the device is also provided.
    Type: Application
    Filed: December 3, 2020
    Publication date: May 27, 2021
    Inventors: Gareth Andrew Taylor, David Andrew James Moran, John Peter Carr, Paul Farrar, Mark Kieran Massey
  • Publication number: 20200388460
    Abstract: A device for controlling electron flow is provided. The device comprises a cathode, an elongate electrical conductor embedded in a diamond substrate, an anode, and a control electrode provided on the substrate surface for modifying the electric field in the region of the end of the conductor. A method of manufacturing the device is also provided.
    Type: Application
    Filed: July 24, 2018
    Publication date: December 10, 2020
    Inventors: Gareth Andrew Taylor, David Andrew James Moran, John Peter Carr, Paul Farrar, Mark Kieran Massey
  • Patent number: 9886821
    Abstract: A gaming system and method of rewarding players of electronic gaming machines connected by a network to a host computer which stores player-useable points at a network-accessible location, awards a personal points multiplier to a player, and applies the personal points multiplier to at least some of the points.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: February 6, 2018
    Assignee: IGT
    Inventor: Paul Farrar
  • Publication number: 20170024969
    Abstract: A gaming system and method of rewarding players of electronic gaming machines connected by a network to a host computer which stores player-useable points at a network-accessible location, awards a personal points multiplier to a player, and applies the personal points multiplier to at least some of the points.
    Type: Application
    Filed: October 4, 2016
    Publication date: January 26, 2017
    Inventor: Paul Farrar
  • Patent number: 9466168
    Abstract: A gaming system and method of rewarding players of electronic gaming machines connected by a network to a host computer which stores player-useable points at a network-accessible location, awards a personal points multiplier to a player, and applies the personal points multiplier to at least some of the points.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: October 11, 2016
    Assignee: IGT
    Inventor: Paul Farrar
  • Patent number: 9379241
    Abstract: In various method embodiments, a device region in a semiconductor substrate and isolation regions adjacent to the device region are defined. The device region has a channel region and the isolation regions have strain-inducing regions laterally adjacent to the channel regions. The channel region is strained with a desired strain for carrier mobility enhancement, where at least one ion type is implanted with an energy resulting in a peak implant in the strain-inducing regions of the isolation regions. Other aspects and embodiments are provided herein.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: June 28, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Arup Bhattacharyya, Leonard Forbes, Paul A. Farrar
  • Publication number: 20160063800
    Abstract: A gaming system and method of rewarding players of electronic gaming machines connected by a network to a host computer which stores player-useable points at a network-accessible location, awards a personal points multiplier to a player, and applies the personal points multiplier to at least some of the points.
    Type: Application
    Filed: November 6, 2015
    Publication date: March 3, 2016
    Inventor: Paul Farrar
  • Publication number: 20160020322
    Abstract: In various method embodiments, a device region in a semiconductor substrate and isolation regions adjacent to the device region are defined. The device region has a channel region and the isolation regions have strain-inducing regions laterally adjacent to the channel regions. The channel region is strained with a desired strain for carrier mobility enhancement, where at least one ion type is implanted with an energy resulting in a peak implant in the strain-inducing regions of the isolation regions. Other aspects and embodiments are provided herein.
    Type: Application
    Filed: September 29, 2015
    Publication date: January 21, 2016
    Inventors: Arup Bhattacharyya, Leonard Forbes, Paul A. Farrar
  • Patent number: 9209127
    Abstract: Devices and methods are described including a multi-chip assembly. Embodiments of multi-chip assemblies are provided that uses both lateral connection structures and through chip connection structures. One advantage of this design includes an increased number of possible connections. Another advantage of this design includes shorter distances for interconnection pathways, which improves device performance and speed.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: December 8, 2015
    Assignee: Micron Technology
    Inventor: Paul A. Farrar
  • Patent number: 9183701
    Abstract: A gaming system and method of rewarding players of electronic gaming machines connected by a network to a host computer which stores player-useable points at a network-accessible location, awards a personal points multiplier to a player, and applies the personal points multiplier to at least some of the points.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: November 10, 2015
    Assignee: IGT
    Inventor: Paul Farrar
  • Patent number: 9147735
    Abstract: A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of dopant elements. Selection of a plurality of dopant elements includes selecting a first dopant element with a first atomic radius larger than a host matrix atomic radius and selecting a second dopant element with a second atomic radius smaller than a host matrix atomic radius. The methods and devices further include selecting amounts of each dopant element of the plurality of dopant elements wherein amounts and atomic radii of each of the plurality of dopant elements complement each other to reduce a host matrix lattice strain. The methods and devices further include introducing the plurality of dopant elements to a selected region of the host matrix and annealing the selected region of the host matrix.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: September 29, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Paul A. Farrar, Jerome M. Eldridge
  • Patent number: 9076867
    Abstract: The present invention includes methods for stressing transistor channels of semiconductor device structures. Such methods include the formation of so-called near-surface “nanocavities” adjacent to the source/drain regions, forming extensions of the source/drain regions adjacent to and including the nanocavities, and implanting matter of a type that will expand or contract the volume of the nanocavities, depending respectively upon whether compressive strain is desirable in transistor channels between the nanocavities, as in PMOS field effect transistors, or tensile strain is wanted in transistor channels, as in NMOS field effect transistors, to enhance carrier mobility and transistor speed. Semiconductor device structures and semiconductor devices including these features are also disclosed.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: July 7, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Arup Bhattacharyya, Leonard Forbes, Paul A. Farrar
  • Patent number: 8872324
    Abstract: Some embodiments include a device having a number of memory cells and associated circuitry for accessing the memory cells. The memory cells of the device may be formed in one or more memory cell dice. The associated circuitry of the device may also be formed in one or more dice, optionally separated from the memory cell dice.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: October 28, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Paul A. Farrar, Hussein I Hanafi
  • Patent number: 8841169
    Abstract: Methods and devices for multi-chip stacks are shown. A method is shown that assembles multiple chips into stacks by stacking wafers prior to dicing into individual chips. Methods shown provide removal of defective chips and their replacement during the assembly process to improve manufacturing yield.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: September 23, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Farrar
  • Patent number: D937496
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: November 30, 2021
    Assignee: Rheon Labs Ltd
    Inventor: Paul Farrar