Abstract: Provided are systems and methods for managing a processing load of a processing module and thermal energy produced by the processing load. In one example, a method includes identifying a hot water profile that contains usage information of hot water from a hot water tank that serves as a heat sink for the thermal energy. A determination may be made as to whether it is economically desirable to increase or decrease the processing load based on factors such as an economic value generated by the processing load, a cost of energy needed to support the processing load, and an economic value of the thermal energy transferred to the hot water tank based on the hot water profile. The processing load may be dynamically modulated by a local or remote controller in response to the economic desirability of increasing or decreasing the processing load as well as other possible parameters.

Abstract: A semiconductor device includes a semiconductor wafer or a single semiconductor chip or die, and a layer stack. The layer stack comprises a first layer comprising NiSi, and a second layer comprising NiV, wherein the second layer is arranged between the first layer and the semiconductor wafer or single semiconductor chip or die.

Abstract: A method for fabricating a SiC power semiconductor device includes: providing a SiC power semiconductor die; depositing a metallization layer over the power semiconductor die, the metallization layer including a first metal; arranging the power semiconductor die over a die carrier such that the metallization layer faces the die carrier, the die carrier being at least partially covered by a plating that includes Ni; and diffusion soldering the power semiconductor die to the die carrier such that a first intermetallic compound is formed between the power semiconductor die and the plating, the first intermetallic compound including Ni3Sn4.

Abstract: Isolated monoclonal antibodies which bind to human c-Met, the hepatocyte growth factor receptor, and related antibody-based compositions and molecules, are disclosed. Pharmaceutical compositions comprising the antibodies and therapeutic and diagnostic methods for using the antibodies are also disclosed.

Abstract: This invention provides devices for use in various analytical applications including single-molecule analytical reactions. Methods for detecting analytes optically by propagating optical energy by waveguides within a substrate are provided. Analytical devices are provided which have both shallow and deep waveguides in which illumination light is transported through the deep waveguides and coupled into the shallow waveguides. The shallow waveguides provide evanescent field illumination to analytes, such as single-molecule analytes, within nanometer scale wells. Integrated devices including integrated detectors such as CMOS detectors are included.

Abstract: A lighting system has an elongate bracket having a recess for receiving an edge of a wall member in use such that the bracket extends along the edge of the wall member; a groove extending along the length of the bracket and spaced from the rear wall by an intermediate wall portion; and an electroluminescent wire extending along the length of the bracket at a position within the groove in front of the rear wall such that the electroluminescent wire is exposed in use.

Abstract: A semiconductor device includes a semiconductor wafer or a single semiconductor chip or die, and a layer stack. The layer stack comprises a first layer comprising NiSi, and a second layer comprising NiV, wherein the second layer is arranged between the first layer and the semiconductor wafer or single semiconductor chip or die.

Abstract: In an embodiment, a semiconductor device is provided that includes a semiconductor die having a front side, a rear side opposing the front side, and side faces, a first transistor device having a first source pad and a first gate pad on the front side, and a second transistor device having a second source pad and a second gate pad on the front side. The first and second transistor devices each have a drain that is electrically coupled to a common drain pad on the rear side of the semiconductor die. The drain pad has an upper surface and side faces and at least a central portion of the upper surface is covered by a first electrically insulating layer.

Abstract: The present invention provides novel drug combinations, pharmaceutical compositions, as well as methods involving novel therapeutic regimes for targeting cancer stem cells, as well as methods of use thereof, for the treatment and management of cancerous and non-cancerous tumours in a patient. In particular, the present invention provides novel drug combinations and pharmaceutical compositions that target components of the Renin Angiotensin System shown to expressed by cancer stem cells.

Abstract: A semiconductor package includes a power semi conductor chip comprising SiC, a leadframe part including Cu, wherein the power semiconductor chip is arranged on the leadframe part, and a solder joint electrically and mechanically coupling the power semiconductor chip to the leadframe part, wherein the solder joint includes at least one intermetallic phase.

Abstract: A semiconductor package includes a power semiconductor chip comprising SiC, a leadframe part comprising Cu, wherein the power semiconductor chip is arranged on the leadframe part, and a solder joint electrically and mechanically coupling the power semiconductor chip to the leadframe part, wherein the solder joint comprises at least one intermetallic phase.

Abstract: A fibrous structure may have a lower side and an upper side, and may comprise three-dimensional, out-of-plane features formed by knuckles on a papermaking belt, the features may exhibit at least two Z-direction spatially separated surfaces defined in order spatially with respect to the lower side, wherein each successive surface progressing in a Z-direction away from the lower side may have a projected area less than the projected area of the surface adjacent and closer to the lower side, and each projected area may be bounded completely by the area of the projected area of the surface adjacent and closer to the lower side.

Abstract: A textured mask comprising a film. The film can have a first substantially continuously flat surface lying in a first plane and a second surface opposite the first surface lying in a second plane substantially parallel to the first plane. The second surface is interrupted by a plurality of cavities, each of the cavities having a first depth defined by a third surface lying in a third plane substantially parallel to the first and second planes. The depth of the cavities can be at a distance of from about 0.1 mm to about 5 mm from the second plane. The textured mask is at least partially coated with an opaque masking agent. The textured mask can make a correspondingly structured three-dimensional papermaking belt, which can make correspondingly structured three-dimensional fibrous structure.

Abstract: An electronic device, an electronic module comprising the electronic device and methods for fabricating the same are disclosed. In one example, the electronic device includes a semiconductor substrate and a metal stack disposed on the semiconductor substrate, wherein the metal stack comprises a first layer, wherein the first layer comprises NiSi.

Abstract: The present invention relates to methods and compositions for the treatment of hemangioma, and particularly, but not exclusively, methods and compositions for the treatment of infantile hemangioma. In certain aspects, the methods comprise locally administering an ACE inhibitor or an ATIIR2 antagonist to a subject. In other aspects, the methods comprise systemically administering two or more of an ACE inhibitor, a beta-blocker and an ATIIR2 antagonist. The present invention also relates to compositions that are suitable for local administration and comprise: an ACEi and a beta-blocker; an ACEi and an ATIIR2 antagonist; a beta-blocker and an AT11R2 antagonist; or, an ACEi, a beta-blocker, and an AT11R2 antagonist.

Abstract: A semiconductor device includes a semiconductor die including a first side and an opposing second side, a first metallization layer arranged on the first side, a Ni including layer arranged on the second side, wherein the Ni including layer further includes one or more of Si, Cr and Ti, and a SnSb layer arranged on the Ni comprising layer, wherein an amount of Sb in the SnSb layer is in the range of 2 wt % to 30 wt %.

Abstract: An electronic device comprises a semiconductor die, a layer stack disposed on the semiconductor die and comprising one or more functional layers, wherein the layer stack comprises a protection layer which is an outermost functional layer of the layer stack, and a sacrificial layer disposed on the protection layer, wherein the sacrificial layer comprises a material which decomposes or becomes volatile at a temperature between 100° and 400° C.

Abstract: A node controller is provided to include a first interface to interface with one or more processors, a second interface including a plurality of ports to interface with node controllers within a base node and other nodes in the cache-coherent interconnect network. The node controller can further include a third interface to interface with a first plurality of memory devices and a cache coherence management logic. The cache coherence management logic can maintain, based on a first circuitry, hardware-managed cache coherency in the cache-coherent interconnect network. The cache coherence management logic can further facilitate, based on a second circuitry, software-managed cache coherency in the cache-coherent interconnect network.

Abstract: An apparatus and method to determine a property of a substrate by measuring, in the pupil plane of a high numerical aperture lens, an angle-resolved spectrum as a result of radiation being reflected off the substrate. The property may be angle and wavelength dependent and may include the intensity of TM- and TE-polarized radiation and their relative phase difference.