Abstract: Compositions, methods of use thereof, and methods of decomposition thereof, are provided. One exemplary composition, among others, includes a polymer and a catalytic amount of a negative tone photoinitiator.

Abstract: Fuel cells, fuel cell membranes, micro-fuel cells, and methods of fabricating each, are disclosed.

Abstract: Fuel cells, fuel cell membranes, micro-fuel cells, and methods of fabricating each, are disclosed. One exemplary fuel cell, among others, includes a membrane including a material such as organic conducting materials and inorganic conducting materials, and combinations thereof. The membrane has a thickness of about 0.01 to 10 ?m, and has an area resistivity of about 0.1 to 1000 ohms cm2.

Abstract: Disclosed is an integrated tunable inductor having mutual micromachined inductances fabricated in close proximity to a tunable inductor that is switched in and out by micromechanical ohmic switches to change the inductance of the integrated tunable inductor. To achieve a large tuning range and high quality factor, silver is preferably used as the structural material to co-fabricate the inductors and micromachined switches, and silicon is selectively removed from the backside of the substrate. Using this method, exemplary tuning of 47% at 6 GHz is achievable for a 1.1 nH silver inductor fabricated on a low-loss polymer membrane. The effect of the quality factor on the tuning characteristic of the integrated inductor is evaluated by comparing the measured result of substantially identical inductors fabricated on various substrates. To maintain the quality factor of the silver inductor, the device may be encapsulated using a low-cost wafer-level polymer packaging technique.

Abstract: Integrated circuit interconnection devices and methods are provided. An interconnection to connect components can comprise a first portion, a second portion, and a joining portion. The first portion can extend from a first component, and the first portion can be made with a single conductor. The second portion can extend from a second component, and the second portion can be made with the single conductor. The joining section can be disposed between the first portion and the second portion so that the first component and second component are interconnected to each other to form an interconnect. The joining section can be made of the single conductor so that the interconnect structure consists only of the single conductor. An interconnect can also be formed with two portions, and be formed to have a high-aspect ratio. Other embodiments are also claimed and described.

Abstract: One or more microfabricated fuel cells may be integrated into a printed circuit board or a printed wiring board within an electronic device. The electrical energy created by the integrated microfabricated fuel cells within the metal wiring on the PWB may then be used by the electronic components within and on the PWB.

Abstract: Embodiments of the present disclosure provide systems and methods for producing micro electro-mechanical device packages. Briefly described, in architecture, one embodiment of the system, among others, includes a micro electro-mechanical device formed on a substrate layer; and a thermally decomposable sacrificial structure protecting at least a portion of the micro electro-mechanical device, where the sacrificial structure is formed on the substrate layer and surrounds a gas cavity enclosing an active surface of the micro electro-mechanical device. Other systems and methods are also provided.

Abstract: Anionic fuel cells, methods of fabrication thereof, CO2 pumps, hybrid fuel cells, and methods for fabricating an anionic fuel cell, are disclosed.

Abstract: High performance interconnect devices, structures, and fabrication methods are provided herein. According to some embodiments of the present invention, an interconnect device used to connect components or route signals in an integrated circuit can comprise multiple conductors. A first conductor of the interconnect device can define a first conductor axis, and a second conductor of the interconnect device can define a second conductor axis. The second conductor can be proximate the first conduct such that first conductor axis is substantially coaxially situated relative to the second conductor axis to provide a high performance interconnect having a coaxial alignment. The first conductor and the second conductor can define a gap disposed between and separating the conductors. Other embodiments are also claimed and described.

Abstract: Microstructures and methods of fabricating microstructures are disclosed. One exemplary microstructure, among others, includes a substrate, an overcoat layer disposed upon the substrate, an air-region within at least a portion of the overcoat layer, and a framing material layer engaging at least a portion of the air-region on the inside of the framing material layer and engaging the overcoat layer on the outside of the framing material layer.

Abstract: Polymers, methods of use thereof, and methods of decomposition thereof, are provided. One exemplary polymer, among others, includes, a photodefinable polymer having a sacrificial polymer and a photoinitiator.

Abstract: Compositions, methods of use thereof, and methods of decomposition thereof, are provided. One exemplary composition, among others, includes a polymer and a catalytic amount of a negative tone photoinitiator.

Abstract: Polymers, methods of use thereof, and methods of decomposition thereof, are provided. One exemplary polymer, among others, includes, a composition having a sacrificial polymer and a photoacid generator.

Abstract: Systems and methods for three dimensional lithography, nano-indentation, and combinations thereof are disclosed.

Abstract: Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.

Abstract: Waveguides and methods of fabrication thereof are presented. A representative waveguide includes a waveguide core and a cladding layer, where the cladding layer surrounds the waveguide core. The waveguide core and cladding can be made of a host material having a plurality of nano-pores, wherein the nano-pores include a sacrificial material, and the sacrificial material can be selectively decomposed in both the core and cladding layers to form a plurality of nano air-gaps.

Abstract: A method of fabricating an electrostatic actuator with an intrinsic stress gradient is provided. An electrode is formed on a substrate and a support layer is formed over the electrode. A metal layer is deposited onto the support layer via a deposition process. Deposition process conditions are varied in order to induce a stress gradient into the metal layer. The intrinsic stress in the metal layer increases in the direction from the bottom to the top of the metal layer. The support layer under the electrode is removed to release the electrostatic actuator.

Abstract: Electroless copper plating solutions and methods of use thereof are disclosed. A representative electroless copper plating solution includes a reducing agent that is a source of hypophosphite ions and at least one accelerator compound that accelerates the rate of copper deposition.

Abstract: Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.

Abstract: Waveguides having air-gap cladding layers and methods of fabricating waveguides having air-gap cladding layers are disclosed. A representative waveguide includes a waveguide core having an air-gap cladding layer engaging a portion of the waveguide core. In addition, a representative method of fabricating a waveguide having an air-gap cladding layer includes: providing a substrate having a lower cladding layer disposed on the substrate; disposing a waveguide core on a portion of the lower cladding layer; disposing a sacrificial layer onto at least one portion of the lower cladding layer and the waveguide core; disposing an overcoat layer onto the lower cladding layer and the sacrificial layer; and removing the sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and engaging a portion of the waveguide core.