Abstract: A process is disclosed for controllably providing dielectrically isolated semiconductor regions having a uniform and well defined thickness. Grooves are formed in a first surface of a semiconductor substrate and then a dielectric layer is formed covering that surface and the grooves extending into the surface. A layer of backing material such as polycrystalline silicon is formed overlying the dielectric layer. A semiconductor substrate is then thinned to form a new surface with portions of the dielectric layer and backing material exposed at that surface. A semiconductor layer is epitaxially grown overlying the new surface with the semiconductor layer having a monocrystalline structure where it is grown on exposed regions of the original substrate and having a polycrystalline structure otherwise. An oxidation masking layer is formed overlying those portions of the semiconductor layer which have a monocrystalline structure.

Abstract: A distributed collector ballast resistor structure for use in a distributed collector contacted transistor comprises a diffusion geometry which is designed to employ a number of distributed collector ballast resistors in parallel as opposed to a single bulk resistor in series with the collector circuit thereby generating a lower current for a given voltage during avalanche while allowing lower saturation voltage, better RF gain and higher saturated output power.