Abstract: An integrated structure of acoustic wave device and varactor comprises an acoustic wave device and a varactor formed on a first part and a second part of a semiconductor substrate respectively. The acoustic wave device comprises an acoustic wave device upper structure and a first part of a bottom epitaxial structure. The acoustic wave device upper structure is formed on the first part of the bottom epitaxial structure. The varactor comprises a varactor upper structure and a second part of the bottom epitaxial structure. The varactor upper structure is formed on the second part of the bottom epitaxial structure. The integrated structure of the acoustic wave device and the varactor formed on the same semiconductor substrate is capable of reducing the module size, optimizing the impedance matching, and reducing the signal loss between the varactor and the acoustic wave device.

Abstract: A pixel structure is provided and disposed in a pixel region divided up by a dummy line. The pixel structure includes a pixel electrode. The pixel electrode includes first branches and second branches located at opposite sides and disposed symmetrically with respect to the dummy line. One first branch has an extending portion and an end portion. A direction is directing from a front end toward a terminal end of the extension portion, and the terminal end of the extension portion is connected to a front end of the end portion. A bending direction is directing from the front end to a terminal end of the end portion. The direction is toward the dummy line and the bending direction is parallel to or away from the dummy line, or the direction is away from the dummy line and the bending direction is parallel to or toward the dummy line.

Abstract: A protective cover for an acoustic wave device and a fabrication method thereof, for protecting an acoustic wave device having a resonant area on a surface of a substrate during a packaging operation so as to avoid molding compound flowing onto the resonant area of the acoustic wave device, wherein at least one electrical device is provided on the surface of the substrate and the at least one electrical device includes a temperature sensor. The acoustic wave device protection structure comprising: a metal covering layer, having a concave surface and a bottom rim, the bottom rim connected to the acoustic wave device and forming at least one opening between the bottom rim and the acoustic wave device, and the concave surface covering over the resonant area to form a cavity between the concave surface and the resonant area.

Abstract: An array substrate includes a substrate, data lines, gate lines, at least one pixel electrode, at least one common electrode, at least one light-shielding pattern, and at least one auxiliary electrode. At least one pixel region is defined by the data lines and the gate lines disposed and crossing with one another on the substrate. The pixel electrode, the common electrode, the light-shielding pattern, and the auxiliary electrode are disposed on the substrate and at least partially located in the pixel region. The pixel electrode includes at least one first branch electrode, and the common electrode includes at least one second branch electrode. The first branch electrode and the second branch electrode are disposed alternately in a first direction. The light-shielding pattern is disposed between a data line adjacent to the pixel region and the first branch electrode in the first direction.

Abstract: A liquid crystal display panel includes multiple pixel units. At least one pixel unit includes first and second substrates, a scan line, data lines, first and second pixel structures, a shielding electrode layer, and a negative liquid crystal layer. The first pixel structure includes a first active device, a first pixel electrode, and a first common electrode. The second pixel structure includes a second active device, a second pixel electrode, and a second common electrode. The first common electrode and the second common electrode are provided with different voltages. One of the first pixel electrode and the first common electrode and one of the second pixel electrode and the second common electrode respectively include a frame and two strip electrodes. The frame has two sides, and two ends of each strip electrode are respectively connected to the two sides. The shielding electrode layer overlaps with the data lines.

Abstract: A chip stack having a protection structure for semiconductor device package comprises a first chip and a second chip stacked with each other. A first surface of the first chip and a second surface of the second chip are facing to each other. At least one metal pillar is formed on at least one of the first surface and the second surface and connected with the other. At least one protection ring is formed on at least one of the first surface and the second surface and having a first gap with the other. At least one electrical device is formed on at least one of the first surface and the second surface and is located inside at least one of the at least one protection ring, wherein the at least one electrical device includes a temperature sensor.

Abstract: An integrated structure of acoustic wave device and varactor comprises an acoustic wave device and a varactor formed on a first part and a second part of a semiconductor substrate respectively. The acoustic wave device comprises an acoustic wave device upper structure and a first part of a bottom epitaxial structure. The acoustic wave device upper structure is formed on the first part of the bottom epitaxial structure. The varactor comprises a varactor upper structure and a second part of the bottom epitaxial structure. The varactor upper structure is formed on the second part of the bottom epitaxial structure. The integrated structure of the acoustic wave device and the varactor formed on the same semiconductor substrate is capable of reducing the module size, optimizing the impedance matching, and reducing the signal loss between the varactor and the acoustic wave device.

Abstract: A chip stack having a protection structure for semiconductor device package, which comprises a first chip and a second chip stacked with each other, wherein said first chip has a first surface, said second chip has a second surface, said first surface and said second surface are two surfaces facing to each other, wherein at least one metal pillar is formed on at least one of said first surface and said second surface and connected with the other, at least one protection ring is formed on at least one of said first surface and said second surface and having a first gap with the other, and at least one electrical device is formed on at least one of said first surface and said second surface, wherein said at least one electrical device is located inside at least one of said at least one protection ring.

Abstract: An integrated structure of power amplifier and acoustic wave device comprises: a compound semiconductor epitaxial substrate, a power amplifier upper structure formed on a first side of said compound semiconductor epitaxial substrate, and a film bulk acoustic resonator formed on a second side of said compound semiconductor epitaxial substrate; wherein forming an epitaxial structure on a compound semiconductor substrate to form said compound semiconductor epitaxial substrate; wherein said first side of said compound semiconductor epitaxial substrate and said power amplifier upper structure form a power amplifier; said second side of said compound semiconductor epitaxial substrate and said film bulk acoustic resonator form an acoustic wave device; the integrated structure of power amplifier and acoustic wave device on the same compound semiconductor epitaxial substrate is capable of reducing the component size, optimizing the impedance matching, and reducing the signal loss between power amplifier and acoustic w

Abstract: An integrated structure of power amplifier and acoustic wave device comprises: a compound semiconductor epitaxial substrate, a power amplifier upper structure formed on a first side of said compound semiconductor epitaxial substrate, and a film bulk acoustic resonator formed on a second side of said compound semiconductor epitaxial substrate; wherein forming an epitaxial structure on a compound semiconductor substrate to form said compound semiconductor epitaxial substrate; wherein said first side of said compound semiconductor epitaxial substrate and said power amplifier upper structure form a power amplifier; said second side of said compound semiconductor epitaxial substrate and said film bulk acoustic resonator form an acoustic wave device; the integrated structure of power amplifier and acoustic wave device on the same compound semiconductor epitaxial substrate is capable of reducing the component size, optimizing the impedance matching, and reducing the signal loss between power amplifier and acoustic w

Abstract: A display panel includes a first substrate, first gate lines, first data lines, second data lines, third data lines, fourth data lines, first sub-pixels, second sub-pixels and first shielding electrodes. The first substrate has a plurality of first sub-pixel regions and second sub-pixel regions. The first gate lines extend along a first direction. The first data lines, the second data lines, the third data lines and the fourth data lines extend along a second direction and are sequentially arranged in the first direction. The first sub-pixel is electrically connected to one of the first data line and the second data line. The second sub-pixel is electrically connected to one of the third data line and the fourth data line. The first shielding electrodes extend along the second direction and are disposed in a common boundary between the first sub-pixel region and the second sub-pixel region adjacent to each other.

Abstract: A protective cover for an acoustic wave device and a fabrication method thereof, for protecting an acoustic wave device having a resonant area during a packaging operation so as to avoid molding compound flowing onto the resonant area of the acoustic wave device. The fabrication method comprises: defining a sacrificial area on the acoustic wave device; forming a sacrificial layer on the sacrificial area; covering a metal covering layer on the sacrificial layer and connecting a bottom rim of the metal covering layer to the acoustic wave device and forming an opening between the bottom rim of the metal covering layer and the acoustic wave device; and removing the sacrificial layer to form a cavity between the metal covering layer and the resonant area by using a chemical solution, wherein the chemical solution enters from the opening between the metal covering layer and the acoustic wave device.

Abstract: A pixel structure is provided. The pixel structure includes a scan line, a data line, an active device, a pixel electrode, and a common electrode. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The pixel electrode includes multiple first layer pixel electrode patterns and multiple second layer pixel electrode patterns. The common electrode includes a plurality of first layer common electrode patterns and a plurality of second layer common electrode patterns. A fringe electric field is between each first layer pixel electrode pattern and corresponding portion of second layer common electrode patterns, and between each first layer common electrode pattern and corresponding portion of second layer pixel electrode patterns. A horizontal electric field is between each second layer pixel electrode pattern and the adjacent portion of second layer common electrode patterns.

Abstract: A pixel structure is provided and disposed in a pixel region divided up by a dummy line. The pixel structure includes a pixel electrode. The pixel electrode includes first branches and second branches located at opposite sides and disposed symmetrically with respect to the dummy line. One first branch has an extending portion and an end portion. A direction is directing from a front end toward a terminal end of the extension portion, and the terminal end of the extension portion is connected to a front end of the end portion. A bending direction is directing from the front end to a terminal end of the end portion. The direction is toward the dummy line and the bending direction is parallel to or away from the dummy line, or the direction is away from the dummy line and the bending direction is parallel to or toward the dummy line.

Abstract: An integrated structure of power amplifier and acoustic wave device comprises: a compound semiconductor epitaxial substrate, a power amplifier upper structure formed on a first side of said compound semiconductor epitaxial substrate, and a film bulk acoustic resonator formed on a second side of said compound semiconductor epitaxial substrate; wherein forming an epitaxial structure on a compound semiconductor substrate to form said compound semiconductor epitaxial substrate; wherein said first side of said compound semiconductor epitaxial substrate and said power amplifier upper structure form a power amplifier; said second side of said compound semiconductor epitaxial substrate and said film bulk acoustic resonator form an acoustic wave device; the integrated structure of power amplifier and acoustic wave device on the same compound semiconductor epitaxial substrate is capable of reducing the component size, optimizing the impedance matching, and reducing the signal loss between power amplifier and acoustic w

Abstract: A pixel structure is provided. The pixel structure includes a scan line, a data line, an active device, a pixel electrode, and a common electrode. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The pixel electrode includes multiple first layer pixel electrode patterns and multiple second layer pixel electrode patterns. The common electrode includes a plurality of first layer common electrode patterns and a plurality of second layer common electrode patterns. A fringe electric field is between each first layer pixel electrode pattern and corresponding portion of second layer common electrode patterns, and between each first layer common electrode pattern and corresponding portion of second layer pixel electrode patterns. A horizontal electric field is between each second layer pixel electrode pattern and the adjacent portion of second layer common electrode patterns.

Abstract: A display panel includes a first substrate, first gate lines, first data lines, second data lines, third data lines, fourth data lines, first sub-pixels, second sub-pixels and first shielding electrodes. The first substrate has a plurality of first sub-pixel regions and second sub-pixel regions. The first gate lines extend along a first direction. The first data lines, the second data lines, the third data lines and the fourth data lines extend along a second direction and are sequentially arranged in the first direction. The first sub-pixel is electrically connected to one of the first data line and the second data line. The second sub-pixel is electrically connected to one of the third data line and the fourth data line. The first shielding electrodes extend along the second direction and are disposed in a common boundary between the first sub-pixel region and the second sub-pixel region adjacent to each other.

Abstract: A pixel array substrate and a display panel are provided. The pixel array substrate includes a substrate, scan line groups, data lines, and pixel structures. The scan line groups are disposed on the substrate. The data lines are intersected with the scan line groups. The pixel structures are connected to the scan line groups and the data lines. Each pixel structure includes an active device group, a first pixel electrode, a second pixel electrode, and a connection electrode. The first pixel electrode is located between the second pixel electrode and the nth scan line group. The connection electrode is located at a side of the first pixel electrode adjacent to one data line. The second pixel electrode is electrically connected to the active device group through the connection electrode. The connection electrode, the first pixel electrode, and the second pixel electrode are of the same layer.

Abstract: A LCD panel in which a pixel has a first sub-pixel area and a second sub-pixel area, each area having a storage capacitor. Each pixel has a first gate line for providing a first gate-line signal for charging the first and second storage capacitors, and a second gate line for providing a second gate-line signal for removing part of the charges in the second storage capacitor to a third capacitor after the first gate-line signal has passed. The width of the first and second gate-line signals and their timing can be varied so that the first gate-line signal provided to a row can be used as the second gate-line signal to one of the preceding rows. In some embodiments, a pixel in each row has a duplicate pixel arranged to similarly receive the first and second gate-line signals, but data signals are received from different data lines.

Abstract: A liquid crystal display includes first and second pixel electrodes, first to fourth data lines, and a first gate line. The first pixel electrode has separated first primary and secondary sub-pixel electrodes. The second pixel electrode has separated second primary and secondary sub-pixel electrodes. The first data line is coupled to the first secondary sub-pixel electrode and covered by the first pixel electrode. The second data line is coupled to the first primary sub-pixel electrode and covered by the second pixel electrode. The third data line is coupled to the second primary sub-pixel electrode and covered by the second pixel electrode. The fourth data line is coupled to the second secondary sub-pixel electrode. The first gate line is coupled to the first pixel electrode and the second pixel electrode.