Abstract: In a method for manufacturing a semiconductor device, a substrate is provided. Various first metal layers are formed on the substrate. A dielectric structure with through holes is formed over the first metal layers. The through holes expose the first metal layers. A pre-clean operation is performed on the dielectric structure and the first metal layers by using an alcohol base vapor and/or an aldehyde base vapor as a reduction agent. Conductors are formed on the first metal layers. In forming the conductors, the through holes are filled with the conductors.

Abstract: Embodiments disclosed herein relate generally to capping processes and structures formed thereby. In an embodiment, a conductive feature, formed in a dielectric layer, has a metallic surface, and the dielectric layer has a dielectric surface. The dielectric surface is modified to be hydrophobic by performing a surface modification treatment. After modifying the dielectric surface, a capping layer is formed on the metallic surface by performing a selective deposition process. In another embodiment, a surface of a gate structure is exposed through a dielectric layer. A capping layer is formed on the surface of the gate structure by performing a selective deposition process.

Abstract: Embodiments disclosed herein relate generally to capping processes and structures formed thereby. In an embodiment, a conductive feature, formed in a dielectric layer, has a metallic surface, and the dielectric layer has a dielectric surface. The dielectric surface is modified to be hydrophobic by performing a surface modification treatment. After modifying the dielectric surface, a capping layer is formed on the metallic surface by performing a selective deposition process. In another embodiment, a surface of a gate structure is exposed through a dielectric layer. A capping layer is formed on the surface of the gate structure by performing a selective deposition process.

Abstract: A physical vapor deposition system includes a chamber, a cover plate, a pedestal, and a collimator. The cover plate is disposed on the chamber for holding a target. The pedestal is disposed in the chamber for supporting a wafer. The collimator is mounted between the cover plate and the pedestal. The collimator includes a plurality of sidewall sheets together forming a plurality of passages. At least one of the passages has an entrance and an exit opposite to the entrance. The entrance faces the cover plate, and the exit faces the pedestal. A thickness of one of the sidewall sheets at the entrance is thinner than a thickness of the sidewall sheet at the exit.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming a dielectric layer over a substrate. The substrate has an edge region and a center region. The method also includes forming a dielectric ring in the edge region, forming a metal layer over the center region of the substrate and over the dielectric ring in the edge region of the substrate and polishing the metal layer in the center region and the edge region to expose the dielectric ring in the edge region of the substrate.

Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming a dielectric layer over a substrate. The substrate has an edge region and a center region. The method also includes forming a dielectric ring in the edge region, forming a metal layer over the center region of the substrate and over the dielectric ring in the edge region of the substrate and polishing the metal layer in the center region and the edge region to expose the dielectric ring in the edge region of the substrate.

Abstract: A method for manufacturing a package-on-package structure may include: providing a support structure having a package attached to an inclined surface of the support structure, the package comprising: a first chip package; a second chip package disposed over the first chip package; and a standoff gap between the first chip package and the second chip package, wherein a first side of the package is disposed higher on the inclined surface of the support structure than a second side of the package; and dispensing an underfill into the standoff gap, the underfill flowing through the standoff gap from the first side of the package to the second side of the package.

Abstract: Chip packages and methods of manufacture thereof are described. In an embodiment, a method for manufacturing a chip package may include: providing a support structure including: a base; and a stage pivotably attached to the base, the stage having a surface facing away from the base; attaching a first die having at least one second die disposed thereon to the surface of the stage; pivotably tilting the stage; and after the pivotably tilting, dispensing an underfill over the first die and adjacent to the least one second die, the underfill flowing through a first standoff gap disposed between the first die and the at least one second die.

Abstract: A physical vapor deposition system includes a chamber, a cover plate, a pedestal, and a collimator. The cover plate is disposed on the chamber for holding a target. The pedestal is disposed in the chamber for supporting a wafer. The collimator is mounted between the cover plate and the pedestal. The collimator includes a plurality of sidewall sheets together forming a plurality of passages. At least one of the passages has an entrance and an exit opposite to the entrance. The entrance faces the cover plate, and the exit faces the pedestal. A thickness of one of the sidewall sheets at the entrance is thinner than a thickness of the sidewall sheet at the exit.

Abstract: A method for manufacturing a package-on-package structure may include: providing a support structure having a package attached to an inclined surface of the support structure, the package comprising: a first chip package; a second chip package disposed over the first chip package; and a standoff gap between the first chip package and the second chip package, wherein a first side of the package is disposed higher on the inclined surface of the support structure than a second side of the package; and dispensing an underfill into the standoff gap, the underfill flowing through the standoff gap from the first side of the package to the second side of the package.

Abstract: Chip packages and methods of manufacture thereof are described. In an embodiment, a method for manufacturing a chip package may include: providing a support structure including: a base; and a stage pivotably attached to the base, the stage having a surface facing away from the base; attaching a first die having at least one second die disposed thereon to the surface of the stage; pivotably tilting the stage; and after the pivotably tilting, dispensing an underfill over the first die and adjacent to the least one second die, the underfill flowing through a first standoff gap disposed between the first die and the at least one second die.