Abstract: A short detection circuit, for detecting an output node corresponding to an output voltage converted from an input voltage of a power converter, includes a first current source, a charging/discharging unit, a comparator, and a logic control unit. The charging/discharging unit performs charging operation in accordance with the first current source to generate a charging signal in a shorted condition of the output node. The comparator outputs an enable signal by comparing the charging signal with a reference signal. The logic control unit is controlled by the enable signal to generate a fault signal for turning off a first switch coupled between the output node and the input voltage in the shorted condition of the output node. A method for detecting short of an output node corresponding to an output voltage converted from an input voltage of a power converter is also disclosed herein.

Abstract: A voltage converter to convert a high voltage to a low voltage is provided. The voltage converter comprises: a current mirror, a current bias, a plurality of loads and a low voltage output. The current mirror comprises a first PMOS and a second PMOS, wherein the source of the first PMOS and the second PMOS receive a high voltage input which is a supply voltage of the current mirror, and the gate of the first PMOS is connected to the drain of the first PMOS. The current bias is connected between the drain of the first PMOS and a ground potential. The plurality of loads are parallel connected between the drain of the second PMOS and the ground potential. And the low voltage output connected to the drain of the second PMOS.

Abstract: A charge pump driving circuit for generating a driving pulse signal to drive a charge pump circuit is disclosed. The charge pump driving circuit includes a control signal generator and a driving signal generator. The control signal generator generates a first control signal, a second control signal, and a third control signal, in which the third control signal transits in the first place, the first control signal transits next, and the second control signal transits last. The driving signal generator, controlled by the first control signal, the second control signal and the third control signal, generates the driving pulse signal, in which the driving signal generator has a rare short circuit current flowing from a supply terminal providing a supply voltage to a ground terminal providing a ground voltage.

Abstract: A power-off control circuit adapted in a LCD panel comprising a gate pulse modulator and a level shifter is provided. The power-off control circuit comprises a logic gate and a control switch. The logic gate comprises a first input to receive an internal power supply, a second input to receive a power state signal and a logic output to generate a control signal. When the power supply is on, the internal power supply is on and the power state signal is in a first state to make the control signal turn off the control switch. When the power supply is off, the internal power supply is on and the power state signal is in a second state to make the control signal turn on the control switch to make the gate pulse modulator makes pixels of a pixel array to perform a discharge activity.

Abstract: An LED driver includes a start-up feedback circuit, an operating feedback circuit and a multiplexer. The start-up feedback circuit has first terminals for receiving LED feedback voltages each delivered from at least one LED coupled to an output terminal for outputting an output voltage, of the LED driver, and generates a start-up feedback voltage accordingly. The operating feedback circuit has second terminals for receiving the LED feedback voltages, and generates an operating feedback voltage accordingly. The multiplexer selects the start-up feedback voltage for initial boost of the output voltage when the LED driver is initially activated, and selects the operating feedback voltage for following boost of the output voltage when the output voltage increases to a certain value.

Abstract: A LED circuit comprises: an inductor, a group of LEDs, a capacitor, a power MOS and a switching circuit. The inductor is connected to a voltage supply and a first node; the group of LEDs is connected to the first node and a ground potential; the capacitor is connected to the first node and a ground potential; the power MOS is connected to the first node and a ground potential, wherein the gate of the power MOS receives a switching signal such that the capacitor is charged when the power MOS is turn on to further turn on the LEDs and the capacitor is discharged when the power MOS is turn off to turn off the LEDs. The switching circuit is to generate the switching signal.

Abstract: New styles of hepatitis C virus (HCV), referred to as HCV-3 and HCV-4, have been identified and sequenced. Antigenic regions of HCV-2, HCV-3 and HCV-4 polypeptides have been identified. Immunoassays for HCV and antibodies thereto are described, which allow more complete screening of blood samples for HCV, and allow HCV genotyping.

Abstract: A tuning fork quartz crystal resonator has a base and two resonating arms extended in parallel from the same side of the base. Each resonating arm has asymmetric grooves on its upper and bottom surface, and the via-hole to reliably connect the top and bottom electrode. The asymmetric groove design can simplify the manufacturing process and lower the manufacturing cost. The base has continuous concave on both side surfaces and a recess on the main surface. The energy of ultrasonic wave propagating via the base mounting pads into the ceramic package can be reduced. This unique tuning fork quartz crystal resonator can prevent dramatic reduction of the Q value, and retain the outstanding quality of the resonator.

Abstract: A logic signal transmitting circuit includes a CMOS inverter, a first transistor switch and an inverter. The CMOS inverter includes a p-type transistor and an n-type transistor and is configured for inverting an input signal. The first transistor switch is connected to an input of the CMOS inverter and controlled by the input signal. The inverter is connected between the p-type transistor and the first transistor switch, in which the inverter turns off the p-type transistor when the first transistor switch is turned on and the inverter turns on the p-type transistor when the first transistor switch is turned off.

Abstract: An echo cancelling algorithm in a communication device initializes a step size value used in an adaptive echo filter based on a background noise signal power level relative to a power level of a received signal and a power level of an echo estimate relative to an output of an echo canceller. The algorithm then adjusts the step size value. One aspect adjusts the step size based on the detection of large fast fourier transform values at one, or more, disturbing-signal frequencies. Another aspect estimates residual echo energy to adjust an estimated echo energy, which then is used to set a double talk flag if a transmit signal has much more power than the estimated echo signal. Another aspect compares transmit signal power to a decimated version of the transmit signal power and sets the double talk flag if the former exceeds the latter by a predetermined amount.

Abstract: A frequency divider includes a transmission gate, a first inverter, a first switch circuit, a second switch circuit, and a second inverter. The transmission gate transmits a clock signal according to an inverted enable signal. The first inverter inverts the clock signal outputted from the transmission gate. The first switch circuit generates a first control signal according to the inverted clock signal and an output signal of the frequency divider. The second switch circuit generates a second control signal according to the clock signal, the inverted clock signal, and the first control signal. The second inverter inverts the second control signal to generate the output signal. The frequency of the clock signal is a multiple of the frequency of the output signal.

Abstract: An LED driver includes a start-up feedback circuit, an operating feedback circuit and a multiplexer. The start-up feedback circuit has first terminals for receiving LED feedback voltages each delivered from at least one LED coupled to an output terminal for outputting an output voltage, of the LED driver, and generates a start-up feedback voltage accordingly. The operating feedback circuit has second terminals for receiving the LED feedback voltages, and generates an operating feedback voltage accordingly. The multiplexer selects the start-up feedback voltage for initial boost of the output voltage when the LED driver is initially activated, and selects the operating feedback voltage for following boost of the output voltage when the output voltage increases to a certain value.

Abstract: New styles of hepatitis C virus (HCV), referred to as HCV-3 and HCV-4, have been identified and sequenced. Antigenic regions of HCV-2, HCV-3 and HCV-4 polypeptides have been identified. Immunoassays for HCV and antibodies thereto are described, which allow more complete screening of blood samples for HCV, and allow HCV genotyping.

Abstract: A frequency divider includes a transmission gate, a first inverter, a first switch circuit, a second switch circuit, and a second inverter. The transmission gate transmits a clock signal according to an inverted enable signal. The first inverter inverts the clock signal outputted from the transmission gate. The first switch circuit generates a first control signal according to the inverted clock signal and an output signal of the frequency divider. The second switch circuit generates a second control signal according to the clock signal, the inverted clock signal, and the first control signal. The second inverter inverts the second control signal to generate the output signal. The frequency of the clock signal is a multiple of the frequency of the output signal.

Abstract: A method is provided for generating reports for a computer monitored or aided environment that has a server-side module, a client-side module and a database, the server-side module, client-side module and database being interconnected, The method includes creating a report layout, the report layout containing a predefined number of dynamic fields at predetermined positions; associating, at the server-side, each dynamic field with a data source; collecting, at the server-side, information for each dynamic field according to the associated data source; storing the information in the database; and displaying the information for each dynamic field on a display according to the report layout. The report layout is shared universally for the generation of a displayed report and a printed report.

Abstract: A level shift circuit includes an inverter, a shifting circuit, a first transistor, and a second transistor. The inverter inverts an original input signal into an inverted input signal. The shifting circuit generates a control signal according to the original input signal, the inverted input signal, and a reference voltage. The first transistor has a gate, a source, and a drain, in which the gate of the first transistor receives the control signal, and the source of the first transistor is connected to a high supply voltage. The second transistor has a gate, a source, and a drain, in which the gate of the second transistor receives the inverted input signal, the drain of the second transistor is connected to the drain of the first transistor, and the source of the second transistor is connected to a ground terminal or a low supply voltage.

Abstract: A loop-type heat exchange device (10) includes an evaporator (20), a vapor conduit (30), a condenser (50) and a liquid conduit (70). The evaporator contains therein a working fluid. The working fluid turns into vapor in the evaporator upon receiving heat from a heat-generating component. The condenser includes a housing member (52), a plurality of tube members (53) being in fluid communication with the housing member, and a fin member (54) maintained in thermal contact with the tube members. The vapor conduit and the liquid conduit are each connected between the evaporator and the condenser. The vapor conduit conveys the vapor generated in the evaporator to the tube members of the condenser. The vapor turns into condensate in the tube members upon releasing the heat to the fin member. The condensate is conveyed back to the evaporator by the liquid conduit.

Abstract: A heat exchange module (1) includes a fan duct, an evaporator (22), a condenser (26) and an electric fan (50). The fan duct includes a lower portion (10) and an upper portion (30). The lower portion cooperates with the upper portion to define therebetween an air passage (90). The evaporator contains therein a working fluid. The condenser is in fluid communication with the evaporator. The evaporator and the condenser are received in the air passage defined by the fan duct. The working fluid turns into vapor in the evaporator upon receiving heat from a heat-generating component (70) and the vapor turns into condensate upon releasing the heat to the condenser. The electric fan is attached to the fan duct. The electric fan produces an airflow flowing through the air passage for removing the heat away from the condenser.

Abstract: A LED circuit comprises: an inductor, a group of LEDs, a capacitor, a power MOS and a switching circuit. The inductor is connected to a voltage supply and a first node; the group of LEDs is connected to the first node and a ground potential; the capacitor is connected to the first node and a ground potential; the power MOS is connected to the first node and a ground potential, wherein the gate of the power MOS receives a switching signal such that the capacitor is charged when the power MOS is turn on to further turn on the LEDs and the capacitor is discharged when the power MOS is turn off to turn off the LEDs. The switching circuit is to generate the switching signal.

Abstract: The present invention relates to a polynucleic acid composition comprising or consisting of at least one polynucleic acid containing 8 or more contiguous nucleotides corresponding to a nucleotide sequence from the region spanning positions 417 to 957 of the Core/E1 region of HCV type 3; and/or the region spanning positions 4664 to 4730 of the NS3 region of HCV type 3; and/or the region spanning positions 4892 to 5292 of the NS3/4 region of HCV type 3; and/or the region spanning positions 8023 to 8235 of the NS5 region of the BR36 subgroup of HCV type 3a; and/or the coding region of HCV type 4a starting at nucleotide 379 in the core region; and/or the coding region of HCV type 4; and/or the coding region of HCV type 5, with said nucleotide numbering being with respect to the numbering of HCV nucleic acids as shown in Table 1, and with said polynucleic acids containing at least one nucleotide difference with known HCV type 1, and/or HCV type 2 genomes in the above-indicated regions, or the complement thereof.