Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.

Abstract: A semiconductor device including: a first formation site and a second formation site for forming a first conductive bump and a second conductive bump; when a first environmental density corresponding to the first formation site is greater than a second environmental density corresponding to the second formation site, a cross sectional area of the second formation site is greater than a cross sectional area of the first formation site; wherein the first environmental density is determined by a number of formation sites around the first formation site in a predetermined range and the second environmental density is determined by a number of formation sites around the second formation site in the predetermined range; wherein a first area having the first environmental density forms an ellipse layout while a second area having the second environmental density forms a strip layout surrounding the ellipse layout.

Abstract: A display window and a vehicle are provided. The display window includes window glass and at least one projection device. The at least one projection device is configured to generate at least one beam of projection light, and correspondingly project the at least one beam of projection light onto at least one projection region of the window glass to correspondingly form at least one projection image. At least 90% of each of the at least one beam of projection light is S-polarized light. The at least one beam of projection light includes first projection light. The at least one projection region includes a first projection region. The first projection region has a first reflectivity of at least 25% for the first projection light projected at the first angle of incidence.

Abstract: A method of manufacturing a light-emitting device, including: providing a substrate structure including a top surface; forming a precursor layer on the top surface; removing a portion of the precursor layer and a portion of the substrate from the top surface to form a base portion and a plurality of protrusions regularly arranged on the base portion; forming a buffer layer on the base portion and the plurality protrusions; and forming a III-V compound cap layer on the buffer layer; wherein one of the plurality of protrusions comprises a first portion and a second portion formed on the first portion; wherein the first portion is integrated with the base portion and has a first material which is the same as that of the base portion; and wherein the buffer layer contacts side surfaces of the plurality of protrusions and a surface of the base portion.

Abstract: A method is provided. The method includes determining a first bump map indicative of a first set of positions of bumps. The method includes determining, based upon the first bump map, a first plurality of bump densities associated with a plurality of regions of the first bump map. The method includes smoothing the first plurality of bump densities to determine a second plurality of bump densities associated with the plurality of regions of the first bump map. The method includes determining, based upon the second plurality of bump densities, a second bump map indicative of the first set of positions of the bumps and a set of sizes of the bumps.

Abstract: An energy Internet system, an energy routing conversion device, and an energy control method, relating to a field of energy information. An alternating-current (AC) side energy routing conversion device of the energy Internet system includes a plurality of first route ports, and a direct-current (DC) side energy routing conversion device includes a plurality of second route ports, where each second route port is connected to a corresponding first route port by means of a corresponding DC busbar. A plurality of energy devices are connected to a DC busbar by means of corresponding first AC/DC converters or first DC converters. The AC side energy routing conversion device and the DC side energy routing conversion device collect energy information of the energy devices and adjust energy of the energy devices on a basis of energy balance constraint conditions.

Abstract: Provided is a method for simultaneous detection of parameters of membrane electrode assemblies of a fuel cell stack, which includes: supplying hydrogen to an anode of the fuel cell stack and inert gas to a cathode of the fuel cell stack, controlling operating conditions of the fuel cell stack at respective preset values; applying different voltage excitations or micro-current excitations to the fuel cell stack, collecting a current signal of an entire stack and a voltage signal of each fuel cell; and analyzing a hydrogen crossover current, a catalyst electrochemical surface area, a double-layer capacitance, and a short-circuit resistance of a membrane electrode assembly of each fuel cell based on an excitation-response formula of a fuel cell. The present disclosure does not limit a form of a current or voltage excitation, thereby improving accuracy of a parameter test of a membrane electrode assembly while reducing the test cost.

Abstract: The present invention provides a power conversion method, apparatus, and device, and a medium. The power conversion apparatus comprises: a configurable input interface, a power conversion circuit, and a configurable output interface. The configurable input interface is provided to configure a first electrical connection mode between an input power supply and the power conversion circuit, and to electrically connect the input power supply to the power conversion circuit. The configurable output interface is provided to configure a second electrical connection mode between a load and the power conversion circuit, and to electrically connect the load to the power conversion circuit. The power conversion circuit is provided to perform corresponding power conversion according to a parameter of the input power supply and a parameter of the load.

Abstract: A data archiving method includes: finding, in local space when an archiving task for a target block header exists, current state trees of block headers, the current state trees including a current state tree that the target block header points to and a current state tree that a first block header before the target block header points to; reconstructing new state trees according to the found current state trees, node reuse information between the current state trees, and target state data corresponding to a second block header after the target block header; and archiving the current state trees stored in the local space to a target archiving server, and deleting the current state trees in the local space after successful archiving.

Abstract: A display panel and a drive circuit of the same are provided. The drive circuit includes multiple drive circuit rows. Each of the drive circuit rows includes multiple pixel drive circuits and a signal processing circuit. According to the drive circuit, a signal processing circuit can obtain a drive signal by processing a scan signal and a light-emitting control signal of a drive circuit row to which the signal processing circuit belongs, and can output the drive signal to each pixel drive circuit in the drive circuit row to which the signal processing circuit belongs; a pixel drive circuit can form a capacitor-reset loop by multiplexing a first switch tube in a light-emitting element reset loop of the pixel drive circuit, a second switch tube in a data-writing loop of the pixel drive circuit, and a third switch tube in a light-emitting loop of the pixel drive circuit.

Abstract: A display panel and a drive circuit of the same are provided. The drive circuit includes multiple drive circuit rows. Each of the drive circuit rows includes multiple pixel drive circuits and a signal processing circuit. According to the drive circuit, a signal processing circuit can obtain a drive signal by processing a scan signal and a light-emitting control signal of a drive circuit row to which the signal processing circuit belongs, and can output the drive signal to each pixel drive circuit in the drive circuit row to which the signal processing circuit belongs; a pixel drive circuit can form a capacitor-reset loop by multiplexing a first switch tube in a light-emitting element reset loop of the pixel drive circuit, a second switch tube in a data-writing loop of the pixel drive circuit, and a third switch tube in a light-emitting loop of the pixel drive circuit.

Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.

Abstract: A method of analyzing a semiconductor wafer includes obtaining a graphic data system (GDS) file corresponding to the semiconductor wafer, using GDS information from the GDS file to provide coordinates of a layout feature of the semiconductor wafer to an electron microscope, using the electron microscope to capture a raw image from the semiconductor wafer based on the coordinates of the layout feature, and performing a measurement operation on the raw image.

Abstract: A transaction transmitted by a user node in a blockchain network and transaction verification information corresponding to the to-be-verified transaction are acquired. The transaction verification information includes a state read set, a state write set, an initial transaction execution result, and a block identifier of a target block. A first block header of the target block includes the block identifier. A second block header is determined from a block header chain of a light node in the blockchain network. The state read set and the state write set are checked based on a first state snapshot in the second block header. The transaction service is executed to obtain a target transaction execution result corresponding to the transaction service and to-be-written state data. Legitimacy of the to-be-verified transaction is checked based on the initial transaction execution result, the target transaction execution result, the state write set, and the to-be-written state data.

Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.

Abstract: The present disclosure provides a method and a system for automatically configuring an I/O port. The method applied to a central processor includes: receiving request information from a controlled device, the request information carrying a type of a signal required by the controlled device, and sending, according to the type of the signal, a configuration instruction to a control device, and instructing the control device to configure the I/O port according to the configuration instruction. The controlled device is connected to the central processing unit, or the controlled device is connected to the central processor by means of the control device.

Abstract: A semiconductor device including: a first formation site and a second formation site for forming a first conductive bump and a second conductive bump; when a first environmental density corresponding to the first formation site is greater than a second environmental density corresponding to the second formation site, a cross sectional area of the second formation site is greater than a cross sectional area of the first formation site; wherein the first environmental density is determined by a number of formation sites around the first formation site in a predetermined range and the second environmental density is determined by a number of formation sites around the second formation site in the predetermined range; wherein a first area having the first environmental density forms an ellipse layout while a second area having the second environmental density forms a strip layout surrounding the ellipse layout.

Abstract: A control method for a direct current electrical device and a direct current electrical device. The method includes: acquiring input parameters of a power supply of the direct current electrical device, identifying a type of the power supply according to the input parameters, and determining an operation mode of the direct current electrical device corresponding to the type of the power supply, and controlling an operation of the direct current electrical device according to the operation mode.

Abstract: A method of manufacturing a light-emitting device, including: providing a substrate structure including a base portion and wherein the base portion includes a surface; performing a patterning step to form a plurality of protrusions, wherein the plurality of protrusions are arranged on the surface of the base portion; forming a buffer layer on the surface of the base portion by physical vapor deposition, wherein the buffer layer covers the protrusions; and forming III-V compound semiconductor layers on the buffer layer; wherein one of the plurality of protrusions has a height not greater than 1.5 ?m; and wherein the light-emitting device has a full width at half maximum (FWHM) of smaller than 250 arcsec in accordance with a (102) XRD rocking curve.