Abstract: The present disclosure relates to a spike event decision-making device, method, chip, and electronic device to eliminate inherent delays of an output spike event of the neuromorphic chip when reading decisions. The spike event decision-making device includes a first counting module configured to count a number of input spike events of the spiking neural network, a second counting module configured to count some or all of the output spike events of the spiking neural network; and a decision-making module configured to generate a decision-making result according to numbers of spike events fired by neurons in an output layer of the spiking neural network when the number counted by the first counting module reaches a first predetermined value, or when the total count counted by the second counting module reaches a second predetermined value.

Abstract: The present application provides a cathode plate, a secondary battery, a battery module, a battery pack, and an electric device. The cathode plate includes: a current collector, a conductive coating, and a cathode active layer. The conductive coating is arranged on at least one surface of the current collector. The conductive coating includes a conductive agent having a weight content of 20% to 50% and a binder having a weight content of 50%˜80%. The cathode active layer is arranged on a surface of the conductive coating away from the current collector, and a cathode active material in the cathode active layer is at least one of a lithium manganate-based cathode material, a ternary cathode material, and a quaternary cathode material.

Abstract: Provided are a response receiving and sending method, a retransmission method, a communication device, and a storage medium. The method includes: sending a transport block to a first communication device through a pre-configured period resource, and receiving a correct response corresponding to the transport block on a pre-configured correct response resource.

Abstract: The invention discloses a method, a system, a device, and a medium for detecting a battery state of health. The method includes extracting a target curve segment from a first charging characteristic curve of a battery under test; and determining, according to a corresponding relation between characteristic parameters of the target curve segment and the battery state of health, the battery state of health matching the characteristic parameters of the target curve segment, and determining the battery state of health as the battery state of health of the battery under test. By utilizing said corresponding relation as the calculation basis, the invention improves the reliability and accuracy of the detection of battery state of health detection. The invention also tracks instances of abusive conditions that accelerate battery aging, assessing whether such conditions accelerate battery degradation and issuing warnings accordingly.

Abstract: The invention discloses a method, a system, an electronic device, and a storage medium for determining performance of a power battery. The method includes the following steps: acquiring historical data of the power battery in at least two charging processes; determining, according to historical data in one charging process, a dQ/dV curve and a direct current internal resistance corresponding to said charging process; calculating a relative change rate of internal resistance capacity in any two charging processes; and determining the performance of the power battery according to the relative change rate of internal resistance capacity and a relative change rate of internal resistance capacity range corresponding to fault type. The invention can effectively determine whether the performance of the power battery is abnormal by combining, in the two charging processes, the target peak value of a dQ/dV curve of the power battery and the change in direct current internal resistance.

Abstract: The present invention provides a power conversion method, apparatus, and device, and a medium. The power conversion apparatus comprises: a configurable input interface, a power conversion circuit, and a configurable output interface. The configurable input interface is provided to configure a first electrical connection mode between an input power supply and the power conversion circuit, and to electrically connect the input power supply to the power conversion circuit. The configurable output interface is provided to configure a second electrical connection mode between a load and the power conversion circuit, and to electrically connect the load to the power conversion circuit. The power conversion circuit is provided to perform corresponding power conversion according to a parameter of the input power supply and a parameter of the load.

Abstract: A data archiving method includes: finding, in local space when an archiving task for a target block header exists, current state trees of block headers, the current state trees including a current state tree that the target block header points to and a current state tree that a first block header before the target block header points to; reconstructing new state trees according to the found current state trees, node reuse information between the current state trees, and target state data corresponding to a second block header after the target block header; and archiving the current state trees stored in the local space to a target archiving server, and deleting the current state trees in the local space after successful archiving.

Abstract: A display panel and a drive circuit of the same are provided. The drive circuit includes multiple drive circuit rows. Each of the drive circuit rows includes multiple pixel drive circuits and a signal processing circuit. According to the drive circuit, a signal processing circuit can obtain a drive signal by processing a scan signal and a light-emitting control signal of a drive circuit row to which the signal processing circuit belongs, and can output the drive signal to each pixel drive circuit in the drive circuit row to which the signal processing circuit belongs; a pixel drive circuit can form a capacitor-reset loop by multiplexing a first switch tube in a light-emitting element reset loop of the pixel drive circuit, a second switch tube in a data-writing loop of the pixel drive circuit, and a third switch tube in a light-emitting loop of the pixel drive circuit.

Abstract: A display panel and a drive circuit of the same are provided. The drive circuit includes multiple drive circuit rows. Each of the drive circuit rows includes multiple pixel drive circuits and a signal processing circuit. According to the drive circuit, a signal processing circuit can obtain a drive signal by processing a scan signal and a light-emitting control signal of a drive circuit row to which the signal processing circuit belongs, and can output the drive signal to each pixel drive circuit in the drive circuit row to which the signal processing circuit belongs; a pixel drive circuit can form a capacitor-reset loop by multiplexing a first switch tube in a light-emitting element reset loop of the pixel drive circuit, a second switch tube in a data-writing loop of the pixel drive circuit, and a third switch tube in a light-emitting loop of the pixel drive circuit.

Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.

Abstract: A method of analyzing a semiconductor wafer includes obtaining a graphic data system (GDS) file corresponding to the semiconductor wafer, using GDS information from the GDS file to provide coordinates of a layout feature of the semiconductor wafer to an electron microscope, using the electron microscope to capture a raw image from the semiconductor wafer based on the coordinates of the layout feature, and performing a measurement operation on the raw image.

Abstract: A transaction transmitted by a user node in a blockchain network and transaction verification information corresponding to the to-be-verified transaction are acquired. The transaction verification information includes a state read set, a state write set, an initial transaction execution result, and a block identifier of a target block. A first block header of the target block includes the block identifier. A second block header is determined from a block header chain of a light node in the blockchain network. The state read set and the state write set are checked based on a first state snapshot in the second block header. The transaction service is executed to obtain a target transaction execution result corresponding to the transaction service and to-be-written state data. Legitimacy of the to-be-verified transaction is checked based on the initial transaction execution result, the target transaction execution result, the state write set, and the to-be-written state data.

Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.

Abstract: The present disclosure provides a method and a system for automatically configuring an I/O port. The method applied to a central processor includes: receiving request information from a controlled device, the request information carrying a type of a signal required by the controlled device, and sending, according to the type of the signal, a configuration instruction to a control device, and instructing the control device to configure the I/O port according to the configuration instruction. The controlled device is connected to the central processing unit, or the controlled device is connected to the central processor by means of the control device.

Abstract: A semiconductor device including: a first formation site and a second formation site for forming a first conductive bump and a second conductive bump; when a first environmental density corresponding to the first formation site is greater than a second environmental density corresponding to the second formation site, a cross sectional area of the second formation site is greater than a cross sectional area of the first formation site; wherein the first environmental density is determined by a number of formation sites around the first formation site in a predetermined range and the second environmental density is determined by a number of formation sites around the second formation site in the predetermined range; wherein a first area having the first environmental density forms an ellipse layout while a second area having the second environmental density forms a strip layout surrounding the ellipse layout.

Abstract: A control method for a direct current electrical device and a direct current electrical device. The method includes: acquiring input parameters of a power supply of the direct current electrical device, identifying a type of the power supply according to the input parameters, and determining an operation mode of the direct current electrical device corresponding to the type of the power supply, and controlling an operation of the direct current electrical device according to the operation mode.

Abstract: A method of manufacturing a light-emitting device, including: providing a substrate structure including a base portion and wherein the base portion includes a surface; performing a patterning step to form a plurality of protrusions, wherein the plurality of protrusions are arranged on the surface of the base portion; forming a buffer layer on the surface of the base portion by physical vapor deposition, wherein the buffer layer covers the protrusions; and forming III-V compound semiconductor layers on the buffer layer; wherein one of the plurality of protrusions has a height not greater than 1.5 ?m; and wherein the light-emitting device has a full width at half maximum (FWHM) of smaller than 250 arcsec in accordance with a (102) XRD rocking curve.

Abstract: A semiconductor device manufacturing method including: simultaneously forming a plurality of conductive bumps respectively on a plurality of formation sites by adjusting a forming factor in accordance with an environmental density associated with each formation site; wherein the plurality of conductive bumps including an inter-bump height uniformity smaller than a value, and the environmental density is determined by a number of neighboring formation sites around each formation site in a predetermined range.

Abstract: Provided is a method for simultaneous detection of parameters of membrane electrode assemblies of a fuel cell stack, which includes: supplying hydrogen to an anode of the fuel cell stack and inert gas to a cathode of the fuel cell stack, controlling operating conditions of the fuel cell stack at respective preset values; applying different voltage excitations or micro-current excitations to the fuel cell stack, collecting a current signal of an entire stack and a voltage signal of each fuel cell; and analyzing a hydrogen crossover current, a catalyst electrochemical surface area, a double-layer capacitance, and a short-circuit resistance of a membrane electrode assembly of each fuel cell based on an excitation-response formula of a fuel cell. The present disclosure does not limit a form of a current or voltage excitation, thereby improving accuracy of a parameter test of a membrane electrode assembly while reducing the test cost.