Abstract: Image data for a current image frame may be compensated for transient response variations due to changes to pixel values from one frame to another over time by performing pixel drive compensation. The pixel drive compensation may be performed using a current pixel value and a historical pixel value. The historical pixel value may be the same as a pixel value in the directly previous frame in some conditions, while in other conditions the historical pixel value may be modified from a previous image frame in light of a prior pixel value occurring before the previous image frame. In this way, drive compensation corresponding to image data of a subsequent image frame may be determined based at least in part on a multi-frame history. Even so, the memory bandwidth and/or power consumed to use a multi-frame history to determine a drive compensation may be reduced.

Abstract: In some embodiments, a system includes a memory system, a real-time computing device, and a controller. The real-time computing device stores data within a local buffer having a corresponding storage threshold, where the data satisfies the storage threshold, and where the storage threshold is based on a latency of the memory system and an expected rate of utilization of the data of the local buffer. The controller detects that the memory system should perform an operation, where the memory system is unavailable to the real-time computing device during the operation. In response to detecting that an amount of time for the operation exceeds an amount of time corresponding to the storage threshold, the controller overrides the storage threshold. The controller may override the storage threshold by modifying the storage threshold and by overriding a default priority for access requests of the real-time computing device to the memory system.

Abstract: In an embodiment, an integrated circuit includes one or more GPIO pins coupled to a GPIO block in the integrated circuit. At least a first GPIO pin may include corresponding logic circuitry that may be programmed to apply one or more requirements to changes of the digital value received on the first GPIO pin before the change is forwarded to a destination within the integrated circuit. That is, if the requirements are not met for a given change, the logic circuitry may suppress the given change so that it is not provided to other circuits internal to the integrated circuit (e.g. the destination circuit that receives communication via the GPIO pins). The one or more requirements may be a form of hysteresis, for example.

Abstract: Devices and methods for underrun compensation are provided. By way of example, a technique for underrun compensation includes determining a particular one of a plurality of pixel configurations for a display. When an underrun condition is detected during processing of first image data via an image processing pipeline, at least a portion of requested image data for downstream processing has not yet been provided by an upstream processing component. Accordingly, upon detecting an underrun condition, underrun pixel data for the at least portion of the requested image data is generated, based upon the particular one of the plurality of pixel configurations.

Abstract: An electronic device may include a display panel and an image data source designed to determine a differing region in the image frame by comparing source image data and image data corresponding with a previous image frame. The electronic device may also include a display pipeline between the image data source and the display panel. The display pipeline may include image processing circuitry to convert image data from a source space to a display space and image processing circuitry to spatially process the image data. The display pipeline may determine a crop region by converting the differing region to the display space and determine a partial frame region, based on the image data to be spatially processed, by the image processing circuitry. The display pipeline may also determine and retrieve a fetch region smaller than the image frame by converting the partial frame region to the source space.

Abstract: Display pipeline may manage allocation of total memory bandwidth to memory access requester blocks (e.g., display pipeline as a whole and/or a block in the display pipeline) by dynamically allocating the total memory bandwidth based at least in part on a calculated bandwidth floor to reduce the communication inefficiency (e.g., underruns), excessive power consumption, and image quality degradation of the display pipeline. Image fetch parameters, electronic display parameters, display pipeline parameters, and memory access requester block parameters may be used to determine the appropriate bandwidth floor for each memory access requester of the display pipeline. Additional memory bandwidth may be allocated to memory access requesters of the display pipeline when available bandwidth remains to further reduce likelihood of subsequent communication inefficiencies in the display pipeline.

Abstract: An electronic device is provided. The electronic device includes a display that is configured to show content that includes a plurality of frames. The plurality of frames includes a first frame that is associated with a pre-transition value. The plurality of frames also includes a second frame that is associated with a current frame value that corresponds to a first luminance. Additionally, the electronic device is configured to determine an overdriven current frame value corresponding to a second luminance that is greater than the first luminance. The electronic device is also configured to display the second frame using the overdriven current frame value.

Abstract: An electronic device is provided. The electronic device includes a display that is configured to show content that includes a plurality of frames. The plurality of frames includes a first frame that is associated with a pre-transition value. The plurality of frames also includes a second frame that is associated with a current frame value that corresponds to a first luminance. Additionally, the electronic device is configured to determine an overdriven current frame value corresponding to a second luminance that is greater than the first luminance. The electronic device is also configured to display the second frame using the overdriven current frame value.

Abstract: An electronic device may include a display panel to display an image and a display pipeline to process image data for the image. The display pipeline may include a controller to determine a first potential presentation time based on a maximum refresh rate of the display panel. The controller may also determine if a second target presentation time of a second image is equal to the first potential presentation time before a pipeline configuration time, and if the second target presentation time of the second image is equal to a second potential presentation time that occurs after the first potential presentation time and before a first pre-notification time occurring before the pipeline configuration time. The controller may output a first pre-notification signal at the first pre-notification time that instructs the display panel to pause self-refreshes until after the second image is displayed.

Abstract: An electronic device may include a display panel and an image data source designed to determine a differing region in the image frame by comparing source image data and image data corresponding with a previous image frame. The electronic device may also include a display pipeline between the image data source and the display panel. The display pipeline may include image processing circuitry to convert image data from a source space to a display space and image processing circuitry to spatially process the image data. The display pipeline may determine a crop region by converting the differing region to the display space and determine a partial frame region, based on the image data to be spatially processed, by the image processing circuitry. The display pipeline may also determine and retrieve a fetch region smaller than the image frame by converting the partial frame region to the source space.

Abstract: An electronic device may include a display panel to display an image and a display pipeline to process image data for the image. The display pipeline may include a controller to determine a first potential presentation time based on a maximum refresh rate of the display panel. The controller may also determine if a second target presentation time of a second image is equal to the first potential presentation time before a pipeline configuration time, and if the second target presentation time of the second image is equal to a second potential presentation time that occurs after the first potential presentation time and before a first pre-notification time occurring before the pipeline configuration time. The controller may output a first pre-notification signal at the first pre-notification time that instructs the display panel to pause self-refreshes until after the second image is displayed.

Abstract: An electronic device may include a display panel to display images based on corresponding image data and an image source to pre-render a flip-book including a first image frame for display at a first target presentation time and a second image frame for display at a second target presentation time. The electronic device may also include a display pipeline coupled between the display panel and the image source having image data processing circuitry to process image data for display. The electronic device may also include a controller to instruct the display pipeline to process image data, to determine a power-on time based on a target presentation time, and to instruct the display pipeline to power-gate the image data processing circuitry upon completion of the processing of image data and until the power-on time is reached.

Abstract: Display pipeline may manage allocation of total memory bandwidth to memory access requester blocks (e.g., display pipeline as a whole and/or a block in the display pipeline) by dynamically allocating the total memory bandwidth based at least in part on a calculated bandwidth floor to reduce the communication inefficiency (e.g., underruns), excessive power consumption, and image quality degradation of the display pipeline. Image fetch parameters, electronic display parameters, display pipeline parameters, and memory access requester block parameters may be used to determine the appropriate bandwidth floor for each memory access requester of the display pipeline. Additional memory bandwidth may be allocated to memory access requesters of the display pipeline when available bandwidth remains to further reduce likelihood of subsequent communication inefficiencies in the display pipeline.

Abstract: The configuration buffer may be divided into partitions that may effectively function as multiple linked configuration buffers. The linked partitions may each be associated with a portion of the display pipeline (e.g., an image process block) and may each be responsible for loading configuration entries into the programmable register(s) of a portion of the display pipeline. In this manner, the partitions may load the associated programmable register(s) of the display pipeline substantially simultaneously, reducing the time used to configure the entire display pipeline. Since configuration of the display pipeline may occur during the blanking period, a reduction in display pipeline configuration time may reduce the blanking period and increase the time for driving pixels of the display, thereby improving perceived image quality (e.g., pixel yield of the display panel).

Abstract: Systems, apparatuses, and methods for aggregating memory requests with opportunism in a display pipeline. Memory requests are aggregated for each requestor of a plurality of requestors in the display pipeline. When the number of memory requests for a given requestor reaches a corresponding threshold, memory requests may be issued for the given requestor. In response to determining the given requestor has reached its threshold, other requestors may issue memory requests even if they have not yet aggregated enough memory requests to reach their corresponding thresholds.

Abstract: Systems and methods for improving operation of an electronic device, which includes an image data processing pipeline that processes input image data. In the processing pipeline, a first processing block generates first processed image data by performing a first function on the input image data; another one or more processing blocks, which includes a second processing block coupled to a first output of the first processing block, generates second processed image data by performing a second function on the first processed image data when received from the first processing block; and a third processing block coupled to the first output and a second output of the other one or more processing blocks performs a third function on the first processed image data when received from the first processing block and performs the third function on the second processed image data when received from the other one or more processing blocks.

Abstract: An electronic device may include a display panel and an image data source designed to determine a differing region in the image frame by comparing source image data and image data corresponding with a previous image frame. The electronic device may also include a display pipeline between the image data source and the display panel. The display pipeline may include image processing circuitry to convert image data from a source space to a display space and image processing circuitry to spatially process the image data. The display pipeline may determine a crop region by converting the differing region to the display space and determine a partial frame region, based on the image data to be spatially processed, by the image processing circuitry. The display pipeline may also determine and retrieve a fetch region smaller than the image frame by converting the partial frame region to the source space.

Abstract: Devices and methods for underrun compensation are provided. By way of example, a technique for underrun compensation includes determining a particular one of a plurality of pixel configurations for a display. When an underrun condition is detected during processing of first image data via an image processing pipeline, at least a portion of requested image data for downstream processing has not yet been provided by an upstream processing component. Accordingly, upon detecting an underrun condition, underrun pixel data for the at least portion of the requested image data is generated, based upon the particular one of the plurality of pixel configurations.

Abstract: Devices and methods for underrun compensation are provided. By way of example, a technique for underrun compensation includes determining a particular one of a plurality of pixel configurations for a display. When an underrun condition is detected during processing of first image data via an image processing pipeline, at least a portion of requested image data for downstream processing has not yet been provided by an upstream processing component. Accordingly, upon detecting an underrun condition, underrun pixel data for the at least portion of the requested image data is generated, based upon the particular one of the plurality of pixel configurations.

Abstract: An electronic device is provided. The electronic device includes a display that is configured to show content that includes a plurality of frames. The plurality of frames includes a first frame that is associated with a pre-transition value. The plurality of frames also includes a second frame that is associated with a current frame value that corresponds to a first luminance. Additionally, the electronic device is configured to determine an overdriven current frame value corresponding to a second luminance that is greater than the first luminance. The electronic device is also configured to display the second frame using the overdriven current frame value.