Patents by Inventor Peter G. Borden
Peter G. Borden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9033534Abstract: Described herein are hands-free vision aids that may be used for low-vision reading. These vision aids may be beneficial for individuals with low-vision disorders such as age-related macular degeneration, retinitis pigmentosa, and other visual disorders. The vision aids described here comprise an optical system with one or more light sources configured to provide a rectangular field of illumination with high illuminance levels bounded by high contrast perimeter. Such an illumination field greatly illuminates a targeted viewing region while reducing glare that arises from illuminating peripheral regions. Some vision aids use green light with high illuminance values for improving visual acuity and comfort for long-duration reading. The optical system of a vision aid may be configured to fit onto and/or integrate with eyeglass frames.Type: GrantFiled: March 1, 2012Date of Patent: May 19, 2015Assignee: Jasper Ridge Inc.Inventors: Peter G. Borden, Peter H. Muller
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Publication number: 20130063929Abstract: Described herein are hands-free vision aids that may be used for low-vision reading. These vision aids may be beneficial for individuals with low-vision disorders such as age-related macular degeneration, retinitis pigmentosa, and other visual disorders. The vision aids described here comprise an optical system with one or more light sources configured to provide a rectangular field of illumination with high illuminance levels bounded by high contrast perimeter. Such an illumination field greatly illuminates a targeted viewing region while reducing glare that arises from illuminating peripheral regions. Some vision aids use green light with high illuminance values for improving visual acuity and comfort for long-duration reading. The optical system of a vision aid may be configured to fit onto and/or integrate with eyeglass frames.Type: ApplicationFiled: March 1, 2012Publication date: March 14, 2013Applicant: Jasper Ridge Inc.Inventors: Peter G. Borden, Peter H. Muller
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Patent number: 8338220Abstract: Embodiments of the invention are directed to methods and apparatus for processing of a solar substrate for making a photovoltaic device. In particular, methods and apparatus for creating a negatively charged passivation layer by are provided.Type: GrantFiled: February 6, 2009Date of Patent: December 25, 2012Assignee: Applied Materials, Inc.Inventors: Peter G. Borden, Christopher Sean Olsen
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Patent number: 8309374Abstract: The present invention generally provides a batch substrate processing system, or cluster tool, for in-situ processing of a film stack used to form regions of a solar cell device. In one configuration, the film stack formed on each of the substrates in the batch contains one or more silicon-containing layers and one or more metal layers that are deposited and further processed within the various chambers contained in the substrate processing system. In one embodiment, a batch of solar cell substrates is simultaneously transferred in a vacuum or inert environment to prevent contamination from affecting the solar cell formation process.Type: GrantFiled: October 7, 2009Date of Patent: November 13, 2012Assignee: Applied Materials, Inc.Inventors: Keith Brian Porthouse, Peter G. Borden, Tristan R. Holtam, Lisong Zhou, Ian Scott Latchford, Derek Aqui, Vinay K. Shah
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Patent number: 8246284Abstract: An apparatus with a plurality of load-lock chambers stacked having independently controlled pressures within their interior regions is provided. According to one or more embodiments, each load-lock chamber includes a pump valve connected to a pump line and a vent valve connected to a vent line to independently control the changes of pressure within the interior regions of the chambers. Methods for conveying substrates held within these chambers from the apparatus to one or more processing chambers, which may be in-line, are also provided.Type: GrantFiled: March 5, 2009Date of Patent: August 21, 2012Assignee: Applied Materials, Inc.Inventor: Peter G. Borden
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Publication number: 20110162706Abstract: A method for manufacturing a polysilicon emitter solar cell with a passivating layer over its polysilicon emitter layer is disclosed. The method includes steps of preparing a substrate, forming a first polysilicon layer over the substrate, and forming a first passivating layer over the first polysilicon layer. Another embodiment of the present invention discloses a solar cell apparatus. The solar cell apparatus includes a substrate, a first polysilicon layer over the substrate, and a first passivating layer on first polysilicon layer.Type: ApplicationFiled: January 3, 2011Publication date: July 7, 2011Applicant: APPLIED MATERIALS, INC.Inventors: Peter G. Borden, Li Xu, Tristan R. Holtam, Vinay K. Shah
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Publication number: 20100326797Abstract: A carrier for transporting a plurality of solar cell substrates comprising a peripheral frame defined by a pair of side members connected by first and second complementary end members, a plurality of cross struts, a plurality of standoffs for supporting the substrates, and at least one drive member coupled to one of the end members. The end members have alternating bends that provide a wave-like pattern of projections and indentations, are arranged in a spaced and substantially parallel orientation, and are constructed from metal wire. Each cross strut is connected to the first end member and the second end member between complementary projections and indentations. Rotation of the drive member causes both end members to rotate in a circular motion.Type: ApplicationFiled: April 23, 2010Publication date: December 30, 2010Applicant: Applied Materials, Inc.Inventor: Peter G. Borden
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Publication number: 20100226736Abstract: An apparatus with a plurality of load-lock chambers stacked having independently controlled pressures within their interior regions is provided. According to one or more embodiments, each load-lock chamber includes a pump valve connected to a pump line and a vent valve connected to a vent line to independently control the changes of pressure within the interior regions of the chambers. Methods for conveying substrates held within these chambers from the apparatus to one or more processing chambers, which may be in-line, are also provided.Type: ApplicationFiled: March 5, 2009Publication date: September 9, 2010Applicant: Applied Materials, Inc.Inventor: Peter G. Borden
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Publication number: 20100203742Abstract: Embodiments of the invention are directed to methods and apparatus for processing of a solar substrate for making a photovoltaic device. In particular, methods and apparatus for creating a negatively charged passivation layer by are provided.Type: ApplicationFiled: February 6, 2009Publication date: August 12, 2010Applicant: Applied Materials, Inc.Inventors: Peter G. Borden, Christopher Sean Olsen
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Patent number: 7773211Abstract: A method and system as described herein provides for detecting certain anomalies in a wafer. According to one aspect, these anomalies relate to defects or stress that can lead to wafer breakage before, during or after further wafer processing. According to other aspects, the method includes passing polarized light through a wafer and analyzing the transmitted light for any changes in polarization. According to additional aspects, the method includes analyzing the entire wafer in one image capturing operation. According to still further aspects, the light passed through the wafer is below the bandgap for a material such as silicon that comprises the wafer, so that substantially all light will be transmitted through rather than absorbed or reflected by the material. According to still further aspects, the detection operation can be rapid and automatic, so that it can be easily included in an overall processing sequence.Type: GrantFiled: April 2, 2007Date of Patent: August 10, 2010Assignee: Applied Materials, Inc.Inventor: Peter G. Borden
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Publication number: 20100132774Abstract: Photovoltaic devices and methods of manufacture are provided. In an embodiment, the devices comprise a micro-crystal silicon cell having an amorphous silicon layer formed on the micro-crystal cell.Type: ApplicationFiled: December 11, 2008Publication date: June 3, 2010Applicant: Applied Materials, Inc.Inventor: Peter G. Borden
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Publication number: 20100087028Abstract: The present invention generally provides a batch substrate processing system, or cluster tool, for in-situ processing of a film stack used to form regions of a solar cell device. In one configuration, the film stack formed on each of the substrates in the batch contains one or more silicon-containing layers and one or more metal layers that are deposited and further processed within the various chambers contained in the substrate processing system.Type: ApplicationFiled: October 7, 2009Publication date: April 8, 2010Applicant: APPLIED MATERIALS, INC.Inventors: Keith Brian Porthouse, Peter G. Borden, Tristan R. Holtam, Lisong Zhou, Ian Scott Latchford, Derek Aqui, Vinay K. Shah
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Publication number: 20090314341Abstract: The present invention relates to forming contacts for solar cells. According to one aspect, an interdigitated back contact (IBC) cell design according to the invention requires only one patterning step to form the interdigitated junctions (vs. two for alternate designs). According to another aspect, the back contact structure includes a silicon nitride or a nitrided tunnel dielectric. This acts as a diffusion barrier, so that the properties of the tunnel dielectric can be maintained during a high temperature process step, and boron diffusion through the tunnel dielectric can be prevented. According to another aspect, the process for forming the back contacts requires no deep drive-in diffusions.Type: ApplicationFiled: April 9, 2009Publication date: December 24, 2009Inventors: Peter G. BORDEN, Li Xu
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Publication number: 20090288704Abstract: The present invention relates to polysilicon emitter solar cells, and more particularly to polysilicon emitter solar cells with hyperabrupt junctions, and methods for making such solar cells. According to one aspect, a polysilicon emitter solar cell according to the invention includes a nitrided tunnel insulator. The nitridation prevents boron diffusion, enabling a hyperabrupt junction for a p-poly on n-Si device. According to another aspect, a nitrided oxide (DPN) is used in a tunnel oxide layer of a MIS solar cell structure. The DPN layer minimizes plasma damage, resulting in improved interface properties. An overlying polysilicon emitter can then provide a low sheet resistance emitter without heavy doping effects in the substrate, excess recombination, or absorption, and is a significant improvement over a conventional diffused emitter or TCO.Type: ApplicationFiled: April 9, 2009Publication date: November 26, 2009Inventor: Peter G. BORDEN
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Patent number: 7547569Abstract: A processing method described herein provides a method of patterning a MoSe2 and/or Mo material, for example a layer of such material(s) in a thin-film structure. According to one aspect, the invention relates to etch solutions that can effectively etch through Mo and/or MoSe2. According to another aspect, the invention relates to etching such materials when such materials are processed with other materials in a thin film photovoltaic device. According to other aspects, the invention includes a process of etching Mo and/or MoSe2 with selectivity to a layer of CIGS material in an overall process flow. According to still further aspects, the invention relates to Mo and/or MoSe2 etch solutions that are useful in an overall photolithographic process for forming a photovoltaic cell and/or interconnects and test structures in a photovoltaic device.Type: GrantFiled: November 22, 2006Date of Patent: June 16, 2009Assignee: Applied Materials, Inc.Inventors: Timothy Weidman, Li Xu, Peter G. Borden
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Publication number: 20090111209Abstract: A processing method described herein provides a method of patterning a MoSe2 and/or Mo material, for example a layer of such material(s) in a thin-film structure. According to one aspect, the invention relates to etch solutions that can effectively etch through Mo and/or MoSe2. According to another aspect, the invention relates to etching such materials when such materials are processed with other materials in a thin film photovoltaic device. According to other aspects, the invention includes a process of etching Mo and/or MoSe2 with selectivity to a layer of CIGS material in an overall process flow. According to still further aspects, the invention relates to Mo and/or MoSe2 etch solutions that are useful in an overall photolithographic process for forming a photovoltaic cell and/or interconnects and test structures in a photovoltaic device.Type: ApplicationFiled: December 30, 2008Publication date: April 30, 2009Inventors: Timothy WEIDMAN, Li Xu, Peter G. Borden
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Publication number: 20090014052Abstract: In a module of photovoltaic cells, a method of forming the module interconnects includes a single cutting process after the deposition of all active layers. This simplifies the overall process to a set of vacuum steps followed by a set of interconnect steps, and may significantly module quality and yield. According to another aspect, an interconnect forming method includes self-aligned deposition of an insulator. This simplifies the process because no alignment is required. According to another aspect, an interconnect forming method includes a scribing process that results in a much narrower interconnect which may significantly boost cell efficiency, and allow for narrower cell sizes. According to another aspect, an interconnect includes an insulator layer that greatly reduces shunt current through the active layer, which can greatly improve cell efficiency.Type: ApplicationFiled: September 19, 2008Publication date: January 15, 2009Inventors: Peter G. Borden, David J. Eaglesham
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Publication number: 20090007957Abstract: In a module of photovoltaic cells, a method of forming the module interconnects includes a single cutting process after the deposition of all active layers. This simplifies the overall process to a set of vacuum steps followed by a set of interconnect steps, and may significantly module quality and yield. According to another aspect, an interconnect forming method includes self-aligned deposition of an insulator. This simplifies the process because no alignment is required. According to another aspect, an interconnect forming method includes a scribing process that results in a much narrower interconnect which may significantly boost cell efficiency, and allow for narrower cell sizes. According to another aspect, an interconnect includes an insulator layer that greatly reduces shunt current through the active layer, which can greatly improve cell efficiency.Type: ApplicationFiled: September 19, 2008Publication date: January 8, 2009Inventors: Peter G. Borden, David J. Eaglesham
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Patent number: 7465591Abstract: A structure having a number of traces passing through a region is evaluated by using a beam of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called “reflected portion”) of the beam reflected from the region. The just-described acts of “illuminating” and “generating” are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces. In one implementation the beam is polarized, and can be used in several ways, including, e.g.Type: GrantFiled: October 29, 2004Date of Patent: December 16, 2008Assignee: Applied Materials, Inc.Inventors: Peter G Borden, Jiping Li
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Publication number: 20080239315Abstract: A method and system as described herein provides for detecting certain anomalies in a wafer. According to one aspect, these anomalies relate to defects or stress that can lead to wafer breakage before, during or after further wafer processing. According to other aspects, the method includes passing polarized light through a wafer and analyzing the transmitted light for any changes in polarization. According to additional aspects, the method includes analyzing the entire wafer in one image capturing operation. According to still further aspects, the light passed through the wafer is below the bandgap for a material such as silicon that comprises the wafer, so that substantially all light will be transmitted through rather than absorbed or reflected by the material. According to still further aspects, the detection operation can be rapid and automatic, so that it can be easily included in an overall processing sequence.Type: ApplicationFiled: April 2, 2007Publication date: October 2, 2008Inventor: PETER G. BORDEN