Patents by Inventor Peter G. Borden

Peter G. Borden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9033534
    Abstract: Described herein are hands-free vision aids that may be used for low-vision reading. These vision aids may be beneficial for individuals with low-vision disorders such as age-related macular degeneration, retinitis pigmentosa, and other visual disorders. The vision aids described here comprise an optical system with one or more light sources configured to provide a rectangular field of illumination with high illuminance levels bounded by high contrast perimeter. Such an illumination field greatly illuminates a targeted viewing region while reducing glare that arises from illuminating peripheral regions. Some vision aids use green light with high illuminance values for improving visual acuity and comfort for long-duration reading. The optical system of a vision aid may be configured to fit onto and/or integrate with eyeglass frames.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: May 19, 2015
    Assignee: Jasper Ridge Inc.
    Inventors: Peter G. Borden, Peter H. Muller
  • Publication number: 20130063929
    Abstract: Described herein are hands-free vision aids that may be used for low-vision reading. These vision aids may be beneficial for individuals with low-vision disorders such as age-related macular degeneration, retinitis pigmentosa, and other visual disorders. The vision aids described here comprise an optical system with one or more light sources configured to provide a rectangular field of illumination with high illuminance levels bounded by high contrast perimeter. Such an illumination field greatly illuminates a targeted viewing region while reducing glare that arises from illuminating peripheral regions. Some vision aids use green light with high illuminance values for improving visual acuity and comfort for long-duration reading. The optical system of a vision aid may be configured to fit onto and/or integrate with eyeglass frames.
    Type: Application
    Filed: March 1, 2012
    Publication date: March 14, 2013
    Applicant: Jasper Ridge Inc.
    Inventors: Peter G. Borden, Peter H. Muller
  • Patent number: 8338220
    Abstract: Embodiments of the invention are directed to methods and apparatus for processing of a solar substrate for making a photovoltaic device. In particular, methods and apparatus for creating a negatively charged passivation layer by are provided.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: December 25, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Peter G. Borden, Christopher Sean Olsen
  • Patent number: 8309374
    Abstract: The present invention generally provides a batch substrate processing system, or cluster tool, for in-situ processing of a film stack used to form regions of a solar cell device. In one configuration, the film stack formed on each of the substrates in the batch contains one or more silicon-containing layers and one or more metal layers that are deposited and further processed within the various chambers contained in the substrate processing system. In one embodiment, a batch of solar cell substrates is simultaneously transferred in a vacuum or inert environment to prevent contamination from affecting the solar cell formation process.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: November 13, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Keith Brian Porthouse, Peter G. Borden, Tristan R. Holtam, Lisong Zhou, Ian Scott Latchford, Derek Aqui, Vinay K. Shah
  • Patent number: 8246284
    Abstract: An apparatus with a plurality of load-lock chambers stacked having independently controlled pressures within their interior regions is provided. According to one or more embodiments, each load-lock chamber includes a pump valve connected to a pump line and a vent valve connected to a vent line to independently control the changes of pressure within the interior regions of the chambers. Methods for conveying substrates held within these chambers from the apparatus to one or more processing chambers, which may be in-line, are also provided.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: August 21, 2012
    Assignee: Applied Materials, Inc.
    Inventor: Peter G. Borden
  • Publication number: 20110162706
    Abstract: A method for manufacturing a polysilicon emitter solar cell with a passivating layer over its polysilicon emitter layer is disclosed. The method includes steps of preparing a substrate, forming a first polysilicon layer over the substrate, and forming a first passivating layer over the first polysilicon layer. Another embodiment of the present invention discloses a solar cell apparatus. The solar cell apparatus includes a substrate, a first polysilicon layer over the substrate, and a first passivating layer on first polysilicon layer.
    Type: Application
    Filed: January 3, 2011
    Publication date: July 7, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Peter G. Borden, Li Xu, Tristan R. Holtam, Vinay K. Shah
  • Publication number: 20100326797
    Abstract: A carrier for transporting a plurality of solar cell substrates comprising a peripheral frame defined by a pair of side members connected by first and second complementary end members, a plurality of cross struts, a plurality of standoffs for supporting the substrates, and at least one drive member coupled to one of the end members. The end members have alternating bends that provide a wave-like pattern of projections and indentations, are arranged in a spaced and substantially parallel orientation, and are constructed from metal wire. Each cross strut is connected to the first end member and the second end member between complementary projections and indentations. Rotation of the drive member causes both end members to rotate in a circular motion.
    Type: Application
    Filed: April 23, 2010
    Publication date: December 30, 2010
    Applicant: Applied Materials, Inc.
    Inventor: Peter G. Borden
  • Publication number: 20100226736
    Abstract: An apparatus with a plurality of load-lock chambers stacked having independently controlled pressures within their interior regions is provided. According to one or more embodiments, each load-lock chamber includes a pump valve connected to a pump line and a vent valve connected to a vent line to independently control the changes of pressure within the interior regions of the chambers. Methods for conveying substrates held within these chambers from the apparatus to one or more processing chambers, which may be in-line, are also provided.
    Type: Application
    Filed: March 5, 2009
    Publication date: September 9, 2010
    Applicant: Applied Materials, Inc.
    Inventor: Peter G. Borden
  • Publication number: 20100203742
    Abstract: Embodiments of the invention are directed to methods and apparatus for processing of a solar substrate for making a photovoltaic device. In particular, methods and apparatus for creating a negatively charged passivation layer by are provided.
    Type: Application
    Filed: February 6, 2009
    Publication date: August 12, 2010
    Applicant: Applied Materials, Inc.
    Inventors: Peter G. Borden, Christopher Sean Olsen
  • Patent number: 7773211
    Abstract: A method and system as described herein provides for detecting certain anomalies in a wafer. According to one aspect, these anomalies relate to defects or stress that can lead to wafer breakage before, during or after further wafer processing. According to other aspects, the method includes passing polarized light through a wafer and analyzing the transmitted light for any changes in polarization. According to additional aspects, the method includes analyzing the entire wafer in one image capturing operation. According to still further aspects, the light passed through the wafer is below the bandgap for a material such as silicon that comprises the wafer, so that substantially all light will be transmitted through rather than absorbed or reflected by the material. According to still further aspects, the detection operation can be rapid and automatic, so that it can be easily included in an overall processing sequence.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: August 10, 2010
    Assignee: Applied Materials, Inc.
    Inventor: Peter G. Borden
  • Publication number: 20100132774
    Abstract: Photovoltaic devices and methods of manufacture are provided. In an embodiment, the devices comprise a micro-crystal silicon cell having an amorphous silicon layer formed on the micro-crystal cell.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 3, 2010
    Applicant: Applied Materials, Inc.
    Inventor: Peter G. Borden
  • Publication number: 20100087028
    Abstract: The present invention generally provides a batch substrate processing system, or cluster tool, for in-situ processing of a film stack used to form regions of a solar cell device. In one configuration, the film stack formed on each of the substrates in the batch contains one or more silicon-containing layers and one or more metal layers that are deposited and further processed within the various chambers contained in the substrate processing system.
    Type: Application
    Filed: October 7, 2009
    Publication date: April 8, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Keith Brian Porthouse, Peter G. Borden, Tristan R. Holtam, Lisong Zhou, Ian Scott Latchford, Derek Aqui, Vinay K. Shah
  • Publication number: 20090314341
    Abstract: The present invention relates to forming contacts for solar cells. According to one aspect, an interdigitated back contact (IBC) cell design according to the invention requires only one patterning step to form the interdigitated junctions (vs. two for alternate designs). According to another aspect, the back contact structure includes a silicon nitride or a nitrided tunnel dielectric. This acts as a diffusion barrier, so that the properties of the tunnel dielectric can be maintained during a high temperature process step, and boron diffusion through the tunnel dielectric can be prevented. According to another aspect, the process for forming the back contacts requires no deep drive-in diffusions.
    Type: Application
    Filed: April 9, 2009
    Publication date: December 24, 2009
    Inventors: Peter G. BORDEN, Li Xu
  • Publication number: 20090288704
    Abstract: The present invention relates to polysilicon emitter solar cells, and more particularly to polysilicon emitter solar cells with hyperabrupt junctions, and methods for making such solar cells. According to one aspect, a polysilicon emitter solar cell according to the invention includes a nitrided tunnel insulator. The nitridation prevents boron diffusion, enabling a hyperabrupt junction for a p-poly on n-Si device. According to another aspect, a nitrided oxide (DPN) is used in a tunnel oxide layer of a MIS solar cell structure. The DPN layer minimizes plasma damage, resulting in improved interface properties. An overlying polysilicon emitter can then provide a low sheet resistance emitter without heavy doping effects in the substrate, excess recombination, or absorption, and is a significant improvement over a conventional diffused emitter or TCO.
    Type: Application
    Filed: April 9, 2009
    Publication date: November 26, 2009
    Inventor: Peter G. BORDEN
  • Patent number: 7547569
    Abstract: A processing method described herein provides a method of patterning a MoSe2 and/or Mo material, for example a layer of such material(s) in a thin-film structure. According to one aspect, the invention relates to etch solutions that can effectively etch through Mo and/or MoSe2. According to another aspect, the invention relates to etching such materials when such materials are processed with other materials in a thin film photovoltaic device. According to other aspects, the invention includes a process of etching Mo and/or MoSe2 with selectivity to a layer of CIGS material in an overall process flow. According to still further aspects, the invention relates to Mo and/or MoSe2 etch solutions that are useful in an overall photolithographic process for forming a photovoltaic cell and/or interconnects and test structures in a photovoltaic device.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: June 16, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Timothy Weidman, Li Xu, Peter G. Borden
  • Publication number: 20090111209
    Abstract: A processing method described herein provides a method of patterning a MoSe2 and/or Mo material, for example a layer of such material(s) in a thin-film structure. According to one aspect, the invention relates to etch solutions that can effectively etch through Mo and/or MoSe2. According to another aspect, the invention relates to etching such materials when such materials are processed with other materials in a thin film photovoltaic device. According to other aspects, the invention includes a process of etching Mo and/or MoSe2 with selectivity to a layer of CIGS material in an overall process flow. According to still further aspects, the invention relates to Mo and/or MoSe2 etch solutions that are useful in an overall photolithographic process for forming a photovoltaic cell and/or interconnects and test structures in a photovoltaic device.
    Type: Application
    Filed: December 30, 2008
    Publication date: April 30, 2009
    Inventors: Timothy WEIDMAN, Li Xu, Peter G. Borden
  • Publication number: 20090014052
    Abstract: In a module of photovoltaic cells, a method of forming the module interconnects includes a single cutting process after the deposition of all active layers. This simplifies the overall process to a set of vacuum steps followed by a set of interconnect steps, and may significantly module quality and yield. According to another aspect, an interconnect forming method includes self-aligned deposition of an insulator. This simplifies the process because no alignment is required. According to another aspect, an interconnect forming method includes a scribing process that results in a much narrower interconnect which may significantly boost cell efficiency, and allow for narrower cell sizes. According to another aspect, an interconnect includes an insulator layer that greatly reduces shunt current through the active layer, which can greatly improve cell efficiency.
    Type: Application
    Filed: September 19, 2008
    Publication date: January 15, 2009
    Inventors: Peter G. Borden, David J. Eaglesham
  • Publication number: 20090007957
    Abstract: In a module of photovoltaic cells, a method of forming the module interconnects includes a single cutting process after the deposition of all active layers. This simplifies the overall process to a set of vacuum steps followed by a set of interconnect steps, and may significantly module quality and yield. According to another aspect, an interconnect forming method includes self-aligned deposition of an insulator. This simplifies the process because no alignment is required. According to another aspect, an interconnect forming method includes a scribing process that results in a much narrower interconnect which may significantly boost cell efficiency, and allow for narrower cell sizes. According to another aspect, an interconnect includes an insulator layer that greatly reduces shunt current through the active layer, which can greatly improve cell efficiency.
    Type: Application
    Filed: September 19, 2008
    Publication date: January 8, 2009
    Inventors: Peter G. Borden, David J. Eaglesham
  • Patent number: 7465591
    Abstract: A structure having a number of traces passing through a region is evaluated by using a beam of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called “reflected portion”) of the beam reflected from the region. The just-described acts of “illuminating” and “generating” are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces. In one implementation the beam is polarized, and can be used in several ways, including, e.g.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: December 16, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Peter G Borden, Jiping Li
  • Publication number: 20080239315
    Abstract: A method and system as described herein provides for detecting certain anomalies in a wafer. According to one aspect, these anomalies relate to defects or stress that can lead to wafer breakage before, during or after further wafer processing. According to other aspects, the method includes passing polarized light through a wafer and analyzing the transmitted light for any changes in polarization. According to additional aspects, the method includes analyzing the entire wafer in one image capturing operation. According to still further aspects, the light passed through the wafer is below the bandgap for a material such as silicon that comprises the wafer, so that substantially all light will be transmitted through rather than absorbed or reflected by the material. According to still further aspects, the detection operation can be rapid and automatic, so that it can be easily included in an overall processing sequence.
    Type: Application
    Filed: April 2, 2007
    Publication date: October 2, 2008
    Inventor: PETER G. BORDEN