Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.

Abstract: A method (1) creates charge carriers in a concentration that changes in a periodic manner (also called “modulation”) only with respect to time, and (2) determines the number of charge carriers created in the carrier creation region by measuring an interference signal obtained by interference between a reference beam and a portion of a probe beam that is reflected by charge carriers at various depths of the semiconductor material, and comparing the measurement with corresponding values obtained by simulation (e.g. in graphs of such measurements for different junction depths). Various properties of the reflected portion of the probe beam (such as power and phase) are functions of the depth at which the reflection occurs, and can be measured to determine the depth of the junction, and the profile of active dopants.

Abstract: Any semiconductor wafer fabrication process may be changed to monitor lateral abruptness of doped layers as an additional step in the wafer fabrication process. In one embodiment, a test structure including one or more doped regions is formed in a production wafer (e.g. simultaneously with one or more transistors) and one or more dimension(s) of the test structure are measured, and used as an estimate of lateral abruptness in other doped regions in the wafer, e.g. in the simultaneously formed transistors. Doped regions in test structures can be located at regularly spaced intervals relative to one another, or alternatively may be located with varying spacings between adjacent doped regions. Alternatively or in addition, multiple test structures may be formed in a single wafer, with doped regions at regular spatial intervals in each test structure, while different test structures have different spatial intervals.

Abstract: A region of a semiconductor wafer is stimulated to create excess carriers in the region, and an interferometer is used to obtain a measured value of a signal that is affected by the stimulation. The apparatus and method use a predetermined profile as a measure of profile of active dopants in the region, if the measured value of the signal matches a simulated value obtained from simulation of conditions present during stimulation, with the predetermined profile of concentration of active dopants in the region under stimulation. The measured profile may be used in some embodiments to determine junction depth. Moreover, the junction depth that is so determined may be compared with specifications for acceptability of the wafer.

Abstract: A structure having a number of traces passing through a region is evaluated by using a beam of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called “reflected portion”) of the beam reflected from the region. The just-described acts of “illuminating” and “generating” are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces.

Abstract: A coefficient of a function that relates a measurement from a wafer to a parameter used in making the measurement (such as the power of a beam used in the measurement) is determined. The coefficient is used to evaluate the wafer (e.g. to accept or reject the wafer for further processing), and/or to control fabrication of another wafer. In one embodiment, the coefficient is used to control operation of a wafer processing unit (that may include, e.g. an ion implanter), or a heat treatment unit (such as a rapid thermal annealer).

Abstract: An apparatus measures a property of a layer (such as the sheet resistance of a conductive layer or thermal conductivity of a dielectric layer that is located underneath the conductive layer) by performing the following method: (1) focusing the heating beam on the heated a region (also called “heated region”) of the conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at least a majority (preferably all) of the generated heat transfers out of the heated region by diffusion, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit length) of a conductive line formed by patterning the conductive layer.

Abstract: Any semiconductor wafer fabrication process may be changed to monitor lateral abruptness of doped layers as an additional step in the wafer fabrication process. In one embodiment, a test structure including one or more doped regions is formed in a production wafer (e.g. simultaneously with one or more transistors) and one or more dimension(s) of the test structure are measured, and used as an estimate of lateral abruptness in other doped regions in the wafer, e.g. in the simultaneously formed transistors. Doped regions in test structures can be located at regularly spaced intervals relative to one another, or alternatively may be located with varying spacings between adjacent doped regions. Alternatively or in addition, multiple test structures may be formed in a single wafer, with doped regions at regular spatial intervals in each test structure, while different test structures have different spatial intervals.

Abstract: Any semiconductor wafer fabrication process may be changed to monitor lateral abruptness of doped layers as an additional step in the wafer fabrication process. In one embodiment, a test structure including one or more doped regions is formed in a production wafer (e.g. simultaneously with one or more transistors) and one or more dimension(s) of the test structure are measured, and used as an estimate of lateral abruptness in other doped regions in the wafer, e.g. in the simultaneously formed transistors. Doped regions in test structures can be located at regularly spaced intervals relative to one another, or alternatively may be located with varying spacings between adjacent doped regions. Alternatively or in addition, multiple test structures may be formed in a single wafer, with doped regions at regular spatial intervals in each test structure, while different test structures have different spatial intervals.

Abstract: An apparatus measures a property of a layer (such as the sheet resistance of a conductive layer) by performing the following method: (1) focusing the heating beam on the heated a region (also called “heated region”) of the conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of the optically absorbing layer is approximately equal to (e.g., within 90% of) a temperature of the optically absorbing layer when heated by an unmodulated beam, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit area) of a conductive pad formed by patterning the conductive layer.

Abstract: Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.

Abstract: An apparatus and method uses diffusive modulation (without generating a wave of carriers) for measuring a material property (such as any one or more of: mobility, doping, and lifetime) that is used in evaluating a semiconductor wafer. The measurements are carried out in a small area, for use on wafers having patterns for integrated circuit dice. The measurements are based on measurement of reflectance, for example as a function of carrier concentration. In one implementation, the semiconductor wafer is illuminated with two beams, one with photon energy above the bandgap energy of the semiconductor, and another with photon energy near or below the bandgap. The diameters of the two beams relative to one another are varied to extract additional information about the semiconductor material, for use in measuring, e.g. lifetime.

Abstract: Two more measurements are made on the same workpiece, during fabrication. Each measurement may be made employing a different process. The measurements are used together to determine a property of the workpiece. For example, multiple measurements from a first process are used with a predetermined value of the property of interest in a simulator to generate a simulated value of a signal to be measured in a second process. One or more such simulated values and a measured value are used to identify a value of the property of interest. When the workpiece's property is found to not match the specification, a process control parameter used in the workpiece's fabrication is adjusted, thereby to implement process control.

Abstract: A method (1) creates charge carriers in a concentration that changes in a periodic manner (also called “modulation”) only with respect to time, and (2) determines the number of charge carriers created in the carrier creation region by measuring an interference signal obtained by interference between a reference beam and a portion of a probe beam that is reflected by charge carriers at various depths of the semiconductor material, and comparing the measurement with corresponding values obtained by simulation (e.g. in graphs of such measurements for different junction depths). Various properties of the reflected portion of the probe beam (such as power and phase) are functions of the depth at which the reflection occurs, and can be measured to determine the depth of the junction, and the profile of active dopants.

Abstract: An apparatus and method uses diffusive modulation (without generating a wave of carriers) for measuring a material property (such as any one or more of: mobility, doping, and lifetime) that is used in evaluating a semiconductor wafer. The measurements are carried out in a small area, for use on wafers having patterns for integrated circuit dice. The measurements are based on measurement of reflectance, for example as a function of carrier concentration. In one implementation, the semiconductor wafer is illuminated with two beams, one with photon energy above the bandgap energy of the semiconductor, and another with photon energy near or below the bandgap. The diameters of the two beams relative to one another are varied to extract additional information about the semiconductor material, for use in measuring, e.g. lifetime.

Abstract: A method (1) creates charge carriers in a concentration that changes in a periodic manner (also called “modulation”) only with respect to time, and (2) determines the number of charge carriers created in the carrier creation region by measuring an interference signal obtained by interference between a reference beam and a portion of a probe beam that is reflected by charge carriers at various depths of the semiconductor material, and comparing the measurement with corresponding values obtained by simulation (e.g. in graphs of such measurements for different junction depths). Various properties of the reflected portion of the probe beam (such as power and phase) are functions of the depth at which the reflection occurs, and can be measured to determine the depth of the junction, and the profile of active dopants.

Abstract: A coefficient of a function that relates a measurement from a wafer to a parameter used in making the measurement (such as the power of a beam used in the measurement) is determined. The coefficient is used to evaluate the wafer (e.g. to accept or reject the wafer for further processing), and/or to control fabrication of another wafer. In one embodiment, the coefficient is used to control operation of a wafer processing unit (that may include, e.g. an ion implanter), or a heat treatment unit (such as a rapid thermal annealer).

Abstract: A sidewall or other feature in a semiconductor wafer is evaluated by illuminating the wafer with at least one beam of electromagnetic radiation, and measuring intensity of a portion of the beam reflected by the wafer. Change in reflectance between measurements provides a measure of a property of the feature. The change may be either a decrease in reflectance or an increase in reflectance, depending on the embodiment. A single beam may be used if it is polarized in a direction substantially perpendicular to a longitudinal direction of the sidewall. A portion of the energy of the beam is absorbed by the sidewall, thereby to cause a decrease in reflectance when compared to reflectance by a flat region. Alternatively, two beams may be used, of which a first beam applies heat to the feature itself or to a region adjacent to the feature, and a second beam is used to measure an increase in reflectance caused by an elevation in temperature due to heat transfer through the feature.

Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.

Abstract: A method (1) creates charge carriers in a concentration that changes in a periodic manner (also called “modulation”) only with respect to time, and (2) determines the umber of charge carriers created in the carrier creation region by measuring an interference signal obtained by interference between a reference beam and a portion of a probe beam that is reflected by charge carriers at various depths of the semiconductor material, and comparing the measurement with corresponding values obtained by simulation (e.g. in graphs of such measurements for different junction depths). Various properties of the reflected portion of the probe beam (such as power and phase) are functions of the depth at which the reflection occurs, and can be measured to determine the depth of the junction, and the profile of active dopants.